setup.c 1.5 KB

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  1. /*
  2. * setup.c - boot time setup code
  3. */
  4. #include <linux/init.h>
  5. #include <linux/export.h>
  6. #include <asm/bootinfo.h>
  7. #include <asm/reboot.h>
  8. #include <asm/time.h>
  9. #include <linux/ioport.h>
  10. #include <asm/mach-rc32434/rb.h>
  11. #include <asm/mach-rc32434/pci.h>
  12. struct pci_reg __iomem *pci_reg;
  13. EXPORT_SYMBOL(pci_reg);
  14. static struct resource pci0_res[] = {
  15. {
  16. .name = "pci_reg0",
  17. .start = PCI0_BASE_ADDR,
  18. .end = PCI0_BASE_ADDR + sizeof(struct pci_reg),
  19. .flags = IORESOURCE_MEM,
  20. }
  21. };
  22. static void rb_machine_restart(char *command)
  23. {
  24. /* just jump to the reset vector */
  25. writel(0x80000001, IDT434_REG_BASE + RST);
  26. ((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
  27. }
  28. static void rb_machine_halt(void)
  29. {
  30. for (;;)
  31. continue;
  32. }
  33. void __init plat_mem_setup(void)
  34. {
  35. u32 val;
  36. _machine_restart = rb_machine_restart;
  37. _machine_halt = rb_machine_halt;
  38. pm_power_off = rb_machine_halt;
  39. set_io_port_base(KSEG1);
  40. pci_reg = ioremap_nocache(pci0_res[0].start,
  41. pci0_res[0].end - pci0_res[0].start);
  42. if (!pci_reg) {
  43. printk(KERN_ERR "Could not remap PCI registers\n");
  44. return;
  45. }
  46. val = __raw_readl(&pci_reg->pcic);
  47. val &= 0xFFFFFF7;
  48. __raw_writel(val, (void *)&pci_reg->pcic);
  49. #ifdef CONFIG_PCI
  50. /* Enable PCI interrupts in EPLD Mask register */
  51. *epld_mask = 0x0;
  52. *(epld_mask + 1) = 0x0;
  53. #endif
  54. write_c0_wired(0);
  55. }
  56. const char *get_system_type(void)
  57. {
  58. switch (mips_machtype) {
  59. case MACH_MIKROTIK_RB532A:
  60. return "Mikrotik RB532A";
  61. break;
  62. default:
  63. return "Mikrotik RB532";
  64. break;
  65. }
  66. }