ath79.h 3.1 KB

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  1. /*
  2. * Atheros AR71XX/AR724X/AR913X common definitions
  3. *
  4. * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6. *
  7. * Parts of this file are based on Atheros' 2.6.15 BSP
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published
  11. * by the Free Software Foundation.
  12. */
  13. #ifndef __ASM_MACH_ATH79_H
  14. #define __ASM_MACH_ATH79_H
  15. #include <linux/types.h>
  16. #include <linux/io.h>
  17. enum ath79_soc_type {
  18. ATH79_SOC_UNKNOWN,
  19. ATH79_SOC_AR7130,
  20. ATH79_SOC_AR7141,
  21. ATH79_SOC_AR7161,
  22. ATH79_SOC_AR7240,
  23. ATH79_SOC_AR7241,
  24. ATH79_SOC_AR7242,
  25. ATH79_SOC_AR9130,
  26. ATH79_SOC_AR9132,
  27. ATH79_SOC_AR9330,
  28. ATH79_SOC_AR9331,
  29. ATH79_SOC_AR9341,
  30. ATH79_SOC_AR9342,
  31. ATH79_SOC_AR9344,
  32. ATH79_SOC_QCA9556,
  33. ATH79_SOC_QCA9558,
  34. };
  35. extern enum ath79_soc_type ath79_soc;
  36. extern unsigned int ath79_soc_rev;
  37. static inline int soc_is_ar71xx(void)
  38. {
  39. return (ath79_soc == ATH79_SOC_AR7130 ||
  40. ath79_soc == ATH79_SOC_AR7141 ||
  41. ath79_soc == ATH79_SOC_AR7161);
  42. }
  43. static inline int soc_is_ar724x(void)
  44. {
  45. return (ath79_soc == ATH79_SOC_AR7240 ||
  46. ath79_soc == ATH79_SOC_AR7241 ||
  47. ath79_soc == ATH79_SOC_AR7242);
  48. }
  49. static inline int soc_is_ar7240(void)
  50. {
  51. return (ath79_soc == ATH79_SOC_AR7240);
  52. }
  53. static inline int soc_is_ar7241(void)
  54. {
  55. return (ath79_soc == ATH79_SOC_AR7241);
  56. }
  57. static inline int soc_is_ar7242(void)
  58. {
  59. return (ath79_soc == ATH79_SOC_AR7242);
  60. }
  61. static inline int soc_is_ar913x(void)
  62. {
  63. return (ath79_soc == ATH79_SOC_AR9130 ||
  64. ath79_soc == ATH79_SOC_AR9132);
  65. }
  66. static inline int soc_is_ar933x(void)
  67. {
  68. return (ath79_soc == ATH79_SOC_AR9330 ||
  69. ath79_soc == ATH79_SOC_AR9331);
  70. }
  71. static inline int soc_is_ar9341(void)
  72. {
  73. return (ath79_soc == ATH79_SOC_AR9341);
  74. }
  75. static inline int soc_is_ar9342(void)
  76. {
  77. return (ath79_soc == ATH79_SOC_AR9342);
  78. }
  79. static inline int soc_is_ar9344(void)
  80. {
  81. return (ath79_soc == ATH79_SOC_AR9344);
  82. }
  83. static inline int soc_is_ar934x(void)
  84. {
  85. return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
  86. }
  87. static inline int soc_is_qca9556(void)
  88. {
  89. return ath79_soc == ATH79_SOC_QCA9556;
  90. }
  91. static inline int soc_is_qca9558(void)
  92. {
  93. return ath79_soc == ATH79_SOC_QCA9558;
  94. }
  95. static inline int soc_is_qca955x(void)
  96. {
  97. return soc_is_qca9556() || soc_is_qca9558();
  98. }
  99. void ath79_ddr_wb_flush(unsigned int reg);
  100. void ath79_ddr_set_pci_windows(void);
  101. extern void __iomem *ath79_pll_base;
  102. extern void __iomem *ath79_reset_base;
  103. static inline void ath79_pll_wr(unsigned reg, u32 val)
  104. {
  105. __raw_writel(val, ath79_pll_base + reg);
  106. }
  107. static inline u32 ath79_pll_rr(unsigned reg)
  108. {
  109. return __raw_readl(ath79_pll_base + reg);
  110. }
  111. static inline void ath79_reset_wr(unsigned reg, u32 val)
  112. {
  113. __raw_writel(val, ath79_reset_base + reg);
  114. }
  115. static inline u32 ath79_reset_rr(unsigned reg)
  116. {
  117. return __raw_readl(ath79_reset_base + reg);
  118. }
  119. void ath79_device_reset_set(u32 mask);
  120. void ath79_device_reset_clear(u32 mask);
  121. void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3);
  122. void ath79_misc_irq_init(void __iomem *regs, int irq,
  123. int irq_base, bool is_ar71xx);
  124. #endif /* __ASM_MACH_ATH79_H */