asm-eva.h 6.8 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2014 Imagination Technologies Ltd.
  7. *
  8. */
  9. #ifndef __ASM_ASM_EVA_H
  10. #define __ASM_ASM_EVA_H
  11. #ifndef __ASSEMBLY__
  12. /* Kernel variants */
  13. #define kernel_cache(op, base) "cache " op ", " base "\n"
  14. #define kernel_ll(reg, addr) "ll " reg ", " addr "\n"
  15. #define kernel_sc(reg, addr) "sc " reg ", " addr "\n"
  16. #define kernel_lw(reg, addr) "lw " reg ", " addr "\n"
  17. #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n"
  18. #define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n"
  19. #define kernel_lh(reg, addr) "lh " reg ", " addr "\n"
  20. #define kernel_lb(reg, addr) "lb " reg ", " addr "\n"
  21. #define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n"
  22. #define kernel_sw(reg, addr) "sw " reg ", " addr "\n"
  23. #define kernel_swl(reg, addr) "swl " reg ", " addr "\n"
  24. #define kernel_swr(reg, addr) "swr " reg ", " addr "\n"
  25. #define kernel_sh(reg, addr) "sh " reg ", " addr "\n"
  26. #define kernel_sb(reg, addr) "sb " reg ", " addr "\n"
  27. #ifdef CONFIG_32BIT
  28. /*
  29. * No 'sd' or 'ld' instructions in 32-bit but the code will
  30. * do the correct thing
  31. */
  32. #define kernel_sd(reg, addr) user_sw(reg, addr)
  33. #define kernel_ld(reg, addr) user_lw(reg, addr)
  34. #else
  35. #define kernel_sd(reg, addr) "sd " reg", " addr "\n"
  36. #define kernel_ld(reg, addr) "ld " reg", " addr "\n"
  37. #endif /* CONFIG_32BIT */
  38. #ifdef CONFIG_EVA
  39. #define __BUILD_EVA_INSN(insn, reg, addr) \
  40. " .set push\n" \
  41. " .set mips0\n" \
  42. " .set eva\n" \
  43. " "insn" "reg", "addr "\n" \
  44. " .set pop\n"
  45. #define user_cache(op, base) __BUILD_EVA_INSN("cachee", op, base)
  46. #define user_ll(reg, addr) __BUILD_EVA_INSN("lle", reg, addr)
  47. #define user_sc(reg, addr) __BUILD_EVA_INSN("sce", reg, addr)
  48. #define user_lw(reg, addr) __BUILD_EVA_INSN("lwe", reg, addr)
  49. #define user_lwl(reg, addr) __BUILD_EVA_INSN("lwle", reg, addr)
  50. #define user_lwr(reg, addr) __BUILD_EVA_INSN("lwre", reg, addr)
  51. #define user_lh(reg, addr) __BUILD_EVA_INSN("lhe", reg, addr)
  52. #define user_lb(reg, addr) __BUILD_EVA_INSN("lbe", reg, addr)
  53. #define user_lbu(reg, addr) __BUILD_EVA_INSN("lbue", reg, addr)
  54. /* No 64-bit EVA instruction for loading double words */
  55. #define user_ld(reg, addr) user_lw(reg, addr)
  56. #define user_sw(reg, addr) __BUILD_EVA_INSN("swe", reg, addr)
  57. #define user_swl(reg, addr) __BUILD_EVA_INSN("swle", reg, addr)
  58. #define user_swr(reg, addr) __BUILD_EVA_INSN("swre", reg, addr)
  59. #define user_sh(reg, addr) __BUILD_EVA_INSN("she", reg, addr)
  60. #define user_sb(reg, addr) __BUILD_EVA_INSN("sbe", reg, addr)
  61. /* No 64-bit EVA instruction for storing double words */
  62. #define user_sd(reg, addr) user_sw(reg, addr)
  63. #else
  64. #define user_cache(op, base) kernel_cache(op, base)
  65. #define user_ll(reg, addr) kernel_ll(reg, addr)
  66. #define user_sc(reg, addr) kernel_sc(reg, addr)
  67. #define user_lw(reg, addr) kernel_lw(reg, addr)
  68. #define user_lwl(reg, addr) kernel_lwl(reg, addr)
  69. #define user_lwr(reg, addr) kernel_lwr(reg, addr)
  70. #define user_lh(reg, addr) kernel_lh(reg, addr)
  71. #define user_lb(reg, addr) kernel_lb(reg, addr)
  72. #define user_lbu(reg, addr) kernel_lbu(reg, addr)
  73. #define user_sw(reg, addr) kernel_sw(reg, addr)
  74. #define user_swl(reg, addr) kernel_swl(reg, addr)
  75. #define user_swr(reg, addr) kernel_swr(reg, addr)
  76. #define user_sh(reg, addr) kernel_sh(reg, addr)
  77. #define user_sb(reg, addr) kernel_sb(reg, addr)
  78. #ifdef CONFIG_32BIT
  79. #define user_sd(reg, addr) kernel_sw(reg, addr)
  80. #define user_ld(reg, addr) kernel_lw(reg, addr)
  81. #else
  82. #define user_sd(reg, addr) kernel_sd(reg, addr)
  83. #define user_ld(reg, addr) kernel_ld(reg, addr)
  84. #endif /* CONFIG_32BIT */
  85. #endif /* CONFIG_EVA */
  86. #else /* __ASSEMBLY__ */
  87. #define kernel_cache(op, base) cache op, base
  88. #define kernel_ll(reg, addr) ll reg, addr
  89. #define kernel_sc(reg, addr) sc reg, addr
  90. #define kernel_lw(reg, addr) lw reg, addr
  91. #define kernel_lwl(reg, addr) lwl reg, addr
  92. #define kernel_lwr(reg, addr) lwr reg, addr
  93. #define kernel_lh(reg, addr) lh reg, addr
  94. #define kernel_lb(reg, addr) lb reg, addr
  95. #define kernel_lbu(reg, addr) lbu reg, addr
  96. #define kernel_sw(reg, addr) sw reg, addr
  97. #define kernel_swl(reg, addr) swl reg, addr
  98. #define kernel_swr(reg, addr) swr reg, addr
  99. #define kernel_sh(reg, addr) sh reg, addr
  100. #define kernel_sb(reg, addr) sb reg, addr
  101. #ifdef CONFIG_32BIT
  102. /*
  103. * No 'sd' or 'ld' instructions in 32-bit but the code will
  104. * do the correct thing
  105. */
  106. #define kernel_sd(reg, addr) user_sw(reg, addr)
  107. #define kernel_ld(reg, addr) user_lw(reg, addr)
  108. #else
  109. #define kernel_sd(reg, addr) sd reg, addr
  110. #define kernel_ld(reg, addr) ld reg, addr
  111. #endif /* CONFIG_32BIT */
  112. #ifdef CONFIG_EVA
  113. #define __BUILD_EVA_INSN(insn, reg, addr) \
  114. .set push; \
  115. .set mips0; \
  116. .set eva; \
  117. insn reg, addr; \
  118. .set pop;
  119. #define user_cache(op, base) __BUILD_EVA_INSN(cachee, op, base)
  120. #define user_ll(reg, addr) __BUILD_EVA_INSN(lle, reg, addr)
  121. #define user_sc(reg, addr) __BUILD_EVA_INSN(sce, reg, addr)
  122. #define user_lw(reg, addr) __BUILD_EVA_INSN(lwe, reg, addr)
  123. #define user_lwl(reg, addr) __BUILD_EVA_INSN(lwle, reg, addr)
  124. #define user_lwr(reg, addr) __BUILD_EVA_INSN(lwre, reg, addr)
  125. #define user_lh(reg, addr) __BUILD_EVA_INSN(lhe, reg, addr)
  126. #define user_lb(reg, addr) __BUILD_EVA_INSN(lbe, reg, addr)
  127. #define user_lbu(reg, addr) __BUILD_EVA_INSN(lbue, reg, addr)
  128. /* No 64-bit EVA instruction for loading double words */
  129. #define user_ld(reg, addr) user_lw(reg, addr)
  130. #define user_sw(reg, addr) __BUILD_EVA_INSN(swe, reg, addr)
  131. #define user_swl(reg, addr) __BUILD_EVA_INSN(swle, reg, addr)
  132. #define user_swr(reg, addr) __BUILD_EVA_INSN(swre, reg, addr)
  133. #define user_sh(reg, addr) __BUILD_EVA_INSN(she, reg, addr)
  134. #define user_sb(reg, addr) __BUILD_EVA_INSN(sbe, reg, addr)
  135. /* No 64-bit EVA instruction for loading double words */
  136. #define user_sd(reg, addr) user_sw(reg, addr)
  137. #else
  138. #define user_cache(op, base) kernel_cache(op, base)
  139. #define user_ll(reg, addr) kernel_ll(reg, addr)
  140. #define user_sc(reg, addr) kernel_sc(reg, addr)
  141. #define user_lw(reg, addr) kernel_lw(reg, addr)
  142. #define user_lwl(reg, addr) kernel_lwl(reg, addr)
  143. #define user_lwr(reg, addr) kernel_lwr(reg, addr)
  144. #define user_lh(reg, addr) kernel_lh(reg, addr)
  145. #define user_lb(reg, addr) kernel_lb(reg, addr)
  146. #define user_lbu(reg, addr) kernel_lbu(reg, addr)
  147. #define user_sw(reg, addr) kernel_sw(reg, addr)
  148. #define user_swl(reg, addr) kernel_swl(reg, addr)
  149. #define user_swr(reg, addr) kernel_swr(reg, addr)
  150. #define user_sh(reg, addr) kernel_sh(reg, addr)
  151. #define user_sb(reg, addr) kernel_sb(reg, addr)
  152. #ifdef CONFIG_32BIT
  153. #define user_sd(reg, addr) kernel_sw(reg, addr)
  154. #define user_ld(reg, addr) kernel_lw(reg, addr)
  155. #else
  156. #define user_sd(reg, addr) kernel_sd(reg, addr)
  157. #define user_ld(reg, addr) kernel_sd(reg, addr)
  158. #endif /* CONFIG_32BIT */
  159. #endif /* CONFIG_EVA */
  160. #endif /* __ASSEMBLY__ */
  161. #endif /* __ASM_ASM_EVA_H */