pcibr_ate.c 4.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2001-2006 Silicon Graphics, Inc. All rights reserved.
  7. */
  8. #include <linux/types.h>
  9. #include <asm/sn/sn_sal.h>
  10. #include <asm/sn/pcibr_provider.h>
  11. #include <asm/sn/pcibus_provider_defs.h>
  12. #include <asm/sn/pcidev.h>
  13. int pcibr_invalidate_ate; /* by default don't invalidate ATE on free */
  14. /*
  15. * mark_ate: Mark the ate as either free or inuse.
  16. */
  17. static void mark_ate(struct ate_resource *ate_resource, int start, int number,
  18. u64 value)
  19. {
  20. u64 *ate = ate_resource->ate;
  21. int index;
  22. int length = 0;
  23. for (index = start; length < number; index++, length++)
  24. ate[index] = value;
  25. }
  26. /*
  27. * find_free_ate: Find the first free ate index starting from the given
  28. * index for the desired consecutive count.
  29. */
  30. static int find_free_ate(struct ate_resource *ate_resource, int start,
  31. int count)
  32. {
  33. u64 *ate = ate_resource->ate;
  34. int index;
  35. int start_free;
  36. for (index = start; index < ate_resource->num_ate;) {
  37. if (!ate[index]) {
  38. int i;
  39. int free;
  40. free = 0;
  41. start_free = index; /* Found start free ate */
  42. for (i = start_free; i < ate_resource->num_ate; i++) {
  43. if (!ate[i]) { /* This is free */
  44. if (++free == count)
  45. return start_free;
  46. } else {
  47. index = i + 1;
  48. break;
  49. }
  50. }
  51. if (i >= ate_resource->num_ate)
  52. return -1;
  53. } else
  54. index++; /* Try next ate */
  55. }
  56. return -1;
  57. }
  58. /*
  59. * free_ate_resource: Free the requested number of ATEs.
  60. */
  61. static inline void free_ate_resource(struct ate_resource *ate_resource,
  62. int start)
  63. {
  64. mark_ate(ate_resource, start, ate_resource->ate[start], 0);
  65. if ((ate_resource->lowest_free_index > start) ||
  66. (ate_resource->lowest_free_index < 0))
  67. ate_resource->lowest_free_index = start;
  68. }
  69. /*
  70. * alloc_ate_resource: Allocate the requested number of ATEs.
  71. */
  72. static inline int alloc_ate_resource(struct ate_resource *ate_resource,
  73. int ate_needed)
  74. {
  75. int start_index;
  76. /*
  77. * Check for ate exhaustion.
  78. */
  79. if (ate_resource->lowest_free_index < 0)
  80. return -1;
  81. /*
  82. * Find the required number of free consecutive ates.
  83. */
  84. start_index =
  85. find_free_ate(ate_resource, ate_resource->lowest_free_index,
  86. ate_needed);
  87. if (start_index >= 0)
  88. mark_ate(ate_resource, start_index, ate_needed, ate_needed);
  89. ate_resource->lowest_free_index =
  90. find_free_ate(ate_resource, ate_resource->lowest_free_index, 1);
  91. return start_index;
  92. }
  93. /*
  94. * Allocate "count" contiguous Bridge Address Translation Entries
  95. * on the specified bridge to be used for PCI to XTALK mappings.
  96. * Indices in rm map range from 1..num_entries. Indices returned
  97. * to caller range from 0..num_entries-1.
  98. *
  99. * Return the start index on success, -1 on failure.
  100. */
  101. int pcibr_ate_alloc(struct pcibus_info *pcibus_info, int count)
  102. {
  103. int status;
  104. unsigned long flags;
  105. spin_lock_irqsave(&pcibus_info->pbi_lock, flags);
  106. status = alloc_ate_resource(&pcibus_info->pbi_int_ate_resource, count);
  107. spin_unlock_irqrestore(&pcibus_info->pbi_lock, flags);
  108. return status;
  109. }
  110. /*
  111. * Setup an Address Translation Entry as specified. Use either the Bridge
  112. * internal maps or the external map RAM, as appropriate.
  113. */
  114. static inline u64 __iomem *pcibr_ate_addr(struct pcibus_info *pcibus_info,
  115. int ate_index)
  116. {
  117. if (ate_index < pcibus_info->pbi_int_ate_size) {
  118. return pcireg_int_ate_addr(pcibus_info, ate_index);
  119. }
  120. panic("pcibr_ate_addr: invalid ate_index 0x%x", ate_index);
  121. }
  122. /*
  123. * Update the ate.
  124. */
  125. void inline
  126. ate_write(struct pcibus_info *pcibus_info, int ate_index, int count,
  127. volatile u64 ate)
  128. {
  129. while (count-- > 0) {
  130. if (ate_index < pcibus_info->pbi_int_ate_size) {
  131. pcireg_int_ate_set(pcibus_info, ate_index, ate);
  132. } else {
  133. panic("ate_write: invalid ate_index 0x%x", ate_index);
  134. }
  135. ate_index++;
  136. ate += IOPGSIZE;
  137. }
  138. pcireg_tflush_get(pcibus_info); /* wait until Bridge PIO complete */
  139. }
  140. void pcibr_ate_free(struct pcibus_info *pcibus_info, int index)
  141. {
  142. volatile u64 ate;
  143. int count;
  144. unsigned long flags;
  145. if (pcibr_invalidate_ate) {
  146. /* For debugging purposes, clear the valid bit in the ATE */
  147. ate = *pcibr_ate_addr(pcibus_info, index);
  148. count = pcibus_info->pbi_int_ate_resource.ate[index];
  149. ate_write(pcibus_info, index, count, (ate & ~PCI32_ATE_V));
  150. }
  151. spin_lock_irqsave(&pcibus_info->pbi_lock, flags);
  152. free_ate_resource(&pcibus_info->pbi_int_ate_resource, index);
  153. spin_unlock_irqrestore(&pcibus_info->pbi_lock, flags);
  154. }