sys_regs_generic_v8.c 3.0 KB

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  1. /*
  2. * Copyright (C) 2012,2013 - ARM Ltd
  3. * Author: Marc Zyngier <marc.zyngier@arm.com>
  4. *
  5. * Based on arch/arm/kvm/coproc_a15.c:
  6. * Copyright (C) 2012 - Virtual Open Systems and Columbia University
  7. * Authors: Rusty Russell <rusty@rustcorp.au>
  8. * Christoffer Dall <c.dall@virtualopensystems.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  21. */
  22. #include <linux/kvm_host.h>
  23. #include <asm/cputype.h>
  24. #include <asm/kvm_arm.h>
  25. #include <asm/kvm_asm.h>
  26. #include <asm/kvm_host.h>
  27. #include <asm/kvm_emulate.h>
  28. #include <asm/kvm_coproc.h>
  29. #include <asm/sysreg.h>
  30. #include <linux/init.h>
  31. #include "sys_regs.h"
  32. static bool access_actlr(struct kvm_vcpu *vcpu,
  33. struct sys_reg_params *p,
  34. const struct sys_reg_desc *r)
  35. {
  36. if (p->is_write)
  37. return ignore_write(vcpu, p);
  38. p->regval = vcpu_sys_reg(vcpu, ACTLR_EL1);
  39. return true;
  40. }
  41. static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
  42. {
  43. vcpu_sys_reg(vcpu, ACTLR_EL1) = read_sysreg(actlr_el1);
  44. }
  45. /*
  46. * Implementation specific sys-reg registers.
  47. * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
  48. */
  49. static const struct sys_reg_desc genericv8_sys_regs[] = {
  50. /* ACTLR_EL1 */
  51. { Op0(0b11), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
  52. access_actlr, reset_actlr, ACTLR_EL1 },
  53. };
  54. static const struct sys_reg_desc genericv8_cp15_regs[] = {
  55. /* ACTLR */
  56. { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
  57. access_actlr },
  58. };
  59. static struct kvm_sys_reg_target_table genericv8_target_table = {
  60. .table64 = {
  61. .table = genericv8_sys_regs,
  62. .num = ARRAY_SIZE(genericv8_sys_regs),
  63. },
  64. .table32 = {
  65. .table = genericv8_cp15_regs,
  66. .num = ARRAY_SIZE(genericv8_cp15_regs),
  67. },
  68. };
  69. static int __init sys_reg_genericv8_init(void)
  70. {
  71. unsigned int i;
  72. for (i = 1; i < ARRAY_SIZE(genericv8_sys_regs); i++)
  73. BUG_ON(cmp_sys_reg(&genericv8_sys_regs[i-1],
  74. &genericv8_sys_regs[i]) >= 0);
  75. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_AEM_V8,
  76. &genericv8_target_table);
  77. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_FOUNDATION_V8,
  78. &genericv8_target_table);
  79. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A53,
  80. &genericv8_target_table);
  81. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
  82. &genericv8_target_table);
  83. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA,
  84. &genericv8_target_table);
  85. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_GENERIC_V8,
  86. &genericv8_target_table);
  87. return 0;
  88. }
  89. late_initcall(sys_reg_genericv8_init);