process.c 9.7 KB

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  1. /*
  2. * Based on arch/arm/kernel/process.c
  3. *
  4. * Original Copyright (C) 1995 Linus Torvalds
  5. * Copyright (C) 1996-2000 Russell King - Converted to ARM.
  6. * Copyright (C) 2012 ARM Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include <stdarg.h>
  21. #include <linux/compat.h>
  22. #include <linux/efi.h>
  23. #include <linux/export.h>
  24. #include <linux/sched.h>
  25. #include <linux/kernel.h>
  26. #include <linux/mm.h>
  27. #include <linux/stddef.h>
  28. #include <linux/unistd.h>
  29. #include <linux/user.h>
  30. #include <linux/delay.h>
  31. #include <linux/reboot.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/kallsyms.h>
  34. #include <linux/init.h>
  35. #include <linux/cpu.h>
  36. #include <linux/elfcore.h>
  37. #include <linux/pm.h>
  38. #include <linux/tick.h>
  39. #include <linux/utsname.h>
  40. #include <linux/uaccess.h>
  41. #include <linux/random.h>
  42. #include <linux/hw_breakpoint.h>
  43. #include <linux/personality.h>
  44. #include <linux/notifier.h>
  45. #include <trace/events/power.h>
  46. #include <asm/alternative.h>
  47. #include <asm/compat.h>
  48. #include <asm/cacheflush.h>
  49. #include <asm/exec.h>
  50. #include <asm/fpsimd.h>
  51. #include <asm/mmu_context.h>
  52. #include <asm/processor.h>
  53. #include <asm/stacktrace.h>
  54. #ifdef CONFIG_CC_STACKPROTECTOR
  55. #include <linux/stackprotector.h>
  56. unsigned long __stack_chk_guard __read_mostly;
  57. EXPORT_SYMBOL(__stack_chk_guard);
  58. #endif
  59. /*
  60. * Function pointers to optional machine specific functions
  61. */
  62. void (*pm_power_off)(void);
  63. EXPORT_SYMBOL_GPL(pm_power_off);
  64. void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
  65. /*
  66. * This is our default idle handler.
  67. */
  68. void arch_cpu_idle(void)
  69. {
  70. /*
  71. * This should do all the clock switching and wait for interrupt
  72. * tricks
  73. */
  74. trace_cpu_idle_rcuidle(1, smp_processor_id());
  75. cpu_do_idle();
  76. local_irq_enable();
  77. trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
  78. }
  79. #ifdef CONFIG_HOTPLUG_CPU
  80. void arch_cpu_idle_dead(void)
  81. {
  82. cpu_die();
  83. }
  84. #endif
  85. /*
  86. * Called by kexec, immediately prior to machine_kexec().
  87. *
  88. * This must completely disable all secondary CPUs; simply causing those CPUs
  89. * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
  90. * kexec'd kernel to use any and all RAM as it sees fit, without having to
  91. * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
  92. * functionality embodied in disable_nonboot_cpus() to achieve this.
  93. */
  94. void machine_shutdown(void)
  95. {
  96. disable_nonboot_cpus();
  97. }
  98. /*
  99. * Halting simply requires that the secondary CPUs stop performing any
  100. * activity (executing tasks, handling interrupts). smp_send_stop()
  101. * achieves this.
  102. */
  103. void machine_halt(void)
  104. {
  105. local_irq_disable();
  106. smp_send_stop();
  107. while (1);
  108. }
  109. /*
  110. * Power-off simply requires that the secondary CPUs stop performing any
  111. * activity (executing tasks, handling interrupts). smp_send_stop()
  112. * achieves this. When the system power is turned off, it will take all CPUs
  113. * with it.
  114. */
  115. void machine_power_off(void)
  116. {
  117. local_irq_disable();
  118. smp_send_stop();
  119. if (pm_power_off)
  120. pm_power_off();
  121. }
  122. /*
  123. * Restart requires that the secondary CPUs stop performing any activity
  124. * while the primary CPU resets the system. Systems with multiple CPUs must
  125. * provide a HW restart implementation, to ensure that all CPUs reset at once.
  126. * This is required so that any code running after reset on the primary CPU
  127. * doesn't have to co-ordinate with other CPUs to ensure they aren't still
  128. * executing pre-reset code, and using RAM that the primary CPU's code wishes
  129. * to use. Implementing such co-ordination would be essentially impossible.
  130. */
  131. void machine_restart(char *cmd)
  132. {
  133. /* Disable interrupts first */
  134. local_irq_disable();
  135. smp_send_stop();
  136. /*
  137. * UpdateCapsule() depends on the system being reset via
  138. * ResetSystem().
  139. */
  140. if (efi_enabled(EFI_RUNTIME_SERVICES))
  141. efi_reboot(reboot_mode, NULL);
  142. /* Now call the architecture specific reboot code. */
  143. if (arm_pm_restart)
  144. arm_pm_restart(reboot_mode, cmd);
  145. else
  146. do_kernel_restart(cmd);
  147. /*
  148. * Whoops - the architecture was unable to reboot.
  149. */
  150. printk("Reboot failed -- System halted\n");
  151. while (1);
  152. }
  153. void __show_regs(struct pt_regs *regs)
  154. {
  155. int i, top_reg;
  156. u64 lr, sp;
  157. if (compat_user_mode(regs)) {
  158. lr = regs->compat_lr;
  159. sp = regs->compat_sp;
  160. top_reg = 12;
  161. } else {
  162. lr = regs->regs[30];
  163. sp = regs->sp;
  164. top_reg = 29;
  165. }
  166. show_regs_print_info(KERN_DEFAULT);
  167. print_symbol("PC is at %s\n", instruction_pointer(regs));
  168. print_symbol("LR is at %s\n", lr);
  169. printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
  170. regs->pc, lr, regs->pstate);
  171. printk("sp : %016llx\n", sp);
  172. i = top_reg;
  173. while (i >= 0) {
  174. printk("x%-2d: %016llx ", i, regs->regs[i]);
  175. i--;
  176. if (i % 2 == 0) {
  177. pr_cont("x%-2d: %016llx ", i, regs->regs[i]);
  178. i--;
  179. }
  180. pr_cont("\n");
  181. }
  182. printk("\n");
  183. }
  184. void show_regs(struct pt_regs * regs)
  185. {
  186. printk("\n");
  187. __show_regs(regs);
  188. }
  189. static void tls_thread_flush(void)
  190. {
  191. write_sysreg(0, tpidr_el0);
  192. if (is_compat_task()) {
  193. current->thread.tp_value = 0;
  194. /*
  195. * We need to ensure ordering between the shadow state and the
  196. * hardware state, so that we don't corrupt the hardware state
  197. * with a stale shadow state during context switch.
  198. */
  199. barrier();
  200. write_sysreg(0, tpidrro_el0);
  201. }
  202. }
  203. void flush_thread(void)
  204. {
  205. fpsimd_flush_thread();
  206. tls_thread_flush();
  207. flush_ptrace_hw_breakpoint(current);
  208. }
  209. void release_thread(struct task_struct *dead_task)
  210. {
  211. }
  212. int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  213. {
  214. if (current->mm)
  215. fpsimd_preserve_current_state();
  216. *dst = *src;
  217. return 0;
  218. }
  219. asmlinkage void ret_from_fork(void) asm("ret_from_fork");
  220. int copy_thread(unsigned long clone_flags, unsigned long stack_start,
  221. unsigned long stk_sz, struct task_struct *p)
  222. {
  223. struct pt_regs *childregs = task_pt_regs(p);
  224. memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
  225. /*
  226. * In case p was allocated the same task_struct pointer as some
  227. * other recently-exited task, make sure p is disassociated from
  228. * any cpu that may have run that now-exited task recently.
  229. * Otherwise we could erroneously skip reloading the FPSIMD
  230. * registers for p.
  231. */
  232. fpsimd_flush_task_state(p);
  233. if (likely(!(p->flags & PF_KTHREAD))) {
  234. *childregs = *current_pt_regs();
  235. childregs->regs[0] = 0;
  236. /*
  237. * Read the current TLS pointer from tpidr_el0 as it may be
  238. * out-of-sync with the saved value.
  239. */
  240. *task_user_tls(p) = read_sysreg(tpidr_el0);
  241. if (stack_start) {
  242. if (is_compat_thread(task_thread_info(p)))
  243. childregs->compat_sp = stack_start;
  244. else
  245. childregs->sp = stack_start;
  246. }
  247. /*
  248. * If a TLS pointer was passed to clone (4th argument), use it
  249. * for the new thread.
  250. */
  251. if (clone_flags & CLONE_SETTLS)
  252. p->thread.tp_value = childregs->regs[3];
  253. } else {
  254. memset(childregs, 0, sizeof(struct pt_regs));
  255. childregs->pstate = PSR_MODE_EL1h;
  256. if (IS_ENABLED(CONFIG_ARM64_UAO) &&
  257. cpus_have_const_cap(ARM64_HAS_UAO))
  258. childregs->pstate |= PSR_UAO_BIT;
  259. p->thread.cpu_context.x19 = stack_start;
  260. p->thread.cpu_context.x20 = stk_sz;
  261. }
  262. p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
  263. p->thread.cpu_context.sp = (unsigned long)childregs;
  264. ptrace_hw_copy_thread(p);
  265. return 0;
  266. }
  267. static void tls_thread_switch(struct task_struct *next)
  268. {
  269. unsigned long tpidr;
  270. tpidr = read_sysreg(tpidr_el0);
  271. *task_user_tls(current) = tpidr;
  272. if (is_compat_thread(task_thread_info(next)))
  273. write_sysreg(next->thread.tp_value, tpidrro_el0);
  274. else if (!arm64_kernel_unmapped_at_el0())
  275. write_sysreg(0, tpidrro_el0);
  276. write_sysreg(*task_user_tls(next), tpidr_el0);
  277. }
  278. /* Restore the UAO state depending on next's addr_limit */
  279. void uao_thread_switch(struct task_struct *next)
  280. {
  281. if (IS_ENABLED(CONFIG_ARM64_UAO)) {
  282. if (task_thread_info(next)->addr_limit == KERNEL_DS)
  283. asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
  284. else
  285. asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
  286. }
  287. }
  288. /*
  289. * Thread switching.
  290. */
  291. struct task_struct *__switch_to(struct task_struct *prev,
  292. struct task_struct *next)
  293. {
  294. struct task_struct *last;
  295. fpsimd_thread_switch(next);
  296. tls_thread_switch(next);
  297. hw_breakpoint_thread_switch(next);
  298. contextidr_thread_switch(next);
  299. uao_thread_switch(next);
  300. /*
  301. * Complete any pending TLB or cache maintenance on this CPU in case
  302. * the thread migrates to a different CPU.
  303. */
  304. dsb(ish);
  305. /* the actual thread switch */
  306. last = cpu_switch_to(prev, next);
  307. return last;
  308. }
  309. unsigned long get_wchan(struct task_struct *p)
  310. {
  311. struct stackframe frame;
  312. unsigned long stack_page;
  313. int count = 0;
  314. if (!p || p == current || p->state == TASK_RUNNING)
  315. return 0;
  316. frame.fp = thread_saved_fp(p);
  317. frame.sp = thread_saved_sp(p);
  318. frame.pc = thread_saved_pc(p);
  319. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  320. frame.graph = p->curr_ret_stack;
  321. #endif
  322. stack_page = (unsigned long)task_stack_page(p);
  323. do {
  324. if (frame.sp < stack_page ||
  325. frame.sp >= stack_page + THREAD_SIZE ||
  326. unwind_frame(p, &frame))
  327. return 0;
  328. if (!in_sched_functions(frame.pc))
  329. return frame.pc;
  330. } while (count ++ < 16);
  331. return 0;
  332. }
  333. unsigned long arch_align_stack(unsigned long sp)
  334. {
  335. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  336. sp -= get_random_int() & ~PAGE_MASK;
  337. return sp & ~0xf;
  338. }
  339. unsigned long arch_randomize_brk(struct mm_struct *mm)
  340. {
  341. if (is_compat_task())
  342. return randomize_page(mm->brk, 0x02000000);
  343. else
  344. return randomize_page(mm->brk, 0x40000000);
  345. }