devs.c 30 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/amba/pl330.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/serial_s3c.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/io.h>
  23. #include <linux/slab.h>
  24. #include <linux/string.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/fb.h>
  27. #include <linux/gfp.h>
  28. #include <linux/mtd/mtd.h>
  29. #include <linux/mtd/onenand.h>
  30. #include <linux/mtd/partitions.h>
  31. #include <linux/mmc/host.h>
  32. #include <linux/ioport.h>
  33. #include <linux/sizes.h>
  34. #include <linux/platform_data/s3c-hsudc.h>
  35. #include <linux/platform_data/s3c-hsotg.h>
  36. #include <linux/platform_data/dma-s3c24xx.h>
  37. #include <linux/platform_data/media/s5p_hdmi.h>
  38. #include <asm/irq.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/irq.h>
  42. #include <mach/dma.h>
  43. #include <mach/irqs.h>
  44. #include <mach/map.h>
  45. #include <plat/cpu.h>
  46. #include <plat/devs.h>
  47. #include <plat/adc.h>
  48. #include <linux/platform_data/ata-samsung_cf.h>
  49. #include <plat/fb.h>
  50. #include <plat/fb-s3c2410.h>
  51. #include <linux/platform_data/hwmon-s3c.h>
  52. #include <linux/platform_data/i2c-s3c2410.h>
  53. #include <plat/keypad.h>
  54. #include <linux/platform_data/mmc-s3cmci.h>
  55. #include <linux/platform_data/mtd-nand-s3c2410.h>
  56. #include <plat/pwm-core.h>
  57. #include <plat/sdhci.h>
  58. #include <linux/platform_data/touchscreen-s3c2410.h>
  59. #include <linux/platform_data/usb-s3c2410_udc.h>
  60. #include <linux/platform_data/usb-ohci-s3c2410.h>
  61. #include <plat/usb-phy.h>
  62. #include <plat/regs-spi.h>
  63. #include <linux/platform_data/asoc-s3c.h>
  64. #include <linux/platform_data/spi-s3c64xx.h>
  65. #define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
  66. /* AC97 */
  67. #ifdef CONFIG_CPU_S3C2440
  68. static struct resource s3c_ac97_resource[] = {
  69. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  70. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  71. };
  72. static struct s3c_audio_pdata s3c_ac97_pdata = {
  73. #ifdef CONFIG_S3C24XX_DMAC
  74. .dma_filter = s3c24xx_dma_filter,
  75. #endif
  76. .dma_playback = (void *)DMACH_PCM_OUT,
  77. .dma_capture = (void *)DMACH_PCM_IN,
  78. .dma_capture_mic = (void *)DMACH_MIC_IN,
  79. };
  80. struct platform_device s3c_device_ac97 = {
  81. .name = "samsung-ac97",
  82. .id = -1,
  83. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  84. .resource = s3c_ac97_resource,
  85. .dev = {
  86. .dma_mask = &samsung_device_dma_mask,
  87. .coherent_dma_mask = DMA_BIT_MASK(32),
  88. .platform_data = &s3c_ac97_pdata,
  89. }
  90. };
  91. #endif /* CONFIG_CPU_S3C2440 */
  92. /* ADC */
  93. #ifdef CONFIG_PLAT_S3C24XX
  94. static struct resource s3c_adc_resource[] = {
  95. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  96. [1] = DEFINE_RES_IRQ(IRQ_TC),
  97. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  98. };
  99. struct platform_device s3c_device_adc = {
  100. .name = "s3c24xx-adc",
  101. .id = -1,
  102. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  103. .resource = s3c_adc_resource,
  104. };
  105. #endif /* CONFIG_PLAT_S3C24XX */
  106. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  107. static struct resource s3c_adc_resource[] = {
  108. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  109. [1] = DEFINE_RES_IRQ(IRQ_ADC),
  110. [2] = DEFINE_RES_IRQ(IRQ_TC),
  111. };
  112. struct platform_device s3c_device_adc = {
  113. .name = "exynos-adc",
  114. .id = -1,
  115. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  116. .resource = s3c_adc_resource,
  117. };
  118. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  119. /* Camif Controller */
  120. #ifdef CONFIG_CPU_S3C2440
  121. static struct resource s3c_camif_resource[] = {
  122. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  123. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  124. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  125. };
  126. struct platform_device s3c_device_camif = {
  127. .name = "s3c2440-camif",
  128. .id = -1,
  129. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  130. .resource = s3c_camif_resource,
  131. .dev = {
  132. .dma_mask = &samsung_device_dma_mask,
  133. .coherent_dma_mask = DMA_BIT_MASK(32),
  134. }
  135. };
  136. #endif /* CONFIG_CPU_S3C2440 */
  137. /* FB */
  138. #ifdef CONFIG_S3C_DEV_FB
  139. static struct resource s3c_fb_resource[] = {
  140. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  141. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  142. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  143. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  144. };
  145. struct platform_device s3c_device_fb = {
  146. .name = "s3c-fb",
  147. .id = -1,
  148. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  149. .resource = s3c_fb_resource,
  150. .dev = {
  151. .dma_mask = &samsung_device_dma_mask,
  152. .coherent_dma_mask = DMA_BIT_MASK(32),
  153. },
  154. };
  155. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  156. {
  157. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  158. &s3c_device_fb);
  159. }
  160. #endif /* CONFIG_S3C_DEV_FB */
  161. /* HWMON */
  162. #ifdef CONFIG_S3C_DEV_HWMON
  163. struct platform_device s3c_device_hwmon = {
  164. .name = "s3c-hwmon",
  165. .id = -1,
  166. .dev.parent = &s3c_device_adc.dev,
  167. };
  168. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  169. {
  170. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  171. &s3c_device_hwmon);
  172. }
  173. #endif /* CONFIG_S3C_DEV_HWMON */
  174. /* HSMMC */
  175. #ifdef CONFIG_S3C_DEV_HSMMC
  176. static struct resource s3c_hsmmc_resource[] = {
  177. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  178. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  179. };
  180. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  181. .max_width = 4,
  182. .host_caps = (MMC_CAP_4_BIT_DATA |
  183. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  184. };
  185. struct platform_device s3c_device_hsmmc0 = {
  186. .name = "s3c-sdhci",
  187. .id = 0,
  188. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  189. .resource = s3c_hsmmc_resource,
  190. .dev = {
  191. .dma_mask = &samsung_device_dma_mask,
  192. .coherent_dma_mask = DMA_BIT_MASK(32),
  193. .platform_data = &s3c_hsmmc0_def_platdata,
  194. },
  195. };
  196. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  197. {
  198. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  199. }
  200. #endif /* CONFIG_S3C_DEV_HSMMC */
  201. #ifdef CONFIG_S3C_DEV_HSMMC1
  202. static struct resource s3c_hsmmc1_resource[] = {
  203. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  204. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  205. };
  206. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  207. .max_width = 4,
  208. .host_caps = (MMC_CAP_4_BIT_DATA |
  209. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  210. };
  211. struct platform_device s3c_device_hsmmc1 = {
  212. .name = "s3c-sdhci",
  213. .id = 1,
  214. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  215. .resource = s3c_hsmmc1_resource,
  216. .dev = {
  217. .dma_mask = &samsung_device_dma_mask,
  218. .coherent_dma_mask = DMA_BIT_MASK(32),
  219. .platform_data = &s3c_hsmmc1_def_platdata,
  220. },
  221. };
  222. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  223. {
  224. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  225. }
  226. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  227. /* HSMMC2 */
  228. #ifdef CONFIG_S3C_DEV_HSMMC2
  229. static struct resource s3c_hsmmc2_resource[] = {
  230. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  231. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  232. };
  233. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  234. .max_width = 4,
  235. .host_caps = (MMC_CAP_4_BIT_DATA |
  236. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  237. };
  238. struct platform_device s3c_device_hsmmc2 = {
  239. .name = "s3c-sdhci",
  240. .id = 2,
  241. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  242. .resource = s3c_hsmmc2_resource,
  243. .dev = {
  244. .dma_mask = &samsung_device_dma_mask,
  245. .coherent_dma_mask = DMA_BIT_MASK(32),
  246. .platform_data = &s3c_hsmmc2_def_platdata,
  247. },
  248. };
  249. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  250. {
  251. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  252. }
  253. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  254. #ifdef CONFIG_S3C_DEV_HSMMC3
  255. static struct resource s3c_hsmmc3_resource[] = {
  256. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  257. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  258. };
  259. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  260. .max_width = 4,
  261. .host_caps = (MMC_CAP_4_BIT_DATA |
  262. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  263. };
  264. struct platform_device s3c_device_hsmmc3 = {
  265. .name = "s3c-sdhci",
  266. .id = 3,
  267. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  268. .resource = s3c_hsmmc3_resource,
  269. .dev = {
  270. .dma_mask = &samsung_device_dma_mask,
  271. .coherent_dma_mask = DMA_BIT_MASK(32),
  272. .platform_data = &s3c_hsmmc3_def_platdata,
  273. },
  274. };
  275. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  276. {
  277. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  278. }
  279. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  280. /* I2C */
  281. static struct resource s3c_i2c0_resource[] = {
  282. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  283. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  284. };
  285. struct platform_device s3c_device_i2c0 = {
  286. .name = "s3c2410-i2c",
  287. .id = 0,
  288. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  289. .resource = s3c_i2c0_resource,
  290. };
  291. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  292. .flags = 0,
  293. .slave_addr = 0x10,
  294. .frequency = 100*1000,
  295. .sda_delay = 100,
  296. };
  297. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  298. {
  299. struct s3c2410_platform_i2c *npd;
  300. if (!pd) {
  301. pd = &default_i2c_data;
  302. pd->bus_num = 0;
  303. }
  304. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  305. &s3c_device_i2c0);
  306. if (!npd->cfg_gpio)
  307. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  308. }
  309. #ifdef CONFIG_S3C_DEV_I2C1
  310. static struct resource s3c_i2c1_resource[] = {
  311. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  312. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  313. };
  314. struct platform_device s3c_device_i2c1 = {
  315. .name = "s3c2410-i2c",
  316. .id = 1,
  317. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  318. .resource = s3c_i2c1_resource,
  319. };
  320. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  321. {
  322. struct s3c2410_platform_i2c *npd;
  323. if (!pd) {
  324. pd = &default_i2c_data;
  325. pd->bus_num = 1;
  326. }
  327. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  328. &s3c_device_i2c1);
  329. if (!npd->cfg_gpio)
  330. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  331. }
  332. #endif /* CONFIG_S3C_DEV_I2C1 */
  333. #ifdef CONFIG_S3C_DEV_I2C2
  334. static struct resource s3c_i2c2_resource[] = {
  335. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  336. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  337. };
  338. struct platform_device s3c_device_i2c2 = {
  339. .name = "s3c2410-i2c",
  340. .id = 2,
  341. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  342. .resource = s3c_i2c2_resource,
  343. };
  344. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  345. {
  346. struct s3c2410_platform_i2c *npd;
  347. if (!pd) {
  348. pd = &default_i2c_data;
  349. pd->bus_num = 2;
  350. }
  351. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  352. &s3c_device_i2c2);
  353. if (!npd->cfg_gpio)
  354. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  355. }
  356. #endif /* CONFIG_S3C_DEV_I2C2 */
  357. #ifdef CONFIG_S3C_DEV_I2C3
  358. static struct resource s3c_i2c3_resource[] = {
  359. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  360. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  361. };
  362. struct platform_device s3c_device_i2c3 = {
  363. .name = "s3c2440-i2c",
  364. .id = 3,
  365. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  366. .resource = s3c_i2c3_resource,
  367. };
  368. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  369. {
  370. struct s3c2410_platform_i2c *npd;
  371. if (!pd) {
  372. pd = &default_i2c_data;
  373. pd->bus_num = 3;
  374. }
  375. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  376. &s3c_device_i2c3);
  377. if (!npd->cfg_gpio)
  378. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  379. }
  380. #endif /*CONFIG_S3C_DEV_I2C3 */
  381. #ifdef CONFIG_S3C_DEV_I2C4
  382. static struct resource s3c_i2c4_resource[] = {
  383. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  384. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  385. };
  386. struct platform_device s3c_device_i2c4 = {
  387. .name = "s3c2440-i2c",
  388. .id = 4,
  389. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  390. .resource = s3c_i2c4_resource,
  391. };
  392. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  393. {
  394. struct s3c2410_platform_i2c *npd;
  395. if (!pd) {
  396. pd = &default_i2c_data;
  397. pd->bus_num = 4;
  398. }
  399. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  400. &s3c_device_i2c4);
  401. if (!npd->cfg_gpio)
  402. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  403. }
  404. #endif /*CONFIG_S3C_DEV_I2C4 */
  405. #ifdef CONFIG_S3C_DEV_I2C5
  406. static struct resource s3c_i2c5_resource[] = {
  407. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  408. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  409. };
  410. struct platform_device s3c_device_i2c5 = {
  411. .name = "s3c2440-i2c",
  412. .id = 5,
  413. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  414. .resource = s3c_i2c5_resource,
  415. };
  416. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  417. {
  418. struct s3c2410_platform_i2c *npd;
  419. if (!pd) {
  420. pd = &default_i2c_data;
  421. pd->bus_num = 5;
  422. }
  423. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  424. &s3c_device_i2c5);
  425. if (!npd->cfg_gpio)
  426. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  427. }
  428. #endif /*CONFIG_S3C_DEV_I2C5 */
  429. #ifdef CONFIG_S3C_DEV_I2C6
  430. static struct resource s3c_i2c6_resource[] = {
  431. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  432. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  433. };
  434. struct platform_device s3c_device_i2c6 = {
  435. .name = "s3c2440-i2c",
  436. .id = 6,
  437. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  438. .resource = s3c_i2c6_resource,
  439. };
  440. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  441. {
  442. struct s3c2410_platform_i2c *npd;
  443. if (!pd) {
  444. pd = &default_i2c_data;
  445. pd->bus_num = 6;
  446. }
  447. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  448. &s3c_device_i2c6);
  449. if (!npd->cfg_gpio)
  450. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  451. }
  452. #endif /* CONFIG_S3C_DEV_I2C6 */
  453. #ifdef CONFIG_S3C_DEV_I2C7
  454. static struct resource s3c_i2c7_resource[] = {
  455. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  456. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  457. };
  458. struct platform_device s3c_device_i2c7 = {
  459. .name = "s3c2440-i2c",
  460. .id = 7,
  461. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  462. .resource = s3c_i2c7_resource,
  463. };
  464. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  465. {
  466. struct s3c2410_platform_i2c *npd;
  467. if (!pd) {
  468. pd = &default_i2c_data;
  469. pd->bus_num = 7;
  470. }
  471. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  472. &s3c_device_i2c7);
  473. if (!npd->cfg_gpio)
  474. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  475. }
  476. #endif /* CONFIG_S3C_DEV_I2C7 */
  477. /* I2S */
  478. #ifdef CONFIG_PLAT_S3C24XX
  479. static struct resource s3c_iis_resource[] = {
  480. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  481. };
  482. static struct s3c_audio_pdata s3c_iis_platdata = {
  483. #ifdef CONFIG_S3C24XX_DMAC
  484. .dma_filter = s3c24xx_dma_filter,
  485. #endif
  486. .dma_playback = (void *)DMACH_I2S_OUT,
  487. .dma_capture = (void *)DMACH_I2S_IN,
  488. };
  489. struct platform_device s3c_device_iis = {
  490. .name = "s3c24xx-iis",
  491. .id = -1,
  492. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  493. .resource = s3c_iis_resource,
  494. .dev = {
  495. .dma_mask = &samsung_device_dma_mask,
  496. .coherent_dma_mask = DMA_BIT_MASK(32),
  497. .platform_data = &s3c_iis_platdata,
  498. }
  499. };
  500. #endif /* CONFIG_PLAT_S3C24XX */
  501. /* IDE CFCON */
  502. #ifdef CONFIG_SAMSUNG_DEV_IDE
  503. static struct resource s3c_cfcon_resource[] = {
  504. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  505. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  506. };
  507. struct platform_device s3c_device_cfcon = {
  508. .id = 0,
  509. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  510. .resource = s3c_cfcon_resource,
  511. };
  512. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  513. {
  514. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  515. &s3c_device_cfcon);
  516. }
  517. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  518. /* KEYPAD */
  519. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  520. static struct resource samsung_keypad_resources[] = {
  521. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  522. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  523. };
  524. struct platform_device samsung_device_keypad = {
  525. .name = "samsung-keypad",
  526. .id = -1,
  527. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  528. .resource = samsung_keypad_resources,
  529. };
  530. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  531. {
  532. struct samsung_keypad_platdata *npd;
  533. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  534. &samsung_device_keypad);
  535. if (!npd->cfg_gpio)
  536. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  537. }
  538. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  539. /* LCD Controller */
  540. #ifdef CONFIG_PLAT_S3C24XX
  541. static struct resource s3c_lcd_resource[] = {
  542. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  543. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  544. };
  545. struct platform_device s3c_device_lcd = {
  546. .name = "s3c2410-lcd",
  547. .id = -1,
  548. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  549. .resource = s3c_lcd_resource,
  550. .dev = {
  551. .dma_mask = &samsung_device_dma_mask,
  552. .coherent_dma_mask = DMA_BIT_MASK(32),
  553. }
  554. };
  555. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  556. {
  557. struct s3c2410fb_mach_info *npd;
  558. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  559. if (npd) {
  560. npd->displays = kmemdup(pd->displays,
  561. sizeof(struct s3c2410fb_display) * npd->num_displays,
  562. GFP_KERNEL);
  563. if (!npd->displays)
  564. printk(KERN_ERR "no memory for LCD display data\n");
  565. } else {
  566. printk(KERN_ERR "no memory for LCD platform data\n");
  567. }
  568. }
  569. #endif /* CONFIG_PLAT_S3C24XX */
  570. /* NAND */
  571. #ifdef CONFIG_S3C_DEV_NAND
  572. static struct resource s3c_nand_resource[] = {
  573. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  574. };
  575. struct platform_device s3c_device_nand = {
  576. .name = "s3c2410-nand",
  577. .id = -1,
  578. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  579. .resource = s3c_nand_resource,
  580. };
  581. /*
  582. * s3c_nand_copy_set() - copy nand set data
  583. * @set: The new structure, directly copied from the old.
  584. *
  585. * Copy all the fields from the NAND set field from what is probably __initdata
  586. * to new kernel memory. The code returns 0 if the copy happened correctly or
  587. * an error code for the calling function to display.
  588. *
  589. * Note, we currently do not try and look to see if we've already copied the
  590. * data in a previous set.
  591. */
  592. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  593. {
  594. void *ptr;
  595. int size;
  596. size = sizeof(struct mtd_partition) * set->nr_partitions;
  597. if (size) {
  598. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  599. set->partitions = ptr;
  600. if (!ptr)
  601. return -ENOMEM;
  602. }
  603. if (set->nr_map && set->nr_chips) {
  604. size = sizeof(int) * set->nr_chips;
  605. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  606. set->nr_map = ptr;
  607. if (!ptr)
  608. return -ENOMEM;
  609. }
  610. return 0;
  611. }
  612. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  613. {
  614. struct s3c2410_platform_nand *npd;
  615. int size;
  616. int ret;
  617. /* note, if we get a failure in allocation, we simply drop out of the
  618. * function. If there is so little memory available at initialisation
  619. * time then there is little chance the system is going to run.
  620. */
  621. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  622. &s3c_device_nand);
  623. if (!npd)
  624. return;
  625. /* now see if we need to copy any of the nand set data */
  626. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  627. if (size) {
  628. struct s3c2410_nand_set *from = npd->sets;
  629. struct s3c2410_nand_set *to;
  630. int i;
  631. to = kmemdup(from, size, GFP_KERNEL);
  632. npd->sets = to; /* set, even if we failed */
  633. if (!to) {
  634. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  635. return;
  636. }
  637. for (i = 0; i < npd->nr_sets; i++) {
  638. ret = s3c_nand_copy_set(to);
  639. if (ret) {
  640. printk(KERN_ERR "%s: failed to copy set %d\n",
  641. __func__, i);
  642. return;
  643. }
  644. to++;
  645. }
  646. }
  647. }
  648. #endif /* CONFIG_S3C_DEV_NAND */
  649. /* ONENAND */
  650. #ifdef CONFIG_S3C_DEV_ONENAND
  651. static struct resource s3c_onenand_resources[] = {
  652. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  653. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  654. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  655. };
  656. struct platform_device s3c_device_onenand = {
  657. .name = "samsung-onenand",
  658. .id = 0,
  659. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  660. .resource = s3c_onenand_resources,
  661. };
  662. #endif /* CONFIG_S3C_DEV_ONENAND */
  663. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  664. static struct resource s3c64xx_onenand1_resources[] = {
  665. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  666. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  667. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  668. };
  669. struct platform_device s3c64xx_device_onenand1 = {
  670. .name = "samsung-onenand",
  671. .id = 1,
  672. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  673. .resource = s3c64xx_onenand1_resources,
  674. };
  675. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  676. {
  677. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  678. &s3c64xx_device_onenand1);
  679. }
  680. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  681. /* PWM Timer */
  682. #ifdef CONFIG_SAMSUNG_DEV_PWM
  683. static struct resource samsung_pwm_resource[] = {
  684. DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
  685. };
  686. struct platform_device samsung_device_pwm = {
  687. .name = "samsung-pwm",
  688. .id = -1,
  689. .num_resources = ARRAY_SIZE(samsung_pwm_resource),
  690. .resource = samsung_pwm_resource,
  691. };
  692. void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
  693. {
  694. samsung_device_pwm.dev.platform_data = pd;
  695. }
  696. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  697. /* RTC */
  698. #ifdef CONFIG_PLAT_S3C24XX
  699. static struct resource s3c_rtc_resource[] = {
  700. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  701. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  702. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  703. };
  704. struct platform_device s3c_device_rtc = {
  705. .name = "s3c2410-rtc",
  706. .id = -1,
  707. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  708. .resource = s3c_rtc_resource,
  709. };
  710. #endif /* CONFIG_PLAT_S3C24XX */
  711. #ifdef CONFIG_S3C_DEV_RTC
  712. static struct resource s3c_rtc_resource[] = {
  713. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  714. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  715. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  716. };
  717. struct platform_device s3c_device_rtc = {
  718. .name = "s3c64xx-rtc",
  719. .id = -1,
  720. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  721. .resource = s3c_rtc_resource,
  722. };
  723. #endif /* CONFIG_S3C_DEV_RTC */
  724. /* SDI */
  725. #ifdef CONFIG_PLAT_S3C24XX
  726. static struct resource s3c_sdi_resource[] = {
  727. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  728. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  729. };
  730. struct platform_device s3c_device_sdi = {
  731. .name = "s3c2410-sdi",
  732. .id = -1,
  733. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  734. .resource = s3c_sdi_resource,
  735. };
  736. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  737. {
  738. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  739. &s3c_device_sdi);
  740. }
  741. #endif /* CONFIG_PLAT_S3C24XX */
  742. /* SPI */
  743. #ifdef CONFIG_PLAT_S3C24XX
  744. static struct resource s3c_spi0_resource[] = {
  745. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  746. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  747. };
  748. struct platform_device s3c_device_spi0 = {
  749. .name = "s3c2410-spi",
  750. .id = 0,
  751. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  752. .resource = s3c_spi0_resource,
  753. .dev = {
  754. .dma_mask = &samsung_device_dma_mask,
  755. .coherent_dma_mask = DMA_BIT_MASK(32),
  756. }
  757. };
  758. static struct resource s3c_spi1_resource[] = {
  759. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  760. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  761. };
  762. struct platform_device s3c_device_spi1 = {
  763. .name = "s3c2410-spi",
  764. .id = 1,
  765. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  766. .resource = s3c_spi1_resource,
  767. .dev = {
  768. .dma_mask = &samsung_device_dma_mask,
  769. .coherent_dma_mask = DMA_BIT_MASK(32),
  770. }
  771. };
  772. #endif /* CONFIG_PLAT_S3C24XX */
  773. /* Touchscreen */
  774. #ifdef CONFIG_PLAT_S3C24XX
  775. static struct resource s3c_ts_resource[] = {
  776. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  777. [1] = DEFINE_RES_IRQ(IRQ_TC),
  778. };
  779. struct platform_device s3c_device_ts = {
  780. .name = "s3c2410-ts",
  781. .id = -1,
  782. .dev.parent = &s3c_device_adc.dev,
  783. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  784. .resource = s3c_ts_resource,
  785. };
  786. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  787. {
  788. s3c_set_platdata(hard_s3c2410ts_info,
  789. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  790. }
  791. #endif /* CONFIG_PLAT_S3C24XX */
  792. #ifdef CONFIG_SAMSUNG_DEV_TS
  793. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  794. .delay = 10000,
  795. .presc = 49,
  796. .oversampling_shift = 2,
  797. };
  798. void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  799. {
  800. if (!pd)
  801. pd = &default_ts_data;
  802. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  803. &s3c_device_adc);
  804. }
  805. #endif /* CONFIG_SAMSUNG_DEV_TS */
  806. /* USB */
  807. #ifdef CONFIG_S3C_DEV_USB_HOST
  808. static struct resource s3c_usb_resource[] = {
  809. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  810. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  811. };
  812. struct platform_device s3c_device_ohci = {
  813. .name = "s3c2410-ohci",
  814. .id = -1,
  815. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  816. .resource = s3c_usb_resource,
  817. .dev = {
  818. .dma_mask = &samsung_device_dma_mask,
  819. .coherent_dma_mask = DMA_BIT_MASK(32),
  820. }
  821. };
  822. /*
  823. * s3c_ohci_set_platdata - initialise OHCI device platform data
  824. * @info: The platform data.
  825. *
  826. * This call copies the @info passed in and sets the device .platform_data
  827. * field to that copy. The @info is copied so that the original can be marked
  828. * __initdata.
  829. */
  830. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  831. {
  832. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  833. &s3c_device_ohci);
  834. }
  835. #endif /* CONFIG_S3C_DEV_USB_HOST */
  836. /* USB Device (Gadget) */
  837. #ifdef CONFIG_PLAT_S3C24XX
  838. static struct resource s3c_usbgadget_resource[] = {
  839. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  840. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  841. };
  842. struct platform_device s3c_device_usbgadget = {
  843. .name = "s3c2410-usbgadget",
  844. .id = -1,
  845. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  846. .resource = s3c_usbgadget_resource,
  847. };
  848. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  849. {
  850. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  851. }
  852. #endif /* CONFIG_PLAT_S3C24XX */
  853. /* USB HSOTG */
  854. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  855. static struct resource s3c_usb_hsotg_resources[] = {
  856. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  857. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  858. };
  859. struct platform_device s3c_device_usb_hsotg = {
  860. .name = "s3c-hsotg",
  861. .id = -1,
  862. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  863. .resource = s3c_usb_hsotg_resources,
  864. .dev = {
  865. .dma_mask = &samsung_device_dma_mask,
  866. .coherent_dma_mask = DMA_BIT_MASK(32),
  867. },
  868. };
  869. void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
  870. {
  871. struct dwc2_hsotg_plat *npd;
  872. npd = s3c_set_platdata(pd, sizeof(struct dwc2_hsotg_plat),
  873. &s3c_device_usb_hsotg);
  874. if (!npd->phy_init)
  875. npd->phy_init = s5p_usb_phy_init;
  876. if (!npd->phy_exit)
  877. npd->phy_exit = s5p_usb_phy_exit;
  878. }
  879. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  880. /* USB High Spped 2.0 Device (Gadget) */
  881. #ifdef CONFIG_PLAT_S3C24XX
  882. static struct resource s3c_hsudc_resource[] = {
  883. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  884. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  885. };
  886. struct platform_device s3c_device_usb_hsudc = {
  887. .name = "s3c-hsudc",
  888. .id = -1,
  889. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  890. .resource = s3c_hsudc_resource,
  891. .dev = {
  892. .dma_mask = &samsung_device_dma_mask,
  893. .coherent_dma_mask = DMA_BIT_MASK(32),
  894. },
  895. };
  896. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  897. {
  898. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  899. }
  900. #endif /* CONFIG_PLAT_S3C24XX */
  901. /* WDT */
  902. #ifdef CONFIG_S3C_DEV_WDT
  903. static struct resource s3c_wdt_resource[] = {
  904. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  905. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  906. };
  907. struct platform_device s3c_device_wdt = {
  908. .name = "s3c2410-wdt",
  909. .id = -1,
  910. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  911. .resource = s3c_wdt_resource,
  912. };
  913. #endif /* CONFIG_S3C_DEV_WDT */
  914. #ifdef CONFIG_S3C64XX_DEV_SPI0
  915. static struct resource s3c64xx_spi0_resource[] = {
  916. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  917. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  918. };
  919. struct platform_device s3c64xx_device_spi0 = {
  920. .name = "s3c6410-spi",
  921. .id = 0,
  922. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  923. .resource = s3c64xx_spi0_resource,
  924. .dev = {
  925. .dma_mask = &samsung_device_dma_mask,
  926. .coherent_dma_mask = DMA_BIT_MASK(32),
  927. },
  928. };
  929. void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  930. int num_cs)
  931. {
  932. struct s3c64xx_spi_info pd;
  933. /* Reject invalid configuration */
  934. if (!num_cs || src_clk_nr < 0) {
  935. pr_err("%s: Invalid SPI configuration\n", __func__);
  936. return;
  937. }
  938. pd.num_cs = num_cs;
  939. pd.src_clk_nr = src_clk_nr;
  940. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
  941. pd.dma_tx = (void *)DMACH_SPI0_TX;
  942. pd.dma_rx = (void *)DMACH_SPI0_RX;
  943. #if defined(CONFIG_PL330_DMA)
  944. pd.filter = pl330_filter;
  945. #elif defined(CONFIG_S3C64XX_PL080)
  946. pd.filter = pl08x_filter_id;
  947. #elif defined(CONFIG_S3C24XX_DMAC)
  948. pd.filter = s3c24xx_dma_filter;
  949. #endif
  950. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  951. }
  952. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  953. #ifdef CONFIG_S3C64XX_DEV_SPI1
  954. static struct resource s3c64xx_spi1_resource[] = {
  955. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  956. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  957. };
  958. struct platform_device s3c64xx_device_spi1 = {
  959. .name = "s3c6410-spi",
  960. .id = 1,
  961. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  962. .resource = s3c64xx_spi1_resource,
  963. .dev = {
  964. .dma_mask = &samsung_device_dma_mask,
  965. .coherent_dma_mask = DMA_BIT_MASK(32),
  966. },
  967. };
  968. void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  969. int num_cs)
  970. {
  971. struct s3c64xx_spi_info pd;
  972. /* Reject invalid configuration */
  973. if (!num_cs || src_clk_nr < 0) {
  974. pr_err("%s: Invalid SPI configuration\n", __func__);
  975. return;
  976. }
  977. pd.num_cs = num_cs;
  978. pd.src_clk_nr = src_clk_nr;
  979. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
  980. pd.dma_tx = (void *)DMACH_SPI1_TX;
  981. pd.dma_rx = (void *)DMACH_SPI1_RX;
  982. #if defined(CONFIG_PL330_DMA)
  983. pd.filter = pl330_filter;
  984. #elif defined(CONFIG_S3C64XX_PL080)
  985. pd.filter = pl08x_filter_id;
  986. #endif
  987. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
  988. }
  989. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  990. #ifdef CONFIG_S3C64XX_DEV_SPI2
  991. static struct resource s3c64xx_spi2_resource[] = {
  992. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  993. [1] = DEFINE_RES_IRQ(IRQ_SPI2),
  994. };
  995. struct platform_device s3c64xx_device_spi2 = {
  996. .name = "s3c6410-spi",
  997. .id = 2,
  998. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  999. .resource = s3c64xx_spi2_resource,
  1000. .dev = {
  1001. .dma_mask = &samsung_device_dma_mask,
  1002. .coherent_dma_mask = DMA_BIT_MASK(32),
  1003. },
  1004. };
  1005. void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1006. int num_cs)
  1007. {
  1008. struct s3c64xx_spi_info pd;
  1009. /* Reject invalid configuration */
  1010. if (!num_cs || src_clk_nr < 0) {
  1011. pr_err("%s: Invalid SPI configuration\n", __func__);
  1012. return;
  1013. }
  1014. pd.num_cs = num_cs;
  1015. pd.src_clk_nr = src_clk_nr;
  1016. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
  1017. pd.dma_tx = (void *)DMACH_SPI2_TX;
  1018. pd.dma_rx = (void *)DMACH_SPI2_RX;
  1019. #if defined(CONFIG_PL330_DMA)
  1020. pd.filter = pl330_filter;
  1021. #elif defined(CONFIG_S3C64XX_PL080)
  1022. pd.filter = pl08x_filter_id;
  1023. #endif
  1024. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
  1025. }
  1026. #endif /* CONFIG_S3C64XX_DEV_SPI2 */