irq-pm.c 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125
  1. /* arch/arm/plat-s3c64xx/irq-pm.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * S3C64XX - Interrupt handling Power Management
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. /*
  15. * NOTE: Code in this file is not used when booting with Device Tree support.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/syscore_ops.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/serial_s3c.h>
  22. #include <linux/irq.h>
  23. #include <linux/io.h>
  24. #include <linux/of.h>
  25. #include <mach/map.h>
  26. #include <mach/regs-gpio.h>
  27. #include <plat/cpu.h>
  28. #include <plat/pm.h>
  29. /* We handled all the IRQ types in this code, to save having to make several
  30. * small files to handle each different type separately. Having the EINT_GRP
  31. * code here shouldn't be as much bloat as the IRQ table space needed when
  32. * they are enabled. The added benefit is we ensure that these registers are
  33. * in the same state as we suspended.
  34. */
  35. static struct sleep_save irq_save[] = {
  36. SAVE_ITEM(S3C64XX_PRIORITY),
  37. SAVE_ITEM(S3C64XX_EINT0CON0),
  38. SAVE_ITEM(S3C64XX_EINT0CON1),
  39. SAVE_ITEM(S3C64XX_EINT0FLTCON0),
  40. SAVE_ITEM(S3C64XX_EINT0FLTCON1),
  41. SAVE_ITEM(S3C64XX_EINT0FLTCON2),
  42. SAVE_ITEM(S3C64XX_EINT0FLTCON3),
  43. SAVE_ITEM(S3C64XX_EINT0MASK),
  44. };
  45. static struct irq_grp_save {
  46. u32 fltcon;
  47. u32 con;
  48. u32 mask;
  49. } eint_grp_save[5];
  50. #ifndef CONFIG_SERIAL_SAMSUNG_UARTS
  51. #define SERIAL_SAMSUNG_UARTS 0
  52. #else
  53. #define SERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
  54. #endif
  55. static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];
  56. static int s3c64xx_irq_pm_suspend(void)
  57. {
  58. struct irq_grp_save *grp = eint_grp_save;
  59. int i;
  60. S3C_PMDBG("%s: suspending IRQs\n", __func__);
  61. s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
  62. for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
  63. irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
  64. for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
  65. grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
  66. grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
  67. grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
  68. }
  69. return 0;
  70. }
  71. static void s3c64xx_irq_pm_resume(void)
  72. {
  73. struct irq_grp_save *grp = eint_grp_save;
  74. int i;
  75. S3C_PMDBG("%s: resuming IRQs\n", __func__);
  76. s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
  77. for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
  78. __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
  79. for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
  80. __raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
  81. __raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
  82. __raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
  83. }
  84. S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
  85. }
  86. static struct syscore_ops s3c64xx_irq_syscore_ops = {
  87. .suspend = s3c64xx_irq_pm_suspend,
  88. .resume = s3c64xx_irq_pm_resume,
  89. };
  90. static __init int s3c64xx_syscore_init(void)
  91. {
  92. /* Appropriate drivers (pinctrl, uart) handle this when using DT. */
  93. if (of_have_populated_dt() || !soc_is_s3c64xx())
  94. return 0;
  95. register_syscore_ops(&s3c64xx_irq_syscore_ops);
  96. return 0;
  97. }
  98. core_initcall(s3c64xx_syscore_init);