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sleep-s3c2410.S

sleep-s3c2410.S 2.0 KB
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  1. /* linux/arch/arm/mach-s3c2410/sleep.S
    2. 

  2.  *
    3. 

  3.  * Copyright (c) 2004 Simtec Electronics
    4. 

  4.  *	Ben Dooks <ben@simtec.co.uk>
    5. 

  5.  *
    6. 

  6.  * S3C2410 Power Manager (Suspend-To-RAM) support
    7. 

  7.  *
    8. 

  8.  * Based on PXA/SA1100 sleep code by:
    9. 

  9.  *	Nicolas Pitre, (c) 2002 Monta Vista Software Inc
    10. 

  10.  *	Cliff Brake, (c) 2001
    11. 

  11.  *
    12. 

  12.  * This program is free software; you can redistribute it and/or modify
    13. 

  13.  * it under the terms of the GNU General Public License as published by
    14. 

  14.  * the Free Software Foundation; either version 2 of the License, or
    15. 

  15.  * (at your option) any later version.
    16. 

  16.  *
    17. 

  17.  * This program is distributed in the hope that it will be useful,
    18. 

  18.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    19. 

  19.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    20. 

  20.  * GNU General Public License for more details.
    21. 

  21.  *
    22. 

  22.  * You should have received a copy of the GNU General Public License
    23. 

  23.  * along with this program; if not, write to the Free Software
    24. 

  24.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    25. 

  25. */
    26. 

  26. 

  27. #include <linux/linkage.h>
    28. 

  28. #include <linux/serial_s3c.h>
    29. 

  29. #include <asm/assembler.h>
    30. 

  30. #include <mach/hardware.h>
    31. 

  31. #include <mach/map.h>
    32. 

  32. 

  33. #include <mach/regs-gpio.h>
    34. 

  34. #include <mach/regs-clock.h>
    35. 

  35. 

  36. #include "regs-mem.h"
    37. 

  37. 

  38. 	/* s3c2410_cpu_suspend
    39. 

  39. 	 *
    40. 

  40. 	 * put the cpu into sleep mode
    41. 

  41. 	*/
    42. 

  42. 

  43. ENTRY(s3c2410_cpu_suspend)
    44. 

  44. 	@@ prepare cpu to sleep
    45. 

  45. 

  46. 	ldr	r4, =S3C2410_REFRESH
    47. 

  47. 	ldr	r5, =S3C24XX_MISCCR
    48. 

  48. 	ldr	r6, =S3C2410_CLKCON
    49. 

  49. 	ldr	r7, [r4]		@ get REFRESH (and ensure in TLB)
    50. 

  50. 	ldr	r8, [r5]		@ get MISCCR (and ensure in TLB)
    51. 

  51. 	ldr	r9, [r6]		@ get CLKCON (and ensure in TLB)
    52. 

  52. 

  53. 	orr	r7, r7, #S3C2410_REFRESH_SELF	@ SDRAM sleep command
    54. 

  54. 	orr	r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
    55. 

  55. 	orr	r9, r9, #S3C2410_CLKCON_POWER	@ power down command
    56. 

  56. 

  57. 	teq	pc, #0			@ first as a trial-run to load cache
    58. 

  58. 	bl	s3c2410_do_sleep
    59. 

  59. 	teq	r0, r0			@ now do it for real
    60. 

  60. 	b	s3c2410_do_sleep	@
    61. 

  61. 

  62. 	@@ align next bit of code to cache line
    63. 

  63. 	.align	5
    64. 

  64. s3c2410_do_sleep:
    65. 

  65. 	streq	r7, [r4]			@ SDRAM sleep command
    66. 

  66. 	streq	r8, [r5]			@ SDRAM power-down config
    67. 

  67. 	streq	r9, [r6]			@ CPU sleep
    68. 

  68. 1:	beq	1b
    69. 

  69. 	ret	lr
    70. 

  70.