vc.h 4.5 KB

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  1. /*
  2. * OMAP3/4 Voltage Controller (VC) structure and macro definitions
  3. *
  4. * Copyright (C) 2007, 2010 Texas Instruments, Inc.
  5. * Rajendra Nayak <rnayak@ti.com>
  6. * Lesly A M <x0080970@ti.com>
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008, 2011 Nokia Corporation
  10. * Kalle Jokiniemi
  11. * Paul Walmsley
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License version
  15. * 2 as published by the Free Software Foundation.
  16. */
  17. #ifndef __ARCH_ARM_MACH_OMAP2_VC_H
  18. #define __ARCH_ARM_MACH_OMAP2_VC_H
  19. #include <linux/kernel.h>
  20. struct voltagedomain;
  21. /**
  22. * struct omap_vc_common - per-VC register/bitfield data
  23. * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
  24. * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
  25. * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
  26. * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
  27. * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
  28. * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
  29. * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
  30. * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
  31. * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
  32. * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
  33. * @i2c_cfg_reg: I2C configuration register offset
  34. * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register
  35. * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
  36. * @i2c_mcode_mask: MCODE field mask for I2C config register
  37. *
  38. * XXX One of cmd_on_mask and cmd_on_shift are not needed
  39. * XXX VALID should probably be a shift, not a mask
  40. */
  41. struct omap_vc_common {
  42. u32 cmd_on_mask;
  43. u32 valid;
  44. u8 bypass_val_reg;
  45. u8 data_shift;
  46. u8 slaveaddr_shift;
  47. u8 regaddr_shift;
  48. u8 cmd_on_shift;
  49. u8 cmd_onlp_shift;
  50. u8 cmd_ret_shift;
  51. u8 cmd_off_shift;
  52. u8 i2c_cfg_reg;
  53. u8 i2c_cfg_clear_mask;
  54. u8 i2c_cfg_hsen_mask;
  55. u8 i2c_mcode_mask;
  56. };
  57. /* omap_vc_channel.flags values */
  58. #define OMAP_VC_CHANNEL_DEFAULT BIT(0)
  59. #define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1)
  60. /**
  61. * struct omap_vc_channel - VC per-instance data
  62. * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
  63. * @volt_reg_addr: voltage configuration register address
  64. * @cmd_reg_addr: command configuration register address
  65. * @setup_time: setup time (in sys_clk cycles) of regulator for this channel
  66. * @cfg_channel: current value of VC channel configuration register
  67. * @i2c_high_speed: whether or not to use I2C high-speed mode
  68. *
  69. * @common: pointer to VC common data for this platform
  70. * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
  71. * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
  72. * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
  73. * @cmdval_reg: register for on/ret/off voltage level values for this channel
  74. * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
  75. * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
  76. * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start
  77. * @cfg_channel_reg: VC channel configuration register
  78. * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register
  79. * @flags: VC channel-specific flags (optional)
  80. */
  81. struct omap_vc_channel {
  82. /* channel state */
  83. u16 i2c_slave_addr;
  84. u16 volt_reg_addr;
  85. u16 cmd_reg_addr;
  86. u8 cfg_channel;
  87. bool i2c_high_speed;
  88. /* register access data */
  89. const struct omap_vc_common *common;
  90. u32 smps_sa_mask;
  91. u32 smps_volra_mask;
  92. u32 smps_cmdra_mask;
  93. u8 cmdval_reg;
  94. u8 smps_sa_reg;
  95. u8 smps_volra_reg;
  96. u8 smps_cmdra_reg;
  97. u8 cfg_channel_reg;
  98. u8 cfg_channel_sa_shift;
  99. u8 flags;
  100. };
  101. extern struct omap_vc_channel omap3_vc_mpu;
  102. extern struct omap_vc_channel omap3_vc_core;
  103. extern struct omap_vc_channel omap4_vc_mpu;
  104. extern struct omap_vc_channel omap4_vc_iva;
  105. extern struct omap_vc_channel omap4_vc_core;
  106. extern struct omap_vc_param omap3_mpu_vc_data;
  107. extern struct omap_vc_param omap3_core_vc_data;
  108. extern struct omap_vc_param omap4_mpu_vc_data;
  109. extern struct omap_vc_param omap4_iva_vc_data;
  110. extern struct omap_vc_param omap4_core_vc_data;
  111. void omap3_vc_set_pmic_signaling(int core_next_state);
  112. void omap_vc_init_channel(struct voltagedomain *voltdm);
  113. int omap_vc_pre_scale(struct voltagedomain *voltdm,
  114. unsigned long target_volt,
  115. u8 *target_vsel, u8 *current_vsel);
  116. void omap_vc_post_scale(struct voltagedomain *voltdm,
  117. unsigned long target_volt,
  118. u8 target_vsel, u8 current_vsel);
  119. int omap_vc_bypass_scale(struct voltagedomain *voltdm,
  120. unsigned long target_volt);
  121. #endif