prm2xxx.c 6.2 KB

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  1. /*
  2. * OMAP2xxx PRM module functions
  3. *
  4. * Copyright (C) 2010-2012 Texas Instruments, Inc.
  5. * Copyright (C) 2010 Nokia Corporation
  6. * Benoît Cousson
  7. * Paul Walmsley
  8. * Rajendra Nayak <rnayak@ti.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <linux/irq.h>
  19. #include "powerdomain.h"
  20. #include "clockdomain.h"
  21. #include "prm2xxx.h"
  22. #include "cm2xxx_3xxx.h"
  23. #include "prm-regbits-24xx.h"
  24. /*
  25. * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
  26. * these are reversed from the bits used on OMAP3+
  27. */
  28. #define OMAP24XX_PWRDM_POWER_ON 0x0
  29. #define OMAP24XX_PWRDM_POWER_RET 0x1
  30. #define OMAP24XX_PWRDM_POWER_OFF 0x3
  31. /*
  32. * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
  33. * hardware register (which are specific to the OMAP2xxx SoCs) to
  34. * reset source ID bit shifts (which is an OMAP SoC-independent
  35. * enumeration)
  36. */
  37. static struct prm_reset_src_map omap2xxx_prm_reset_src_map[] = {
  38. { OMAP_GLOBALCOLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
  39. { OMAP_GLOBALWARM_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
  40. { OMAP24XX_SECU_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
  41. { OMAP24XX_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT },
  42. { OMAP24XX_SECU_WD_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT },
  43. { OMAP24XX_EXTWMPU_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT },
  44. { -1, -1 },
  45. };
  46. /**
  47. * omap2xxx_prm_read_reset_sources - return the last SoC reset source
  48. *
  49. * Return a u32 representing the last reset sources of the SoC. The
  50. * returned reset source bits are standardized across OMAP SoCs.
  51. */
  52. static u32 omap2xxx_prm_read_reset_sources(void)
  53. {
  54. struct prm_reset_src_map *p;
  55. u32 r = 0;
  56. u32 v;
  57. v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST);
  58. p = omap2xxx_prm_reset_src_map;
  59. while (p->reg_shift >= 0 && p->std_shift >= 0) {
  60. if (v & (1 << p->reg_shift))
  61. r |= 1 << p->std_shift;
  62. p++;
  63. }
  64. return r;
  65. }
  66. /**
  67. * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
  68. * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
  69. *
  70. * Return the common power state bits corresponding to the OMAP2xxx
  71. * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
  72. */
  73. static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
  74. {
  75. u8 pwrst;
  76. switch (omap2xxx_pwrst) {
  77. case OMAP24XX_PWRDM_POWER_OFF:
  78. pwrst = PWRDM_POWER_OFF;
  79. break;
  80. case OMAP24XX_PWRDM_POWER_RET:
  81. pwrst = PWRDM_POWER_RET;
  82. break;
  83. case OMAP24XX_PWRDM_POWER_ON:
  84. pwrst = PWRDM_POWER_ON;
  85. break;
  86. default:
  87. return -EINVAL;
  88. }
  89. return pwrst;
  90. }
  91. /**
  92. * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
  93. *
  94. * Set the DPLL reset bit, which should reboot the SoC. This is the
  95. * recommended way to restart the SoC. No return value.
  96. */
  97. static void omap2xxx_prm_dpll_reset(void)
  98. {
  99. omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
  100. OMAP2_RM_RSTCTRL);
  101. /* OCP barrier */
  102. omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
  103. }
  104. /**
  105. * omap2xxx_prm_clear_mod_irqs - clear wakeup status bits for a module
  106. * @module: PRM module to clear wakeups from
  107. * @regs: register offset to clear
  108. * @wkst_mask: wakeup status mask to clear
  109. *
  110. * Clears wakeup status bits for a given module, so that the device can
  111. * re-enter idle.
  112. */
  113. static int omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
  114. {
  115. u32 wkst;
  116. wkst = omap2_prm_read_mod_reg(module, regs);
  117. wkst &= wkst_mask;
  118. omap2_prm_write_mod_reg(wkst, module, regs);
  119. return 0;
  120. }
  121. int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
  122. {
  123. omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
  124. clkdm->pwrdm.ptr->prcm_offs,
  125. OMAP2_PM_PWSTCTRL);
  126. return 0;
  127. }
  128. int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
  129. {
  130. omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
  131. clkdm->pwrdm.ptr->prcm_offs,
  132. OMAP2_PM_PWSTCTRL);
  133. return 0;
  134. }
  135. static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
  136. {
  137. u8 omap24xx_pwrst;
  138. switch (pwrst) {
  139. case PWRDM_POWER_OFF:
  140. omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
  141. break;
  142. case PWRDM_POWER_RET:
  143. omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
  144. break;
  145. case PWRDM_POWER_ON:
  146. omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
  147. break;
  148. default:
  149. return -EINVAL;
  150. }
  151. omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
  152. (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
  153. pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
  154. return 0;
  155. }
  156. static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
  157. {
  158. u8 omap2xxx_pwrst;
  159. omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
  160. OMAP2_PM_PWSTCTRL,
  161. OMAP_POWERSTATE_MASK);
  162. return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
  163. }
  164. static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
  165. {
  166. u8 omap2xxx_pwrst;
  167. omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
  168. OMAP2_PM_PWSTST,
  169. OMAP_POWERSTATEST_MASK);
  170. return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
  171. }
  172. struct pwrdm_ops omap2_pwrdm_operations = {
  173. .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
  174. .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
  175. .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
  176. .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
  177. .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
  178. .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
  179. .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst,
  180. .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst,
  181. .pwrdm_wait_transition = omap2_pwrdm_wait_transition,
  182. };
  183. /*
  184. *
  185. */
  186. static struct prm_ll_data omap2xxx_prm_ll_data = {
  187. .read_reset_sources = &omap2xxx_prm_read_reset_sources,
  188. .assert_hardreset = &omap2_prm_assert_hardreset,
  189. .deassert_hardreset = &omap2_prm_deassert_hardreset,
  190. .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
  191. .reset_system = &omap2xxx_prm_dpll_reset,
  192. .clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs,
  193. };
  194. int __init omap2xxx_prm_init(const struct omap_prcm_init_data *data)
  195. {
  196. return prm_register(&omap2xxx_prm_ll_data);
  197. }
  198. static void __exit omap2xxx_prm_exit(void)
  199. {
  200. prm_unregister(&omap2xxx_prm_ll_data);
  201. }
  202. __exitcall(omap2xxx_prm_exit);