prm.h 5.7 KB

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  1. /*
  2. * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions
  3. *
  4. * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
  5. * Copyright (C) 2010 Nokia Corporation
  6. *
  7. * Paul Walmsley
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #ifndef __ARCH_ARM_MACH_OMAP2_PRM_H
  14. #define __ARCH_ARM_MACH_OMAP2_PRM_H
  15. #include "prcm-common.h"
  16. # ifndef __ASSEMBLER__
  17. extern void __iomem *prm_base;
  18. extern u16 prm_features;
  19. extern void omap2_set_globals_prm(void __iomem *prm);
  20. int omap_prcm_init(void);
  21. int omap2_prm_base_init(void);
  22. int omap2_prcm_base_init(void);
  23. # endif
  24. /*
  25. * prm_features flag values
  26. *
  27. * PRM_HAS_IO_WAKEUP: has IO wakeup capability
  28. * PRM_HAS_VOLTAGE: has voltage domains
  29. * PRM_IRQ_DEFAULT: use default irq number for PRM irq
  30. */
  31. #define PRM_HAS_IO_WAKEUP BIT(0)
  32. #define PRM_HAS_VOLTAGE BIT(1)
  33. #define PRM_IRQ_DEFAULT BIT(2)
  34. /*
  35. * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
  36. * module to softreset
  37. */
  38. #define MAX_MODULE_SOFTRESET_WAIT 10000
  39. /*
  40. * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
  41. * submodule to exit hardreset
  42. */
  43. #define MAX_MODULE_HARDRESET_WAIT 10000
  44. /*
  45. * Register bitfields
  46. */
  47. /*
  48. * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
  49. *
  50. * 2430: PM_PWSTST_MDM
  51. *
  52. * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX,
  53. * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU,
  54. * PM_PWSTST_NEON
  55. */
  56. #define OMAP_INTRANSITION_MASK (1 << 20)
  57. /*
  58. * 24XX: PM_PWSTST_GFX, PM_PWSTST_DSP
  59. *
  60. * 2430: PM_PWSTST_MDM
  61. *
  62. * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX,
  63. * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU,
  64. * PM_PWSTST_NEON
  65. */
  66. #define OMAP_POWERSTATEST_SHIFT 0
  67. #define OMAP_POWERSTATEST_MASK (0x3 << 0)
  68. /*
  69. * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX,
  70. * PM_PWSTCTRL_DSP, PM_PWSTST_MPU
  71. *
  72. * 2430: PM_PWSTCTRL_MDM shared bits
  73. *
  74. * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE,
  75. * PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER,
  76. * PM_PWSTCTRL_NEON shared bits
  77. */
  78. #define OMAP_POWERSTATE_SHIFT 0
  79. #define OMAP_POWERSTATE_MASK (0x3 << 0)
  80. /*
  81. * Standardized OMAP reset source bits
  82. *
  83. * To the extent these happen to match the hardware register bit
  84. * shifts, it's purely coincidental. Used by omap-wdt.c.
  85. * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever
  86. * there are any bits remaining in the global PRM_RSTST register that
  87. * haven't been identified, or when the PRM code for the current SoC
  88. * doesn't know how to interpret the register.
  89. */
  90. #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0
  91. #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1
  92. #define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT 2
  93. #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3
  94. #define OMAP_SECU_WD_RST_SRC_ID_SHIFT 4
  95. #define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5
  96. #define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT 6
  97. #define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT 7
  98. #define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT 8
  99. #define OMAP_ICEPICK_RST_SRC_ID_SHIFT 9
  100. #define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT 10
  101. #define OMAP_C2C_RST_SRC_ID_SHIFT 11
  102. #define OMAP_UNKNOWN_RST_SRC_ID_SHIFT 12
  103. #ifndef __ASSEMBLER__
  104. /**
  105. * struct prm_reset_src_map - map register bitshifts to standard bitshifts
  106. * @reg_shift: bitshift in the PRM reset source register
  107. * @std_shift: bitshift equivalent in the standard reset source list
  108. *
  109. * The fields are signed because -1 is used as a terminator.
  110. */
  111. struct prm_reset_src_map {
  112. s8 reg_shift;
  113. s8 std_shift;
  114. };
  115. /**
  116. * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations
  117. * @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl
  118. * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
  119. * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
  120. * @late_init: ptr to the late init function
  121. * @assert_hardreset: ptr to the SoC PRM hardreset assert impl
  122. * @deassert_hardreset: ptr to the SoC PRM hardreset deassert impl
  123. *
  124. * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
  125. * deprecated.
  126. */
  127. struct prm_ll_data {
  128. u32 (*read_reset_sources)(void);
  129. bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
  130. void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
  131. int (*late_init)(void);
  132. int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
  133. int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
  134. u16 offset, u16 st_offset);
  135. int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
  136. u16 offset);
  137. void (*reset_system)(void);
  138. int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask);
  139. u32 (*vp_check_txdone)(u8 vp_id);
  140. void (*vp_clear_txdone)(u8 vp_id);
  141. };
  142. extern int prm_register(struct prm_ll_data *pld);
  143. extern int prm_unregister(struct prm_ll_data *pld);
  144. int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
  145. int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
  146. u16 offset, u16 st_offset);
  147. int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
  148. extern u32 prm_read_reset_sources(void);
  149. extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
  150. extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
  151. void omap_prm_reset_system(void);
  152. void omap_prm_reconfigure_io_chain(void);
  153. int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
  154. /*
  155. * Voltage Processor (VP) identifiers
  156. */
  157. #define OMAP3_VP_VDD_MPU_ID 0
  158. #define OMAP3_VP_VDD_CORE_ID 1
  159. #define OMAP4_VP_VDD_CORE_ID 0
  160. #define OMAP4_VP_VDD_IVA_ID 1
  161. #define OMAP4_VP_VDD_MPU_ID 2
  162. u32 omap_prm_vp_check_txdone(u8 vp_id);
  163. void omap_prm_vp_clear_txdone(u8 vp_id);
  164. #endif
  165. #endif