serial.c 6.1 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/serial.c
  3. *
  4. * OMAP1 serial support.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/irq.h>
  15. #include <linux/delay.h>
  16. #include <linux/serial.h>
  17. #include <linux/tty.h>
  18. #include <linux/serial_8250.h>
  19. #include <linux/serial_reg.h>
  20. #include <linux/clk.h>
  21. #include <linux/io.h>
  22. #include <asm/mach-types.h>
  23. #include <mach/mux.h>
  24. #include "pm.h"
  25. #include "soc.h"
  26. static struct clk * uart1_ck;
  27. static struct clk * uart2_ck;
  28. static struct clk * uart3_ck;
  29. static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
  30. int offset)
  31. {
  32. offset <<= up->regshift;
  33. return (unsigned int)__raw_readb(up->membase + offset);
  34. }
  35. static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
  36. int value)
  37. {
  38. offset <<= p->regshift;
  39. __raw_writeb(value, p->membase + offset);
  40. }
  41. /*
  42. * Internal UARTs need to be initialized for the 8250 autoconfig to work
  43. * properly. Note that the TX watermark initialization may not be needed
  44. * once the 8250.c watermark handling code is merged.
  45. */
  46. static void __init omap_serial_reset(struct plat_serial8250_port *p)
  47. {
  48. omap_serial_outp(p, UART_OMAP_MDR1,
  49. UART_OMAP_MDR1_DISABLE); /* disable UART */
  50. omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
  51. omap_serial_outp(p, UART_OMAP_MDR1,
  52. UART_OMAP_MDR1_16X_MODE); /* enable UART */
  53. if (!cpu_is_omap15xx()) {
  54. omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
  55. while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
  56. }
  57. }
  58. static struct plat_serial8250_port serial_platform_data[] = {
  59. {
  60. .mapbase = OMAP1_UART1_BASE,
  61. .irq = INT_UART1,
  62. .flags = UPF_BOOT_AUTOCONF,
  63. .iotype = UPIO_MEM,
  64. .regshift = 2,
  65. .uartclk = OMAP16XX_BASE_BAUD * 16,
  66. },
  67. {
  68. .mapbase = OMAP1_UART2_BASE,
  69. .irq = INT_UART2,
  70. .flags = UPF_BOOT_AUTOCONF,
  71. .iotype = UPIO_MEM,
  72. .regshift = 2,
  73. .uartclk = OMAP16XX_BASE_BAUD * 16,
  74. },
  75. {
  76. .mapbase = OMAP1_UART3_BASE,
  77. .irq = INT_UART3,
  78. .flags = UPF_BOOT_AUTOCONF,
  79. .iotype = UPIO_MEM,
  80. .regshift = 2,
  81. .uartclk = OMAP16XX_BASE_BAUD * 16,
  82. },
  83. { },
  84. };
  85. static struct platform_device serial_device = {
  86. .name = "serial8250",
  87. .id = PLAT8250_DEV_PLATFORM,
  88. .dev = {
  89. .platform_data = serial_platform_data,
  90. },
  91. };
  92. /*
  93. * Note that on Innovator-1510 UART2 pins conflict with USB2.
  94. * By default UART2 does not work on Innovator-1510 if you have
  95. * USB OHCI enabled. To use UART2, you must disable USB2 first.
  96. */
  97. void __init omap_serial_init(void)
  98. {
  99. int i;
  100. if (cpu_is_omap7xx()) {
  101. serial_platform_data[0].regshift = 0;
  102. serial_platform_data[1].regshift = 0;
  103. serial_platform_data[0].irq = INT_7XX_UART_MODEM_1;
  104. serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2;
  105. }
  106. if (cpu_is_omap15xx()) {
  107. serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
  108. serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
  109. serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
  110. }
  111. for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
  112. /* Don't look at UARTs higher than 2 for omap7xx */
  113. if (cpu_is_omap7xx() && i > 1) {
  114. serial_platform_data[i].membase = NULL;
  115. serial_platform_data[i].mapbase = 0;
  116. continue;
  117. }
  118. /* Static mapping, never released */
  119. serial_platform_data[i].membase =
  120. ioremap(serial_platform_data[i].mapbase, SZ_2K);
  121. if (!serial_platform_data[i].membase) {
  122. printk(KERN_ERR "Could not ioremap uart%i\n", i);
  123. continue;
  124. }
  125. switch (i) {
  126. case 0:
  127. uart1_ck = clk_get(NULL, "uart1_ck");
  128. if (IS_ERR(uart1_ck))
  129. printk("Could not get uart1_ck\n");
  130. else {
  131. clk_enable(uart1_ck);
  132. if (cpu_is_omap15xx())
  133. clk_set_rate(uart1_ck, 12000000);
  134. }
  135. break;
  136. case 1:
  137. uart2_ck = clk_get(NULL, "uart2_ck");
  138. if (IS_ERR(uart2_ck))
  139. printk("Could not get uart2_ck\n");
  140. else {
  141. clk_enable(uart2_ck);
  142. if (cpu_is_omap15xx())
  143. clk_set_rate(uart2_ck, 12000000);
  144. else
  145. clk_set_rate(uart2_ck, 48000000);
  146. }
  147. break;
  148. case 2:
  149. uart3_ck = clk_get(NULL, "uart3_ck");
  150. if (IS_ERR(uart3_ck))
  151. printk("Could not get uart3_ck\n");
  152. else {
  153. clk_enable(uart3_ck);
  154. if (cpu_is_omap15xx())
  155. clk_set_rate(uart3_ck, 12000000);
  156. }
  157. break;
  158. }
  159. omap_serial_reset(&serial_platform_data[i]);
  160. }
  161. }
  162. #ifdef CONFIG_OMAP_SERIAL_WAKE
  163. static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
  164. {
  165. /* Need to do something with serial port right after wake-up? */
  166. return IRQ_HANDLED;
  167. }
  168. /*
  169. * Reroutes serial RX lines to GPIO lines for the duration of
  170. * sleep to allow waking up the device from serial port even
  171. * in deep sleep.
  172. */
  173. void omap_serial_wake_trigger(int enable)
  174. {
  175. if (!cpu_is_omap16xx())
  176. return;
  177. if (uart1_ck != NULL) {
  178. if (enable)
  179. omap_cfg_reg(V14_16XX_GPIO37);
  180. else
  181. omap_cfg_reg(V14_16XX_UART1_RX);
  182. }
  183. if (uart2_ck != NULL) {
  184. if (enable)
  185. omap_cfg_reg(R9_16XX_GPIO18);
  186. else
  187. omap_cfg_reg(R9_16XX_UART2_RX);
  188. }
  189. if (uart3_ck != NULL) {
  190. if (enable)
  191. omap_cfg_reg(L14_16XX_GPIO49);
  192. else
  193. omap_cfg_reg(L14_16XX_UART3_RX);
  194. }
  195. }
  196. static void __init omap_serial_set_port_wakeup(int gpio_nr)
  197. {
  198. int ret;
  199. ret = gpio_request(gpio_nr, "UART wake");
  200. if (ret < 0) {
  201. printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
  202. gpio_nr);
  203. return;
  204. }
  205. gpio_direction_input(gpio_nr);
  206. ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
  207. IRQF_TRIGGER_RISING, "serial wakeup", NULL);
  208. if (ret) {
  209. gpio_free(gpio_nr);
  210. printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
  211. gpio_nr);
  212. return;
  213. }
  214. enable_irq_wake(gpio_to_irq(gpio_nr));
  215. }
  216. int __init omap_serial_wakeup_init(void)
  217. {
  218. if (!cpu_is_omap16xx())
  219. return 0;
  220. if (uart1_ck != NULL)
  221. omap_serial_set_port_wakeup(37);
  222. if (uart2_ck != NULL)
  223. omap_serial_set_port_wakeup(18);
  224. if (uart3_ck != NULL)
  225. omap_serial_set_port_wakeup(49);
  226. return 0;
  227. }
  228. #endif /* CONFIG_OMAP_SERIAL_WAKE */
  229. static int __init omap_init(void)
  230. {
  231. if (!cpu_class_is_omap1())
  232. return -ENODEV;
  233. return platform_device_register(&serial_device);
  234. }
  235. arch_initcall(omap_init);