mach-mx31_3ds.c 20 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/types.h>
  17. #include <linux/init.h>
  18. #include <linux/clk.h>
  19. #include <linux/irq.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/mfd/mc13783.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/spi/l4f00242t03.h>
  25. #include <linux/regulator/machine.h>
  26. #include <linux/usb/otg.h>
  27. #include <linux/usb/ulpi.h>
  28. #include <linux/memblock.h>
  29. #include <media/soc_camera.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/time.h>
  33. #include <asm/memory.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/memblock.h>
  36. #include "3ds_debugboard.h"
  37. #include "common.h"
  38. #include "devices-imx31.h"
  39. #include "ehci.h"
  40. #include "hardware.h"
  41. #include "iomux-mx3.h"
  42. #include "ulpi.h"
  43. static int mx31_3ds_pins[] = {
  44. /* UART1 */
  45. MX31_PIN_CTS1__CTS1,
  46. MX31_PIN_RTS1__RTS1,
  47. MX31_PIN_TXD1__TXD1,
  48. MX31_PIN_RXD1__RXD1,
  49. IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  50. /*SPI0*/
  51. IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1),
  52. IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1),
  53. /* SPI 1 */
  54. MX31_PIN_CSPI2_SCLK__SCLK,
  55. MX31_PIN_CSPI2_MOSI__MOSI,
  56. MX31_PIN_CSPI2_MISO__MISO,
  57. MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  58. MX31_PIN_CSPI2_SS0__SS0,
  59. MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  60. /* MC13783 IRQ */
  61. IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  62. /* USB OTG reset */
  63. IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  64. /* USB OTG */
  65. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  66. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  67. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  68. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  69. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  70. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  71. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  72. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  73. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  74. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  75. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  76. MX31_PIN_USBOTG_STP__USBOTG_STP,
  77. /*Keyboard*/
  78. MX31_PIN_KEY_ROW0_KEY_ROW0,
  79. MX31_PIN_KEY_ROW1_KEY_ROW1,
  80. MX31_PIN_KEY_ROW2_KEY_ROW2,
  81. MX31_PIN_KEY_COL0_KEY_COL0,
  82. MX31_PIN_KEY_COL1_KEY_COL1,
  83. MX31_PIN_KEY_COL2_KEY_COL2,
  84. MX31_PIN_KEY_COL3_KEY_COL3,
  85. /* USB Host 2 */
  86. IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  87. IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  88. IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  89. IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  90. IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  91. IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  92. IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
  93. IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
  94. IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
  95. IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
  96. IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
  97. IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
  98. /* USB Host2 reset */
  99. IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
  100. /* I2C1 */
  101. MX31_PIN_I2C_CLK__I2C1_SCL,
  102. MX31_PIN_I2C_DAT__I2C1_SDA,
  103. /* SDHC1 */
  104. MX31_PIN_SD1_DATA3__SD1_DATA3,
  105. MX31_PIN_SD1_DATA2__SD1_DATA2,
  106. MX31_PIN_SD1_DATA1__SD1_DATA1,
  107. MX31_PIN_SD1_DATA0__SD1_DATA0,
  108. MX31_PIN_SD1_CLK__SD1_CLK,
  109. MX31_PIN_SD1_CMD__SD1_CMD,
  110. MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
  111. MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
  112. /* Framebuffer */
  113. MX31_PIN_LD0__LD0,
  114. MX31_PIN_LD1__LD1,
  115. MX31_PIN_LD2__LD2,
  116. MX31_PIN_LD3__LD3,
  117. MX31_PIN_LD4__LD4,
  118. MX31_PIN_LD5__LD5,
  119. MX31_PIN_LD6__LD6,
  120. MX31_PIN_LD7__LD7,
  121. MX31_PIN_LD8__LD8,
  122. MX31_PIN_LD9__LD9,
  123. MX31_PIN_LD10__LD10,
  124. MX31_PIN_LD11__LD11,
  125. MX31_PIN_LD12__LD12,
  126. MX31_PIN_LD13__LD13,
  127. MX31_PIN_LD14__LD14,
  128. MX31_PIN_LD15__LD15,
  129. MX31_PIN_LD16__LD16,
  130. MX31_PIN_LD17__LD17,
  131. MX31_PIN_VSYNC3__VSYNC3,
  132. MX31_PIN_HSYNC__HSYNC,
  133. MX31_PIN_FPSHIFT__FPSHIFT,
  134. MX31_PIN_CONTRAST__CONTRAST,
  135. /* CSI */
  136. MX31_PIN_CSI_D6__CSI_D6,
  137. MX31_PIN_CSI_D7__CSI_D7,
  138. MX31_PIN_CSI_D8__CSI_D8,
  139. MX31_PIN_CSI_D9__CSI_D9,
  140. MX31_PIN_CSI_D10__CSI_D10,
  141. MX31_PIN_CSI_D11__CSI_D11,
  142. MX31_PIN_CSI_D12__CSI_D12,
  143. MX31_PIN_CSI_D13__CSI_D13,
  144. MX31_PIN_CSI_D14__CSI_D14,
  145. MX31_PIN_CSI_D15__CSI_D15,
  146. MX31_PIN_CSI_HSYNC__CSI_HSYNC,
  147. MX31_PIN_CSI_MCLK__CSI_MCLK,
  148. MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
  149. MX31_PIN_CSI_VSYNC__CSI_VSYNC,
  150. MX31_PIN_CSI_D5__GPIO3_5, /* CMOS PWDN */
  151. IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_GPIO), /* CMOS reset */
  152. /* SSI */
  153. MX31_PIN_STXD4__STXD4,
  154. MX31_PIN_SRXD4__SRXD4,
  155. MX31_PIN_SCK4__SCK4,
  156. MX31_PIN_SFS4__SFS4,
  157. };
  158. /*
  159. * Camera support
  160. */
  161. static phys_addr_t mx3_camera_base __initdata;
  162. #define MX31_3DS_CAMERA_BUF_SIZE SZ_8M
  163. #define MX31_3DS_GPIO_CAMERA_PW IOMUX_TO_GPIO(MX31_PIN_CSI_D5)
  164. #define MX31_3DS_GPIO_CAMERA_RST IOMUX_TO_GPIO(MX31_PIN_RI_DTE1)
  165. static struct gpio mx31_3ds_camera_gpios[] = {
  166. { MX31_3DS_GPIO_CAMERA_PW, GPIOF_OUT_INIT_HIGH, "camera-power" },
  167. { MX31_3DS_GPIO_CAMERA_RST, GPIOF_OUT_INIT_HIGH, "camera-reset" },
  168. };
  169. static const struct mx3_camera_pdata mx31_3ds_camera_pdata __initconst = {
  170. .flags = MX3_CAMERA_DATAWIDTH_10,
  171. .mclk_10khz = 2600,
  172. };
  173. static int __init mx31_3ds_init_camera(void)
  174. {
  175. int dma, ret = -ENOMEM;
  176. struct platform_device *pdev =
  177. imx31_alloc_mx3_camera(&mx31_3ds_camera_pdata);
  178. if (IS_ERR(pdev))
  179. return PTR_ERR(pdev);
  180. if (!mx3_camera_base)
  181. goto err;
  182. dma = dma_declare_coherent_memory(&pdev->dev,
  183. mx3_camera_base, mx3_camera_base,
  184. MX31_3DS_CAMERA_BUF_SIZE,
  185. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  186. if (!(dma & DMA_MEMORY_MAP))
  187. goto err;
  188. ret = platform_device_add(pdev);
  189. if (ret)
  190. err:
  191. platform_device_put(pdev);
  192. return ret;
  193. }
  194. static int mx31_3ds_camera_power(struct device *dev, int on)
  195. {
  196. /* enable or disable the camera */
  197. pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
  198. gpio_set_value(MX31_3DS_GPIO_CAMERA_PW, on ? 0 : 1);
  199. if (!on)
  200. goto out;
  201. /* If enabled, give a reset impulse */
  202. gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 0);
  203. msleep(20);
  204. gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 1);
  205. msleep(100);
  206. out:
  207. return 0;
  208. }
  209. static struct i2c_board_info mx31_3ds_i2c_camera = {
  210. I2C_BOARD_INFO("ov2640", 0x30),
  211. };
  212. static struct regulator_bulk_data mx31_3ds_camera_regs[] = {
  213. { .supply = "cmos_vcore" },
  214. { .supply = "cmos_2v8" },
  215. };
  216. static struct soc_camera_link iclink_ov2640 = {
  217. .bus_id = 0,
  218. .board_info = &mx31_3ds_i2c_camera,
  219. .i2c_adapter_id = 0,
  220. .power = mx31_3ds_camera_power,
  221. .regulators = mx31_3ds_camera_regs,
  222. .num_regulators = ARRAY_SIZE(mx31_3ds_camera_regs),
  223. };
  224. static struct platform_device mx31_3ds_ov2640 = {
  225. .name = "soc-camera-pdrv",
  226. .id = 0,
  227. .dev = {
  228. .platform_data = &iclink_ov2640,
  229. },
  230. };
  231. /*
  232. * FB support
  233. */
  234. static const struct fb_videomode fb_modedb[] = {
  235. { /* 480x640 @ 60 Hz */
  236. .name = "Epson-VGA",
  237. .refresh = 60,
  238. .xres = 480,
  239. .yres = 640,
  240. .pixclock = 41701,
  241. .left_margin = 20,
  242. .right_margin = 41,
  243. .upper_margin = 10,
  244. .lower_margin = 5,
  245. .hsync_len = 20,
  246. .vsync_len = 10,
  247. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
  248. .vmode = FB_VMODE_NONINTERLACED,
  249. .flag = 0,
  250. },
  251. };
  252. static struct mx3fb_platform_data mx3fb_pdata __initdata = {
  253. .name = "Epson-VGA",
  254. .mode = fb_modedb,
  255. .num_modes = ARRAY_SIZE(fb_modedb),
  256. };
  257. /* LCD */
  258. static struct l4f00242t03_pdata mx31_3ds_l4f00242t03_pdata = {
  259. .reset_gpio = IOMUX_TO_GPIO(MX31_PIN_LCS1),
  260. .data_enable_gpio = IOMUX_TO_GPIO(MX31_PIN_SER_RS),
  261. };
  262. /*
  263. * Support for SD card slot in personality board
  264. */
  265. #define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
  266. #define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
  267. static struct gpio mx31_3ds_sdhc1_gpios[] = {
  268. { MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
  269. { MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
  270. };
  271. static int mx31_3ds_sdhc1_init(struct device *dev,
  272. irq_handler_t detect_irq,
  273. void *data)
  274. {
  275. int ret;
  276. ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
  277. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  278. if (ret) {
  279. pr_warn("Unable to request the SD/MMC GPIOs.\n");
  280. return ret;
  281. }
  282. ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)),
  283. detect_irq,
  284. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  285. "sdhc1-detect", data);
  286. if (ret) {
  287. pr_warn("Unable to request the SD/MMC card-detect IRQ.\n");
  288. goto gpio_free;
  289. }
  290. return 0;
  291. gpio_free:
  292. gpio_free_array(mx31_3ds_sdhc1_gpios,
  293. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  294. return ret;
  295. }
  296. static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
  297. {
  298. free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)), data);
  299. gpio_free_array(mx31_3ds_sdhc1_gpios,
  300. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  301. }
  302. static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
  303. {
  304. /*
  305. * While the voltage stuff is done by the driver, activate the
  306. * Buffer Enable Pin only if there is a card in slot to fix the card
  307. * voltage issue caused by bi-directional chip TXB0108 on 3Stack.
  308. * Done here because at this stage we have for sure a debounced value
  309. * of the presence of the card, showed by the value of vdd.
  310. * 7 == ilog2(MMC_VDD_165_195)
  311. */
  312. if (vdd > 7)
  313. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
  314. else
  315. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
  316. }
  317. static struct imxmmc_platform_data sdhc1_pdata = {
  318. .init = mx31_3ds_sdhc1_init,
  319. .exit = mx31_3ds_sdhc1_exit,
  320. .setpower = mx31_3ds_sdhc1_setpower,
  321. };
  322. /*
  323. * Matrix keyboard
  324. */
  325. static const uint32_t mx31_3ds_keymap[] = {
  326. KEY(0, 0, KEY_UP),
  327. KEY(0, 1, KEY_DOWN),
  328. KEY(1, 0, KEY_RIGHT),
  329. KEY(1, 1, KEY_LEFT),
  330. KEY(1, 2, KEY_ENTER),
  331. KEY(2, 0, KEY_F6),
  332. KEY(2, 1, KEY_F8),
  333. KEY(2, 2, KEY_F9),
  334. KEY(2, 3, KEY_F10),
  335. };
  336. static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
  337. .keymap = mx31_3ds_keymap,
  338. .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
  339. };
  340. /* Regulators */
  341. static struct regulator_init_data pwgtx_init = {
  342. .constraints = {
  343. .boot_on = 1,
  344. .always_on = 1,
  345. },
  346. };
  347. static struct regulator_init_data gpo_init = {
  348. .constraints = {
  349. .boot_on = 1,
  350. .always_on = 1,
  351. }
  352. };
  353. static struct regulator_consumer_supply vmmc2_consumers[] = {
  354. REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
  355. };
  356. static struct regulator_init_data vmmc2_init = {
  357. .constraints = {
  358. .min_uV = 3000000,
  359. .max_uV = 3000000,
  360. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  361. REGULATOR_CHANGE_STATUS,
  362. },
  363. .num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
  364. .consumer_supplies = vmmc2_consumers,
  365. };
  366. static struct regulator_consumer_supply vmmc1_consumers[] = {
  367. REGULATOR_SUPPLY("vcore", "spi0.0"),
  368. REGULATOR_SUPPLY("cmos_2v8", "soc-camera-pdrv.0"),
  369. };
  370. static struct regulator_init_data vmmc1_init = {
  371. .constraints = {
  372. .min_uV = 2800000,
  373. .max_uV = 2800000,
  374. .apply_uV = 1,
  375. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  376. REGULATOR_CHANGE_STATUS,
  377. },
  378. .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
  379. .consumer_supplies = vmmc1_consumers,
  380. };
  381. static struct regulator_consumer_supply vgen_consumers[] = {
  382. REGULATOR_SUPPLY("vdd", "spi0.0"),
  383. };
  384. static struct regulator_init_data vgen_init = {
  385. .constraints = {
  386. .min_uV = 1800000,
  387. .max_uV = 1800000,
  388. .apply_uV = 1,
  389. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  390. REGULATOR_CHANGE_STATUS,
  391. },
  392. .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
  393. .consumer_supplies = vgen_consumers,
  394. };
  395. static struct regulator_consumer_supply vvib_consumers[] = {
  396. REGULATOR_SUPPLY("cmos_vcore", "soc-camera-pdrv.0"),
  397. };
  398. static struct regulator_init_data vvib_init = {
  399. .constraints = {
  400. .min_uV = 1300000,
  401. .max_uV = 1300000,
  402. .apply_uV = 1,
  403. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  404. REGULATOR_CHANGE_STATUS,
  405. },
  406. .num_consumer_supplies = ARRAY_SIZE(vvib_consumers),
  407. .consumer_supplies = vvib_consumers,
  408. };
  409. static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
  410. {
  411. .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
  412. .init_data = &pwgtx_init,
  413. }, {
  414. .id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
  415. .init_data = &pwgtx_init,
  416. }, {
  417. .id = MC13783_REG_GPO1, /* Turn on 1.8V */
  418. .init_data = &gpo_init,
  419. }, {
  420. .id = MC13783_REG_GPO3, /* Turn on 3.3V */
  421. .init_data = &gpo_init,
  422. }, {
  423. .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
  424. .init_data = &vmmc2_init,
  425. }, {
  426. .id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
  427. .init_data = &vmmc1_init,
  428. }, {
  429. .id = MC13783_REG_VGEN, /* Power LCD */
  430. .init_data = &vgen_init,
  431. }, {
  432. .id = MC13783_REG_VVIB, /* Power CMOS */
  433. .init_data = &vvib_init,
  434. },
  435. };
  436. /* MC13783 */
  437. static struct mc13xxx_codec_platform_data mx31_3ds_codec = {
  438. .dac_ssi_port = MC13783_SSI1_PORT,
  439. .adc_ssi_port = MC13783_SSI1_PORT,
  440. };
  441. static struct mc13xxx_platform_data mc13783_pdata = {
  442. .regulators = {
  443. .regulators = mx31_3ds_regulators,
  444. .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
  445. },
  446. .codec = &mx31_3ds_codec,
  447. .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | MC13XXX_USE_CODEC,
  448. };
  449. static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {
  450. .flags = IMX_SSI_DMA | IMX_SSI_NET,
  451. };
  452. /* SPI */
  453. static int spi0_internal_chipselect[] = {
  454. MXC_SPI_CS(2),
  455. };
  456. static const struct spi_imx_master spi0_pdata __initconst = {
  457. .chipselect = spi0_internal_chipselect,
  458. .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
  459. };
  460. static int spi1_internal_chipselect[] = {
  461. MXC_SPI_CS(0),
  462. MXC_SPI_CS(2),
  463. };
  464. static const struct spi_imx_master spi1_pdata __initconst = {
  465. .chipselect = spi1_internal_chipselect,
  466. .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
  467. };
  468. static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
  469. {
  470. .modalias = "mc13783",
  471. .max_speed_hz = 1000000,
  472. .bus_num = 1,
  473. .chip_select = 1, /* SS2 */
  474. .platform_data = &mc13783_pdata,
  475. /* irq number is run-time assigned */
  476. .mode = SPI_CS_HIGH,
  477. }, {
  478. .modalias = "l4f00242t03",
  479. .max_speed_hz = 5000000,
  480. .bus_num = 0,
  481. .chip_select = 0, /* SS2 */
  482. .platform_data = &mx31_3ds_l4f00242t03_pdata,
  483. },
  484. };
  485. /*
  486. * NAND Flash
  487. */
  488. static const struct mxc_nand_platform_data
  489. mx31_3ds_nand_board_info __initconst = {
  490. .width = 1,
  491. .hw_ecc = 1,
  492. #ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT
  493. .flash_bbt = 1,
  494. #endif
  495. };
  496. /*
  497. * USB OTG
  498. */
  499. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  500. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  501. #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
  502. #define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
  503. static int mx31_3ds_usbotg_init(void)
  504. {
  505. int err;
  506. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  507. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  508. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  509. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  510. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  511. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  512. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  513. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  514. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  515. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  516. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  517. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  518. err = gpio_request(USBOTG_RST_B, "otgusb-reset");
  519. if (err) {
  520. pr_err("Failed to request the USB OTG reset gpio\n");
  521. return err;
  522. }
  523. err = gpio_direction_output(USBOTG_RST_B, 0);
  524. if (err) {
  525. pr_err("Failed to drive the USB OTG reset gpio\n");
  526. goto usbotg_free_reset;
  527. }
  528. mdelay(1);
  529. gpio_set_value(USBOTG_RST_B, 1);
  530. return 0;
  531. usbotg_free_reset:
  532. gpio_free(USBOTG_RST_B);
  533. return err;
  534. }
  535. static int mx31_3ds_otg_init(struct platform_device *pdev)
  536. {
  537. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  538. }
  539. static int mx31_3ds_host2_init(struct platform_device *pdev)
  540. {
  541. int err;
  542. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  543. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  544. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  545. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  546. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  547. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  548. mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
  549. mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
  550. mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
  551. mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
  552. mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
  553. mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
  554. err = gpio_request(USBH2_RST_B, "usbh2-reset");
  555. if (err) {
  556. pr_err("Failed to request the USB Host 2 reset gpio\n");
  557. return err;
  558. }
  559. err = gpio_direction_output(USBH2_RST_B, 0);
  560. if (err) {
  561. pr_err("Failed to drive the USB Host 2 reset gpio\n");
  562. goto usbotg_free_reset;
  563. }
  564. mdelay(1);
  565. gpio_set_value(USBH2_RST_B, 1);
  566. mdelay(10);
  567. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  568. usbotg_free_reset:
  569. gpio_free(USBH2_RST_B);
  570. return err;
  571. }
  572. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  573. .init = mx31_3ds_otg_init,
  574. .portsc = MXC_EHCI_MODE_ULPI,
  575. };
  576. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  577. .init = mx31_3ds_host2_init,
  578. .portsc = MXC_EHCI_MODE_ULPI,
  579. };
  580. static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
  581. .operating_mode = FSL_USB2_DR_DEVICE,
  582. .phy_mode = FSL_USB2_PHY_ULPI,
  583. };
  584. static bool otg_mode_host __initdata;
  585. static int __init mx31_3ds_otg_mode(char *options)
  586. {
  587. if (!strcmp(options, "host"))
  588. otg_mode_host = true;
  589. else if (!strcmp(options, "device"))
  590. otg_mode_host = false;
  591. else
  592. pr_info("otg_mode neither \"host\" nor \"device\". "
  593. "Defaulting to device\n");
  594. return 1;
  595. }
  596. __setup("otg_mode=", mx31_3ds_otg_mode);
  597. static const struct imxuart_platform_data uart_pdata __initconst = {
  598. .flags = IMXUART_HAVE_RTSCTS,
  599. };
  600. static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
  601. .bitrate = 100000,
  602. };
  603. static struct platform_device *devices[] __initdata = {
  604. &mx31_3ds_ov2640,
  605. };
  606. static void __init mx31_3ds_init(void)
  607. {
  608. imx31_soc_init();
  609. /* Configure SPI1 IOMUX */
  610. mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true);
  611. mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
  612. "mx31_3ds");
  613. imx31_add_imx_uart0(&uart_pdata);
  614. imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
  615. imx31_add_spi_imx1(&spi1_pdata);
  616. imx31_add_imx_keypad(&mx31_3ds_keymap_data);
  617. imx31_add_imx2_wdt();
  618. imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
  619. imx31_add_spi_imx0(&spi0_pdata);
  620. imx31_add_ipu_core();
  621. imx31_add_mx3_sdc_fb(&mx3fb_pdata);
  622. imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata);
  623. imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
  624. }
  625. static void __init mx31_3ds_late(void)
  626. {
  627. int ret;
  628. mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
  629. spi_register_board_info(mx31_3ds_spi_devs,
  630. ARRAY_SIZE(mx31_3ds_spi_devs));
  631. platform_add_devices(devices, ARRAY_SIZE(devices));
  632. mx31_3ds_usbotg_init();
  633. if (otg_mode_host) {
  634. otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  635. ULPI_OTG_DRVVBUS_EXT);
  636. if (otg_pdata.otg)
  637. imx31_add_mxc_ehci_otg(&otg_pdata);
  638. }
  639. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  640. ULPI_OTG_DRVVBUS_EXT);
  641. if (usbh2_pdata.otg)
  642. imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
  643. if (!otg_mode_host)
  644. imx31_add_fsl_usb2_udc(&usbotg_pdata);
  645. if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)))
  646. printk(KERN_WARNING "Init of the debug board failed, all "
  647. "devices on the debug board are unusable.\n");
  648. imx31_add_mxc_mmc(0, &sdhc1_pdata);
  649. /* CSI */
  650. /* Camera power: default - off */
  651. ret = gpio_request_array(mx31_3ds_camera_gpios,
  652. ARRAY_SIZE(mx31_3ds_camera_gpios));
  653. if (ret) {
  654. pr_err("Failed to request camera gpios");
  655. iclink_ov2640.power = NULL;
  656. }
  657. mx31_3ds_init_camera();
  658. }
  659. static void __init mx31_3ds_timer_init(void)
  660. {
  661. mx31_clocks_init(26000000);
  662. }
  663. static void __init mx31_3ds_reserve(void)
  664. {
  665. /* reserve MX31_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
  666. mx3_camera_base = arm_memblock_steal(MX31_3DS_CAMERA_BUF_SIZE,
  667. MX31_3DS_CAMERA_BUF_SIZE);
  668. }
  669. MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
  670. /* Maintainer: Freescale Semiconductor, Inc. */
  671. .atag_offset = 0x100,
  672. .map_io = mx31_map_io,
  673. .init_early = imx31_init_early,
  674. .init_irq = mx31_init_irq,
  675. .init_time = mx31_3ds_timer_init,
  676. .init_machine = mx31_3ds_init,
  677. .init_late = mx31_3ds_late,
  678. .reserve = mx31_3ds_reserve,
  679. .restart = mxc_restart,
  680. MACHINE_END