cpuidle-imx6sx.c 2.5 KB

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  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/cpuidle.h>
  9. #include <linux/cpu_pm.h>
  10. #include <linux/module.h>
  11. #include <asm/cacheflush.h>
  12. #include <asm/cpuidle.h>
  13. #include <asm/suspend.h>
  14. #include "common.h"
  15. #include "cpuidle.h"
  16. static int imx6sx_idle_finish(unsigned long val)
  17. {
  18. /*
  19. * for Cortex-A7 which has an internal L2
  20. * cache, need to flush it before powering
  21. * down ARM platform, since flushing L1 cache
  22. * here again has very small overhead, compared
  23. * to adding conditional code for L2 cache type,
  24. * just call flush_cache_all() is fine.
  25. */
  26. flush_cache_all();
  27. cpu_do_idle();
  28. return 0;
  29. }
  30. static int imx6sx_enter_wait(struct cpuidle_device *dev,
  31. struct cpuidle_driver *drv, int index)
  32. {
  33. imx6_set_lpm(WAIT_UNCLOCKED);
  34. switch (index) {
  35. case 1:
  36. cpu_do_idle();
  37. break;
  38. case 2:
  39. imx6_enable_rbc(true);
  40. imx_gpc_set_arm_power_in_lpm(true);
  41. imx_set_cpu_jump(0, v7_cpu_resume);
  42. /* Need to notify there is a cpu pm operation. */
  43. cpu_pm_enter();
  44. cpu_cluster_pm_enter();
  45. cpu_suspend(0, imx6sx_idle_finish);
  46. cpu_cluster_pm_exit();
  47. cpu_pm_exit();
  48. imx_gpc_set_arm_power_in_lpm(false);
  49. imx6_enable_rbc(false);
  50. break;
  51. default:
  52. break;
  53. }
  54. imx6_set_lpm(WAIT_CLOCKED);
  55. return index;
  56. }
  57. static struct cpuidle_driver imx6sx_cpuidle_driver = {
  58. .name = "imx6sx_cpuidle",
  59. .owner = THIS_MODULE,
  60. .states = {
  61. /* WFI */
  62. ARM_CPUIDLE_WFI_STATE,
  63. /* WAIT */
  64. {
  65. .exit_latency = 50,
  66. .target_residency = 75,
  67. .flags = CPUIDLE_FLAG_TIMER_STOP,
  68. .enter = imx6sx_enter_wait,
  69. .name = "WAIT",
  70. .desc = "Clock off",
  71. },
  72. /* WAIT + ARM power off */
  73. {
  74. /*
  75. * ARM gating 31us * 5 + RBC clear 65us
  76. * and some margin for SW execution, here set it
  77. * to 300us.
  78. */
  79. .exit_latency = 300,
  80. .target_residency = 500,
  81. .enter = imx6sx_enter_wait,
  82. .name = "LOW-POWER-IDLE",
  83. .desc = "ARM power off",
  84. },
  85. },
  86. .state_count = 3,
  87. .safe_state_index = 0,
  88. };
  89. int __init imx6sx_cpuidle_init(void)
  90. {
  91. imx6_set_int_mem_clk_lpm(true);
  92. imx6_enable_rbc(false);
  93. /*
  94. * set ARM power up/down timing to the fastest,
  95. * sw2iso and sw can be set to one 32K cycle = 31us
  96. * except for power up sw2iso which need to be
  97. * larger than LDO ramp up time.
  98. */
  99. imx_gpc_set_arm_power_up_timing(2, 1);
  100. imx_gpc_set_arm_power_down_timing(1, 1);
  101. return cpuidle_register(&imx6sx_cpuidle_driver, NULL);
  102. }