kvm_hyp.h 4.5 KB

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  1. /*
  2. * Copyright (C) 2015 - ARM Ltd
  3. * Author: Marc Zyngier <marc.zyngier@arm.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __ARM_KVM_HYP_H__
  18. #define __ARM_KVM_HYP_H__
  19. #include <linux/compiler.h>
  20. #include <linux/kvm_host.h>
  21. #include <asm/cp15.h>
  22. #include <asm/kvm_mmu.h>
  23. #include <asm/vfp.h>
  24. #define __hyp_text __section(.hyp.text) notrace
  25. #define __ACCESS_VFP(CRn) \
  26. "mrc", "mcr", __stringify(p10, 7, %0, CRn, cr0, 0), u32
  27. #define write_special(v, r) \
  28. asm volatile("msr " __stringify(r) ", %0" : : "r" (v))
  29. #define read_special(r) ({ \
  30. u32 __val; \
  31. asm volatile("mrs %0, " __stringify(r) : "=r" (__val)); \
  32. __val; \
  33. })
  34. #define TTBR0 __ACCESS_CP15_64(0, c2)
  35. #define TTBR1 __ACCESS_CP15_64(1, c2)
  36. #define VTTBR __ACCESS_CP15_64(6, c2)
  37. #define PAR __ACCESS_CP15_64(0, c7)
  38. #define CNTV_CVAL __ACCESS_CP15_64(3, c14)
  39. #define CNTVOFF __ACCESS_CP15_64(4, c14)
  40. #define MIDR __ACCESS_CP15(c0, 0, c0, 0)
  41. #define CSSELR __ACCESS_CP15(c0, 2, c0, 0)
  42. #define VPIDR __ACCESS_CP15(c0, 4, c0, 0)
  43. #define VMPIDR __ACCESS_CP15(c0, 4, c0, 5)
  44. #define SCTLR __ACCESS_CP15(c1, 0, c0, 0)
  45. #define CPACR __ACCESS_CP15(c1, 0, c0, 2)
  46. #define HCR __ACCESS_CP15(c1, 4, c1, 0)
  47. #define HDCR __ACCESS_CP15(c1, 4, c1, 1)
  48. #define HCPTR __ACCESS_CP15(c1, 4, c1, 2)
  49. #define HSTR __ACCESS_CP15(c1, 4, c1, 3)
  50. #define TTBCR __ACCESS_CP15(c2, 0, c0, 2)
  51. #define HTCR __ACCESS_CP15(c2, 4, c0, 2)
  52. #define VTCR __ACCESS_CP15(c2, 4, c1, 2)
  53. #define DACR __ACCESS_CP15(c3, 0, c0, 0)
  54. #define DFSR __ACCESS_CP15(c5, 0, c0, 0)
  55. #define IFSR __ACCESS_CP15(c5, 0, c0, 1)
  56. #define ADFSR __ACCESS_CP15(c5, 0, c1, 0)
  57. #define AIFSR __ACCESS_CP15(c5, 0, c1, 1)
  58. #define HSR __ACCESS_CP15(c5, 4, c2, 0)
  59. #define DFAR __ACCESS_CP15(c6, 0, c0, 0)
  60. #define IFAR __ACCESS_CP15(c6, 0, c0, 2)
  61. #define HDFAR __ACCESS_CP15(c6, 4, c0, 0)
  62. #define HIFAR __ACCESS_CP15(c6, 4, c0, 2)
  63. #define HPFAR __ACCESS_CP15(c6, 4, c0, 4)
  64. #define ICIALLUIS __ACCESS_CP15(c7, 0, c1, 0)
  65. #define ATS1CPR __ACCESS_CP15(c7, 0, c8, 0)
  66. #define TLBIALLIS __ACCESS_CP15(c8, 0, c3, 0)
  67. #define TLBIALL __ACCESS_CP15(c8, 0, c7, 0)
  68. #define TLBIALLNSNHIS __ACCESS_CP15(c8, 4, c3, 4)
  69. #define PRRR __ACCESS_CP15(c10, 0, c2, 0)
  70. #define NMRR __ACCESS_CP15(c10, 0, c2, 1)
  71. #define AMAIR0 __ACCESS_CP15(c10, 0, c3, 0)
  72. #define AMAIR1 __ACCESS_CP15(c10, 0, c3, 1)
  73. #define VBAR __ACCESS_CP15(c12, 0, c0, 0)
  74. #define CID __ACCESS_CP15(c13, 0, c0, 1)
  75. #define TID_URW __ACCESS_CP15(c13, 0, c0, 2)
  76. #define TID_URO __ACCESS_CP15(c13, 0, c0, 3)
  77. #define TID_PRIV __ACCESS_CP15(c13, 0, c0, 4)
  78. #define HTPIDR __ACCESS_CP15(c13, 4, c0, 2)
  79. #define CNTKCTL __ACCESS_CP15(c14, 0, c1, 0)
  80. #define CNTV_CTL __ACCESS_CP15(c14, 0, c3, 1)
  81. #define CNTHCTL __ACCESS_CP15(c14, 4, c1, 0)
  82. #define VFP_FPEXC __ACCESS_VFP(FPEXC)
  83. /* AArch64 compatibility macros, only for the timer so far */
  84. #define read_sysreg_el0(r) read_sysreg(r##_el0)
  85. #define write_sysreg_el0(v, r) write_sysreg(v, r##_el0)
  86. #define cntv_ctl_el0 CNTV_CTL
  87. #define cntv_cval_el0 CNTV_CVAL
  88. #define cntvoff_el2 CNTVOFF
  89. #define cnthctl_el2 CNTHCTL
  90. void __timer_save_state(struct kvm_vcpu *vcpu);
  91. void __timer_restore_state(struct kvm_vcpu *vcpu);
  92. void __vgic_v2_save_state(struct kvm_vcpu *vcpu);
  93. void __vgic_v2_restore_state(struct kvm_vcpu *vcpu);
  94. void __sysreg_save_state(struct kvm_cpu_context *ctxt);
  95. void __sysreg_restore_state(struct kvm_cpu_context *ctxt);
  96. void __vgic_v3_save_state(struct kvm_vcpu *vcpu);
  97. void __vgic_v3_restore_state(struct kvm_vcpu *vcpu);
  98. void asmlinkage __vfp_save_state(struct vfp_hard_struct *vfp);
  99. void asmlinkage __vfp_restore_state(struct vfp_hard_struct *vfp);
  100. static inline bool __vfp_enabled(void)
  101. {
  102. return !(read_sysreg(HCPTR) & (HCPTR_TCP(11) | HCPTR_TCP(10)));
  103. }
  104. void __hyp_text __banked_save_state(struct kvm_cpu_context *ctxt);
  105. void __hyp_text __banked_restore_state(struct kvm_cpu_context *ctxt);
  106. int asmlinkage __guest_enter(struct kvm_vcpu *vcpu,
  107. struct kvm_cpu_context *host);
  108. int asmlinkage __hyp_do_panic(const char *, int, u32);
  109. #endif /* __ARM_KVM_HYP_H__ */