vfxxx.dtsi 20 KB

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  1. /*
  2. * Copyright 2013 Freescale Semiconductor, Inc.
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * Or, alternatively
  19. *
  20. * b) Permission is hereby granted, free of charge, to any person
  21. * obtaining a copy of this software and associated documentation
  22. * files (the "Software"), to deal in the Software without
  23. * restriction, including without limitation the rights to use
  24. * copy, modify, merge, publish, distribute, sublicense, and/or
  25. * sell copies of the Software, and to permit persons to whom the
  26. * Software is furnished to do so, subject to the following
  27. * conditions:
  28. *
  29. * The above copyright notice and this permission notice shall be
  30. * included in all copies or substantial portions of the Software.
  31. *
  32. * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  33. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  37. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39. * OTHER DEALINGS IN THE SOFTWARE.
  40. */
  41. #include "vf610-pinfunc.h"
  42. #include <dt-bindings/clock/vf610-clock.h>
  43. #include <dt-bindings/interrupt-controller/irq.h>
  44. #include <dt-bindings/gpio/gpio.h>
  45. / {
  46. aliases {
  47. can0 = &can0;
  48. can1 = &can1;
  49. ethernet0 = &fec0;
  50. ethernet1 = &fec1;
  51. serial0 = &uart0;
  52. serial1 = &uart1;
  53. serial2 = &uart2;
  54. serial3 = &uart3;
  55. serial4 = &uart4;
  56. serial5 = &uart5;
  57. gpio0 = &gpio0;
  58. gpio1 = &gpio1;
  59. gpio2 = &gpio2;
  60. gpio3 = &gpio3;
  61. gpio4 = &gpio4;
  62. usbphy0 = &usbphy0;
  63. usbphy1 = &usbphy1;
  64. };
  65. fxosc: fxosc {
  66. compatible = "fixed-clock";
  67. #clock-cells = <0>;
  68. clock-frequency = <24000000>;
  69. };
  70. sxosc: sxosc {
  71. compatible = "fixed-clock";
  72. #clock-cells = <0>;
  73. clock-frequency = <32768>;
  74. };
  75. reboot: syscon-reboot {
  76. compatible = "syscon-reboot";
  77. regmap = <&src>;
  78. offset = <0x0>;
  79. mask = <0x1000>;
  80. };
  81. soc {
  82. #address-cells = <1>;
  83. #size-cells = <1>;
  84. compatible = "simple-bus";
  85. interrupt-parent = <&mscm_ir>;
  86. ranges;
  87. aips0: aips-bus@40000000 {
  88. compatible = "fsl,aips-bus", "simple-bus";
  89. #address-cells = <1>;
  90. #size-cells = <1>;
  91. reg = <0x40000000 0x00070000>;
  92. ranges;
  93. mscm_cpucfg: cpucfg@40001000 {
  94. compatible = "fsl,vf610-mscm-cpucfg", "syscon";
  95. reg = <0x40001000 0x800>;
  96. };
  97. mscm_ir: interrupt-controller@40001800 {
  98. compatible = "fsl,vf610-mscm-ir";
  99. reg = <0x40001800 0x400>;
  100. fsl,cpucfg = <&mscm_cpucfg>;
  101. interrupt-controller;
  102. #interrupt-cells = <2>;
  103. };
  104. edma0: dma-controller@40018000 {
  105. #dma-cells = <2>;
  106. compatible = "fsl,vf610-edma";
  107. reg = <0x40018000 0x2000>,
  108. <0x40024000 0x1000>,
  109. <0x40025000 0x1000>;
  110. dma-channels = <32>;
  111. interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
  112. <9 IRQ_TYPE_LEVEL_HIGH>;
  113. interrupt-names = "edma-tx", "edma-err";
  114. clock-names = "dmamux0", "dmamux1";
  115. clocks = <&clks VF610_CLK_DMAMUX0>,
  116. <&clks VF610_CLK_DMAMUX1>;
  117. status = "disabled";
  118. };
  119. can0: flexcan@40020000 {
  120. compatible = "fsl,vf610-flexcan";
  121. reg = <0x40020000 0x4000>;
  122. interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
  123. clocks = <&clks VF610_CLK_FLEXCAN0>,
  124. <&clks VF610_CLK_FLEXCAN0>;
  125. clock-names = "ipg", "per";
  126. status = "disabled";
  127. };
  128. uart0: serial@40027000 {
  129. compatible = "fsl,vf610-lpuart";
  130. reg = <0x40027000 0x1000>;
  131. interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
  132. clocks = <&clks VF610_CLK_UART0>;
  133. clock-names = "ipg";
  134. dmas = <&edma0 0 2>,
  135. <&edma0 0 3>;
  136. dma-names = "rx","tx";
  137. status = "disabled";
  138. };
  139. uart1: serial@40028000 {
  140. compatible = "fsl,vf610-lpuart";
  141. reg = <0x40028000 0x1000>;
  142. interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
  143. clocks = <&clks VF610_CLK_UART1>;
  144. clock-names = "ipg";
  145. dmas = <&edma0 0 4>,
  146. <&edma0 0 5>;
  147. dma-names = "rx","tx";
  148. status = "disabled";
  149. };
  150. uart2: serial@40029000 {
  151. compatible = "fsl,vf610-lpuart";
  152. reg = <0x40029000 0x1000>;
  153. interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
  154. clocks = <&clks VF610_CLK_UART2>;
  155. clock-names = "ipg";
  156. dmas = <&edma0 0 6>,
  157. <&edma0 0 7>;
  158. dma-names = "rx","tx";
  159. status = "disabled";
  160. };
  161. uart3: serial@4002a000 {
  162. compatible = "fsl,vf610-lpuart";
  163. reg = <0x4002a000 0x1000>;
  164. interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
  165. clocks = <&clks VF610_CLK_UART3>;
  166. clock-names = "ipg";
  167. dmas = <&edma0 0 8>,
  168. <&edma0 0 9>;
  169. dma-names = "rx","tx";
  170. status = "disabled";
  171. };
  172. dspi0: dspi0@4002c000 {
  173. #address-cells = <1>;
  174. #size-cells = <0>;
  175. compatible = "fsl,vf610-dspi";
  176. reg = <0x4002c000 0x1000>;
  177. interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
  178. clocks = <&clks VF610_CLK_DSPI0>;
  179. clock-names = "dspi";
  180. spi-num-chipselects = <6>;
  181. status = "disabled";
  182. };
  183. dspi1: dspi1@4002d000 {
  184. #address-cells = <1>;
  185. #size-cells = <0>;
  186. compatible = "fsl,vf610-dspi";
  187. reg = <0x4002d000 0x1000>;
  188. interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
  189. clocks = <&clks VF610_CLK_DSPI1>;
  190. clock-names = "dspi";
  191. spi-num-chipselects = <4>;
  192. status = "disabled";
  193. };
  194. sai0: sai@4002f000 {
  195. compatible = "fsl,vf610-sai";
  196. reg = <0x4002f000 0x1000>;
  197. interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
  198. clocks = <&clks VF610_CLK_SAI0>,
  199. <&clks VF610_CLK_SAI0_DIV>,
  200. <&clks 0>, <&clks 0>;
  201. clock-names = "bus", "mclk1", "mclk2", "mclk3";
  202. dma-names = "tx", "rx";
  203. dmas = <&edma0 0 17>,
  204. <&edma0 0 16>;
  205. status = "disabled";
  206. };
  207. sai1: sai@40030000 {
  208. compatible = "fsl,vf610-sai";
  209. reg = <0x40030000 0x1000>;
  210. interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
  211. clocks = <&clks VF610_CLK_SAI1>,
  212. <&clks VF610_CLK_SAI1_DIV>,
  213. <&clks 0>, <&clks 0>;
  214. clock-names = "bus", "mclk1", "mclk2", "mclk3";
  215. dma-names = "tx", "rx";
  216. dmas = <&edma0 0 19>,
  217. <&edma0 0 18>;
  218. status = "disabled";
  219. };
  220. sai2: sai@40031000 {
  221. compatible = "fsl,vf610-sai";
  222. reg = <0x40031000 0x1000>;
  223. interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
  224. clocks = <&clks VF610_CLK_SAI2>,
  225. <&clks VF610_CLK_SAI2_DIV>,
  226. <&clks 0>, <&clks 0>;
  227. clock-names = "bus", "mclk1", "mclk2", "mclk3";
  228. dma-names = "tx", "rx";
  229. dmas = <&edma0 0 21>,
  230. <&edma0 0 20>;
  231. status = "disabled";
  232. };
  233. sai3: sai@40032000 {
  234. compatible = "fsl,vf610-sai";
  235. reg = <0x40032000 0x1000>;
  236. interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
  237. clocks = <&clks VF610_CLK_SAI3>,
  238. <&clks VF610_CLK_SAI3_DIV>,
  239. <&clks 0>, <&clks 0>;
  240. clock-names = "bus", "mclk1", "mclk2", "mclk3";
  241. dma-names = "tx", "rx";
  242. dmas = <&edma0 1 9>,
  243. <&edma0 1 8>;
  244. status = "disabled";
  245. };
  246. pit: pit@40037000 {
  247. compatible = "fsl,vf610-pit";
  248. reg = <0x40037000 0x1000>;
  249. interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
  250. clocks = <&clks VF610_CLK_PIT>;
  251. clock-names = "pit";
  252. };
  253. pwm0: pwm@40038000 {
  254. compatible = "fsl,vf610-ftm-pwm";
  255. #pwm-cells = <3>;
  256. reg = <0x40038000 0x1000>;
  257. clock-names = "ftm_sys", "ftm_ext",
  258. "ftm_fix", "ftm_cnt_clk_en";
  259. clocks = <&clks VF610_CLK_FTM0>,
  260. <&clks VF610_CLK_FTM0_EXT_SEL>,
  261. <&clks VF610_CLK_FTM0_FIX_SEL>,
  262. <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
  263. status = "disabled";
  264. };
  265. pwm1: pwm@40039000 {
  266. compatible = "fsl,vf610-ftm-pwm";
  267. #pwm-cells = <3>;
  268. reg = <0x40039000 0x1000>;
  269. clock-names = "ftm_sys", "ftm_ext",
  270. "ftm_fix", "ftm_cnt_clk_en";
  271. clocks = <&clks VF610_CLK_FTM1>,
  272. <&clks VF610_CLK_FTM1_EXT_SEL>,
  273. <&clks VF610_CLK_FTM1_FIX_SEL>,
  274. <&clks VF610_CLK_FTM1_EXT_FIX_EN>;
  275. status = "disabled";
  276. };
  277. adc0: adc@4003b000 {
  278. compatible = "fsl,vf610-adc";
  279. reg = <0x4003b000 0x1000>;
  280. interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
  281. clocks = <&clks VF610_CLK_ADC0>;
  282. clock-names = "adc";
  283. #io-channel-cells = <1>;
  284. status = "disabled";
  285. fsl,adck-max-frequency = <30000000>, <40000000>,
  286. <20000000>;
  287. };
  288. tcon0: timing-controller@4003d000 {
  289. compatible = "fsl,vf610-tcon";
  290. reg = <0x4003d000 0x1000>;
  291. clocks = <&clks VF610_CLK_TCON0>;
  292. clock-names = "ipg";
  293. status = "disabled";
  294. };
  295. wdoga5: wdog@4003e000 {
  296. compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
  297. reg = <0x4003e000 0x1000>;
  298. interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
  299. clocks = <&clks VF610_CLK_WDT>;
  300. clock-names = "wdog";
  301. status = "disabled";
  302. };
  303. qspi0: quadspi@40044000 {
  304. #address-cells = <1>;
  305. #size-cells = <0>;
  306. compatible = "fsl,vf610-qspi";
  307. reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
  308. reg-names = "QuadSPI", "QuadSPI-memory";
  309. interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
  310. clocks = <&clks VF610_CLK_QSPI0_EN>,
  311. <&clks VF610_CLK_QSPI0>;
  312. clock-names = "qspi_en", "qspi";
  313. status = "disabled";
  314. };
  315. iomuxc: iomuxc@40048000 {
  316. compatible = "fsl,vf610-iomuxc";
  317. reg = <0x40048000 0x1000>;
  318. };
  319. gpio0: gpio@40049000 {
  320. compatible = "fsl,vf610-gpio";
  321. reg = <0x40049000 0x1000 0x400ff000 0x40>;
  322. gpio-controller;
  323. #gpio-cells = <2>;
  324. interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
  325. interrupt-controller;
  326. #interrupt-cells = <2>;
  327. gpio-ranges = <&iomuxc 0 0 32>;
  328. };
  329. gpio1: gpio@4004a000 {
  330. compatible = "fsl,vf610-gpio";
  331. reg = <0x4004a000 0x1000 0x400ff040 0x40>;
  332. gpio-controller;
  333. #gpio-cells = <2>;
  334. interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
  335. interrupt-controller;
  336. #interrupt-cells = <2>;
  337. gpio-ranges = <&iomuxc 0 32 32>;
  338. };
  339. gpio2: gpio@4004b000 {
  340. compatible = "fsl,vf610-gpio";
  341. reg = <0x4004b000 0x1000 0x400ff080 0x40>;
  342. gpio-controller;
  343. #gpio-cells = <2>;
  344. interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
  345. interrupt-controller;
  346. #interrupt-cells = <2>;
  347. gpio-ranges = <&iomuxc 0 64 32>;
  348. };
  349. gpio3: gpio@4004c000 {
  350. compatible = "fsl,vf610-gpio";
  351. reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
  352. gpio-controller;
  353. #gpio-cells = <2>;
  354. interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
  355. interrupt-controller;
  356. #interrupt-cells = <2>;
  357. gpio-ranges = <&iomuxc 0 96 32>;
  358. };
  359. gpio4: gpio@4004d000 {
  360. compatible = "fsl,vf610-gpio";
  361. reg = <0x4004d000 0x1000 0x400ff100 0x40>;
  362. gpio-controller;
  363. #gpio-cells = <2>;
  364. interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
  365. interrupt-controller;
  366. #interrupt-cells = <2>;
  367. gpio-ranges = <&iomuxc 0 128 7>;
  368. };
  369. anatop: anatop@40050000 {
  370. compatible = "fsl,vf610-anatop", "syscon";
  371. reg = <0x40050000 0x400>;
  372. };
  373. usbphy0: usbphy@40050800 {
  374. compatible = "fsl,vf610-usbphy";
  375. reg = <0x40050800 0x400>;
  376. interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
  377. clocks = <&clks VF610_CLK_USBPHY0>;
  378. fsl,anatop = <&anatop>;
  379. status = "disabled";
  380. };
  381. usbphy1: usbphy@40050c00 {
  382. compatible = "fsl,vf610-usbphy";
  383. reg = <0x40050c00 0x400>;
  384. interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
  385. clocks = <&clks VF610_CLK_USBPHY1>;
  386. fsl,anatop = <&anatop>;
  387. status = "disabled";
  388. };
  389. dcu0: dcu@40058000 {
  390. compatible = "fsl,vf610-dcu";
  391. reg = <0x40058000 0x1200>;
  392. interrupts = <30 IRQ_TYPE_LEVEL_HIGH>;
  393. clocks = <&clks VF610_CLK_DCU0>,
  394. <&clks VF610_CLK_DCU0_DIV>;
  395. clock-names = "dcu", "pix";
  396. fsl,tcon = <&tcon0>;
  397. status = "disabled";
  398. };
  399. i2c0: i2c@40066000 {
  400. #address-cells = <1>;
  401. #size-cells = <0>;
  402. compatible = "fsl,vf610-i2c";
  403. reg = <0x40066000 0x1000>;
  404. interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
  405. clocks = <&clks VF610_CLK_I2C0>;
  406. clock-names = "ipg";
  407. dmas = <&edma0 0 50>,
  408. <&edma0 0 51>;
  409. dma-names = "rx","tx";
  410. status = "disabled";
  411. };
  412. i2c1: i2c@40067000 {
  413. #address-cells = <1>;
  414. #size-cells = <0>;
  415. compatible = "fsl,vf610-i2c";
  416. reg = <0x40067000 0x1000>;
  417. interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
  418. clocks = <&clks VF610_CLK_I2C1>;
  419. clock-names = "ipg";
  420. dmas = <&edma0 0 52>,
  421. <&edma0 0 53>;
  422. dma-names = "rx","tx";
  423. status = "disabled";
  424. };
  425. clks: ccm@4006b000 {
  426. compatible = "fsl,vf610-ccm";
  427. reg = <0x4006b000 0x1000>;
  428. clocks = <&sxosc>, <&fxosc>;
  429. clock-names = "sxosc", "fxosc";
  430. #clock-cells = <1>;
  431. };
  432. usbdev0: usb@40034000 {
  433. compatible = "fsl,vf610-usb", "fsl,imx27-usb";
  434. reg = <0x40034000 0x800>;
  435. interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
  436. clocks = <&clks VF610_CLK_USBC0>;
  437. fsl,usbphy = <&usbphy0>;
  438. fsl,usbmisc = <&usbmisc0 0>;
  439. dr_mode = "peripheral";
  440. status = "disabled";
  441. };
  442. usbmisc0: usb@40034800 {
  443. #index-cells = <1>;
  444. compatible = "fsl,vf610-usbmisc";
  445. reg = <0x40034800 0x200>;
  446. clocks = <&clks VF610_CLK_USBC0>;
  447. status = "disabled";
  448. };
  449. src: src@4006e000 {
  450. compatible = "fsl,vf610-src", "syscon";
  451. reg = <0x4006e000 0x1000>;
  452. interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
  453. };
  454. };
  455. aips1: aips-bus@40080000 {
  456. compatible = "fsl,aips-bus", "simple-bus";
  457. #address-cells = <1>;
  458. #size-cells = <1>;
  459. reg = <0x40080000 0x0007f000>;
  460. ranges;
  461. edma1: dma-controller@40098000 {
  462. #dma-cells = <2>;
  463. compatible = "fsl,vf610-edma";
  464. reg = <0x40098000 0x2000>,
  465. <0x400a1000 0x1000>,
  466. <0x400a2000 0x1000>;
  467. dma-channels = <32>;
  468. interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
  469. <11 IRQ_TYPE_LEVEL_HIGH>;
  470. interrupt-names = "edma-tx", "edma-err";
  471. clock-names = "dmamux0", "dmamux1";
  472. clocks = <&clks VF610_CLK_DMAMUX2>,
  473. <&clks VF610_CLK_DMAMUX3>;
  474. status = "disabled";
  475. };
  476. snvs0: snvs@400a7000 {
  477. compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
  478. reg = <0x400a7000 0x2000>;
  479. snvsrtc: snvs-rtc-lp {
  480. compatible = "fsl,sec-v4.0-mon-rtc-lp";
  481. regmap = <&snvs0>;
  482. offset = <0x34>;
  483. interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
  484. clocks = <&clks VF610_CLK_SNVS>;
  485. clock-names = "snvs-rtc";
  486. };
  487. };
  488. uart4: serial@400a9000 {
  489. compatible = "fsl,vf610-lpuart";
  490. reg = <0x400a9000 0x1000>;
  491. interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
  492. clocks = <&clks VF610_CLK_UART4>;
  493. clock-names = "ipg";
  494. status = "disabled";
  495. };
  496. uart5: serial@400aa000 {
  497. compatible = "fsl,vf610-lpuart";
  498. reg = <0x400aa000 0x1000>;
  499. interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
  500. clocks = <&clks VF610_CLK_UART5>;
  501. clock-names = "ipg";
  502. status = "disabled";
  503. };
  504. dspi2: dspi2@400ac000 {
  505. #address-cells = <1>;
  506. #size-cells = <0>;
  507. compatible = "fsl,vf610-dspi";
  508. reg = <0x400ac000 0x1000>;
  509. interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
  510. clocks = <&clks VF610_CLK_DSPI2>;
  511. clock-names = "dspi";
  512. spi-num-chipselects = <2>;
  513. status = "disabled";
  514. };
  515. dspi3: dspi3@400ad000 {
  516. #address-cells = <1>;
  517. #size-cells = <0>;
  518. compatible = "fsl,vf610-dspi";
  519. reg = <0x400ad000 0x1000>;
  520. interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
  521. clocks = <&clks VF610_CLK_DSPI3>;
  522. clock-names = "dspi";
  523. spi-num-chipselects = <2>;
  524. status = "disabled";
  525. };
  526. adc1: adc@400bb000 {
  527. compatible = "fsl,vf610-adc";
  528. reg = <0x400bb000 0x1000>;
  529. interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
  530. clocks = <&clks VF610_CLK_ADC1>;
  531. clock-names = "adc";
  532. #io-channel-cells = <1>;
  533. status = "disabled";
  534. fsl,adck-max-frequency = <30000000>, <40000000>,
  535. <20000000>;
  536. };
  537. esdhc0: esdhc@400b1000 {
  538. compatible = "fsl,imx53-esdhc";
  539. reg = <0x400b1000 0x1000>;
  540. interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
  541. clocks = <&clks VF610_CLK_IPG_BUS>,
  542. <&clks VF610_CLK_PLATFORM_BUS>,
  543. <&clks VF610_CLK_ESDHC0>;
  544. clock-names = "ipg", "ahb", "per";
  545. status = "disabled";
  546. };
  547. esdhc1: esdhc@400b2000 {
  548. compatible = "fsl,imx53-esdhc";
  549. reg = <0x400b2000 0x1000>;
  550. interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
  551. clocks = <&clks VF610_CLK_IPG_BUS>,
  552. <&clks VF610_CLK_PLATFORM_BUS>,
  553. <&clks VF610_CLK_ESDHC1>;
  554. clock-names = "ipg", "ahb", "per";
  555. status = "disabled";
  556. };
  557. usbh1: usb@400b4000 {
  558. compatible = "fsl,vf610-usb", "fsl,imx27-usb";
  559. reg = <0x400b4000 0x800>;
  560. interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
  561. clocks = <&clks VF610_CLK_USBC1>;
  562. fsl,usbphy = <&usbphy1>;
  563. fsl,usbmisc = <&usbmisc1 0>;
  564. dr_mode = "host";
  565. status = "disabled";
  566. };
  567. usbmisc1: usb@400b4800 {
  568. #index-cells = <1>;
  569. compatible = "fsl,vf610-usbmisc";
  570. reg = <0x400b4800 0x200>;
  571. clocks = <&clks VF610_CLK_USBC1>;
  572. status = "disabled";
  573. };
  574. ftm: ftm@400b8000 {
  575. compatible = "fsl,ftm-timer";
  576. reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
  577. interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
  578. clock-names = "ftm-evt", "ftm-src",
  579. "ftm-evt-counter-en", "ftm-src-counter-en";
  580. clocks = <&clks VF610_CLK_FTM2>,
  581. <&clks VF610_CLK_FTM3>,
  582. <&clks VF610_CLK_FTM2_EXT_FIX_EN>,
  583. <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
  584. status = "disabled";
  585. };
  586. qspi1: quadspi@400c4000 {
  587. #address-cells = <1>;
  588. #size-cells = <0>;
  589. compatible = "fsl,vf610-qspi";
  590. reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
  591. reg-names = "QuadSPI", "QuadSPI-memory";
  592. interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
  593. clocks = <&clks VF610_CLK_QSPI1_EN>,
  594. <&clks VF610_CLK_QSPI1>;
  595. clock-names = "qspi_en", "qspi";
  596. status = "disabled";
  597. };
  598. dac0: dac@400cc000 {
  599. compatible = "fsl,vf610-dac";
  600. reg = <0x400cc000 1000>;
  601. interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
  602. clock-names = "dac";
  603. clocks = <&clks VF610_CLK_DAC0>;
  604. status = "disabled";
  605. };
  606. dac1: dac@400cd000 {
  607. compatible = "fsl,vf610-dac";
  608. reg = <0x400cd000 1000>;
  609. interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
  610. clock-names = "dac";
  611. clocks = <&clks VF610_CLK_DAC1>;
  612. status = "disabled";
  613. };
  614. fec0: ethernet@400d0000 {
  615. compatible = "fsl,mvf600-fec";
  616. reg = <0x400d0000 0x1000>;
  617. interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
  618. clocks = <&clks VF610_CLK_ENET0>,
  619. <&clks VF610_CLK_ENET0>,
  620. <&clks VF610_CLK_ENET>;
  621. clock-names = "ipg", "ahb", "ptp";
  622. status = "disabled";
  623. };
  624. fec1: ethernet@400d1000 {
  625. compatible = "fsl,mvf600-fec";
  626. reg = <0x400d1000 0x1000>;
  627. interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
  628. clocks = <&clks VF610_CLK_ENET1>,
  629. <&clks VF610_CLK_ENET1>,
  630. <&clks VF610_CLK_ENET>;
  631. clock-names = "ipg", "ahb", "ptp";
  632. status = "disabled";
  633. };
  634. can1: flexcan@400d4000 {
  635. compatible = "fsl,vf610-flexcan";
  636. reg = <0x400d4000 0x4000>;
  637. interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
  638. clocks = <&clks VF610_CLK_FLEXCAN1>,
  639. <&clks VF610_CLK_FLEXCAN1>;
  640. clock-names = "ipg", "per";
  641. status = "disabled";
  642. };
  643. nfc: nand@400e0000 {
  644. #address-cells = <1>;
  645. #size-cells = <0>;
  646. compatible = "fsl,vf610-nfc";
  647. reg = <0x400e0000 0x4000>;
  648. interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
  649. clocks = <&clks VF610_CLK_NFC>;
  650. clock-names = "nfc";
  651. status = "disabled";
  652. };
  653. i2c2: i2c@400e6000 {
  654. #address-cells = <1>;
  655. #size-cells = <0>;
  656. compatible = "fsl,vf610-i2c";
  657. reg = <0x400e6000 0x1000>;
  658. interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
  659. clocks = <&clks VF610_CLK_I2C2>;
  660. clock-names = "ipg";
  661. dmas = <&edma0 1 36>,
  662. <&edma0 1 37>;
  663. dma-names = "rx","tx";
  664. status = "disabled";
  665. };
  666. i2c3: i2c@400e7000 {
  667. #address-cells = <1>;
  668. #size-cells = <0>;
  669. compatible = "fsl,vf610-i2c";
  670. reg = <0x400e7000 0x1000>;
  671. interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
  672. clocks = <&clks VF610_CLK_I2C3>;
  673. clock-names = "ipg";
  674. dmas = <&edma0 1 38>,
  675. <&edma0 1 39>;
  676. dma-names = "rx","tx";
  677. status = "disabled";
  678. };
  679. };
  680. iio-hwmon {
  681. compatible = "iio-hwmon";
  682. io-channels = <&adc0 16>, <&adc1 16>;
  683. };
  684. };
  685. };