spear3xx.dtsi 3.2 KB

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  1. /*
  2. * DTS file for all SPEAr3xx SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&vic>;
  16. cpus {
  17. #address-cells = <0>;
  18. #size-cells = <0>;
  19. cpu {
  20. compatible = "arm,arm926ej-s";
  21. device_type = "cpu";
  22. };
  23. };
  24. memory {
  25. device_type = "memory";
  26. reg = <0 0x40000000>;
  27. };
  28. ahb {
  29. #address-cells = <1>;
  30. #size-cells = <1>;
  31. compatible = "simple-bus";
  32. ranges = <0xd0000000 0xd0000000 0x30000000>;
  33. vic: interrupt-controller@f1100000 {
  34. compatible = "arm,pl190-vic";
  35. interrupt-controller;
  36. reg = <0xf1100000 0x1000>;
  37. #interrupt-cells = <1>;
  38. };
  39. dma@fc400000 {
  40. compatible = "arm,pl080", "arm,primecell";
  41. reg = <0xfc400000 0x1000>;
  42. interrupt-parent = <&vic>;
  43. interrupts = <8>;
  44. status = "disabled";
  45. };
  46. gmac: eth@e0800000 {
  47. compatible = "st,spear600-gmac";
  48. reg = <0xe0800000 0x8000>;
  49. interrupts = <23 22>;
  50. interrupt-names = "macirq", "eth_wake_irq";
  51. phy-mode = "mii";
  52. status = "disabled";
  53. };
  54. smi: flash@fc000000 {
  55. compatible = "st,spear600-smi";
  56. #address-cells = <1>;
  57. #size-cells = <1>;
  58. reg = <0xfc000000 0x1000>;
  59. interrupts = <9>;
  60. status = "disabled";
  61. };
  62. spi0: spi@d0100000 {
  63. compatible = "arm,pl022", "arm,primecell";
  64. reg = <0xd0100000 0x1000>;
  65. interrupts = <20>;
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. status = "disabled";
  69. };
  70. ehci@e1800000 {
  71. compatible = "st,spear600-ehci", "usb-ehci";
  72. reg = <0xe1800000 0x1000>;
  73. interrupts = <26>;
  74. status = "disabled";
  75. };
  76. ohci@e1900000 {
  77. compatible = "st,spear600-ohci", "usb-ohci";
  78. reg = <0xe1900000 0x1000>;
  79. interrupts = <25>;
  80. status = "disabled";
  81. };
  82. ohci@e2100000 {
  83. compatible = "st,spear600-ohci", "usb-ohci";
  84. reg = <0xe2100000 0x1000>;
  85. interrupts = <27>;
  86. status = "disabled";
  87. };
  88. apb {
  89. #address-cells = <1>;
  90. #size-cells = <1>;
  91. compatible = "simple-bus";
  92. ranges = <0xd0000000 0xd0000000 0x30000000>;
  93. gpio0: gpio@fc980000 {
  94. compatible = "arm,pl061", "arm,primecell";
  95. reg = <0xfc980000 0x1000>;
  96. interrupts = <11>;
  97. gpio-controller;
  98. #gpio-cells = <2>;
  99. interrupt-controller;
  100. #interrupt-cells = <2>;
  101. status = "disabled";
  102. };
  103. i2c0: i2c@d0180000 {
  104. #address-cells = <1>;
  105. #size-cells = <0>;
  106. compatible = "snps,designware-i2c";
  107. reg = <0xd0180000 0x1000>;
  108. interrupts = <21>;
  109. status = "disabled";
  110. };
  111. rtc@fc900000 {
  112. compatible = "st,spear600-rtc";
  113. reg = <0xfc900000 0x1000>;
  114. interrupts = <10>;
  115. status = "disabled";
  116. };
  117. serial@d0000000 {
  118. compatible = "arm,pl011", "arm,primecell";
  119. reg = <0xd0000000 0x1000>;
  120. interrupts = <19>;
  121. status = "disabled";
  122. };
  123. wdt@fc880000 {
  124. compatible = "arm,sp805", "arm,primecell";
  125. reg = <0xfc880000 0x1000>;
  126. interrupts = <12>;
  127. status = "disabled";
  128. };
  129. timer@f0000000 {
  130. compatible = "st,spear-timer";
  131. reg = <0xf0000000 0x400>;
  132. interrupts = <2>;
  133. };
  134. };
  135. };
  136. };