spear310.dtsi 2.9 KB

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  1. /*
  2. * DTS file for SPEAr310 SoC
  3. *
  4. * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "spear3xx.dtsi"
  14. / {
  15. ahb {
  16. #address-cells = <1>;
  17. #size-cells = <1>;
  18. compatible = "simple-bus";
  19. ranges = <0x40000000 0x40000000 0x10000000
  20. 0xb0000000 0xb0000000 0x10000000
  21. 0xd0000000 0xd0000000 0x30000000>;
  22. pinmux: pinmux@b4000000 {
  23. compatible = "st,spear310-pinmux";
  24. reg = <0xb4000000 0x1000>;
  25. #gpio-range-cells = <3>;
  26. };
  27. fsmc: flash@44000000 {
  28. compatible = "st,spear600-fsmc-nand";
  29. #address-cells = <1>;
  30. #size-cells = <1>;
  31. reg = <0x44000000 0x1000 /* FSMC Register */
  32. 0x40000000 0x0010 /* NAND Base DATA */
  33. 0x40020000 0x0010 /* NAND Base ADDR */
  34. 0x40010000 0x0010>; /* NAND Base CMD */
  35. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  36. status = "disabled";
  37. };
  38. shirq: interrupt-controller@0xb4000000 {
  39. compatible = "st,spear310-shirq";
  40. reg = <0xb4000000 0x1000>;
  41. interrupts = <28 29 30 1>;
  42. #interrupt-cells = <1>;
  43. interrupt-controller;
  44. };
  45. apb {
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. compatible = "simple-bus";
  49. ranges = <0xb0000000 0xb0000000 0x10000000
  50. 0xd0000000 0xd0000000 0x30000000>;
  51. serial@b2000000 {
  52. compatible = "arm,pl011", "arm,primecell";
  53. reg = <0xb2000000 0x1000>;
  54. interrupts = <8>;
  55. interrupt-parent = <&shirq>;
  56. status = "disabled";
  57. };
  58. serial@b2080000 {
  59. compatible = "arm,pl011", "arm,primecell";
  60. reg = <0xb2080000 0x1000>;
  61. interrupts = <9>;
  62. interrupt-parent = <&shirq>;
  63. status = "disabled";
  64. };
  65. serial@b2100000 {
  66. compatible = "arm,pl011", "arm,primecell";
  67. reg = <0xb2100000 0x1000>;
  68. interrupts = <10>;
  69. interrupt-parent = <&shirq>;
  70. status = "disabled";
  71. };
  72. serial@b2180000 {
  73. compatible = "arm,pl011", "arm,primecell";
  74. reg = <0xb2180000 0x1000>;
  75. interrupts = <11>;
  76. interrupt-parent = <&shirq>;
  77. status = "disabled";
  78. };
  79. serial@b2200000 {
  80. compatible = "arm,pl011", "arm,primecell";
  81. reg = <0xb2200000 0x1000>;
  82. interrupts = <12>;
  83. interrupt-parent = <&shirq>;
  84. status = "disabled";
  85. };
  86. gpiopinctrl: gpio@b4000000 {
  87. compatible = "st,spear-plgpio";
  88. reg = <0xb4000000 0x1000>;
  89. #interrupt-cells = <1>;
  90. interrupt-controller;
  91. gpio-controller;
  92. #gpio-cells = <2>;
  93. gpio-ranges = <&pinmux 0 0 102>;
  94. status = "disabled";
  95. st-plgpio,ngpio = <102>;
  96. st-plgpio,enb-reg = <0x10>;
  97. st-plgpio,wdata-reg = <0x20>;
  98. st-plgpio,dir-reg = <0x30>;
  99. st-plgpio,ie-reg = <0x50>;
  100. st-plgpio,rdata-reg = <0x40>;
  101. st-plgpio,mis-reg = <0x60>;
  102. };
  103. };
  104. };
  105. };