sama5d3_can.dtsi 1.8 KB

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  1. /*
  2. * sama5d3_can.dtsi - Device Tree Include file for SAMA5D3 SoC with
  3. * CAN support
  4. *
  5. * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
  6. *
  7. * Licensed under GPLv2.
  8. */
  9. #include <dt-bindings/pinctrl/at91.h>
  10. #include <dt-bindings/interrupt-controller/irq.h>
  11. / {
  12. ahb {
  13. apb {
  14. pinctrl@fffff200 {
  15. can0 {
  16. pinctrl_can0_rx_tx: can0_rx_tx {
  17. atmel,pins =
  18. <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
  19. AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
  20. };
  21. };
  22. can1 {
  23. pinctrl_can1_rx_tx: can1_rx_tx {
  24. atmel,pins =
  25. <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
  26. AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
  27. };
  28. };
  29. };
  30. pmc: pmc@fffffc00 {
  31. periphck {
  32. can0_clk: can0_clk {
  33. #clock-cells = <0>;
  34. reg = <40>;
  35. atmel,clk-output-range = <0 66000000>;
  36. };
  37. can1_clk: can1_clk {
  38. #clock-cells = <0>;
  39. reg = <41>;
  40. atmel,clk-output-range = <0 66000000>;
  41. };
  42. };
  43. };
  44. can0: can@f000c000 {
  45. compatible = "atmel,at91sam9x5-can";
  46. reg = <0xf000c000 0x300>;
  47. interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&pinctrl_can0_rx_tx>;
  50. clocks = <&can0_clk>;
  51. clock-names = "can_clk";
  52. status = "disabled";
  53. };
  54. can1: can@f8010000 {
  55. compatible = "atmel,at91sam9x5-can";
  56. reg = <0xf8010000 0x300>;
  57. interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&pinctrl_can1_rx_tx>;
  60. clocks = <&can1_clk>;
  61. clock-names = "can_clk";
  62. status = "disabled";
  63. };
  64. };
  65. };
  66. };