s3c2416.dtsi 2.8 KB

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  1. /*
  2. * Samsung's S3C2416 SoC device tree source
  3. *
  4. * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <dt-bindings/clock/s3c2443.h>
  11. #include "s3c24xx.dtsi"
  12. #include "s3c2416-pinctrl.dtsi"
  13. / {
  14. model = "Samsung S3C2416 SoC";
  15. compatible = "samsung,s3c2416";
  16. aliases {
  17. serial3 = &uart_3;
  18. };
  19. cpus {
  20. #address-cells = <1>;
  21. #size-cells = <0>;
  22. cpu {
  23. compatible = "arm,arm926ej-s";
  24. };
  25. };
  26. interrupt-controller@4a000000 {
  27. compatible = "samsung,s3c2416-irq";
  28. };
  29. clocks: clock-controller@0x4c000000 {
  30. compatible = "samsung,s3c2416-clock";
  31. reg = <0x4c000000 0x40>;
  32. #clock-cells = <1>;
  33. };
  34. pinctrl@56000000 {
  35. compatible = "samsung,s3c2416-pinctrl";
  36. };
  37. timer@51000000 {
  38. clocks = <&clocks PCLK_PWM>;
  39. clock-names = "timers";
  40. };
  41. uart_0: serial@50000000 {
  42. compatible = "samsung,s3c2440-uart";
  43. clock-names = "uart", "clk_uart_baud2",
  44. "clk_uart_baud3";
  45. clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
  46. <&clocks SCLK_UART>;
  47. };
  48. uart_1: serial@50004000 {
  49. compatible = "samsung,s3c2440-uart";
  50. clock-names = "uart", "clk_uart_baud2",
  51. "clk_uart_baud3";
  52. clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
  53. <&clocks SCLK_UART>;
  54. };
  55. uart_2: serial@50008000 {
  56. compatible = "samsung,s3c2440-uart";
  57. clock-names = "uart", "clk_uart_baud2",
  58. "clk_uart_baud3";
  59. clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
  60. <&clocks SCLK_UART>;
  61. };
  62. uart_3: serial@5000C000 {
  63. compatible = "samsung,s3c2440-uart";
  64. reg = <0x5000C000 0x4000>;
  65. interrupts = <1 18 24 4>, <1 18 25 4>;
  66. clock-names = "uart", "clk_uart_baud2",
  67. "clk_uart_baud3";
  68. clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
  69. <&clocks SCLK_UART>;
  70. status = "disabled";
  71. };
  72. sdhci_1: sdhci@4AC00000 {
  73. compatible = "samsung,s3c6410-sdhci";
  74. reg = <0x4AC00000 0x100>;
  75. interrupts = <0 0 21 3>;
  76. clock-names = "hsmmc", "mmc_busclk.0",
  77. "mmc_busclk.2";
  78. clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
  79. <&clocks MUX_HSMMC0>;
  80. status = "disabled";
  81. };
  82. sdhci_0: sdhci@4A800000 {
  83. compatible = "samsung,s3c6410-sdhci";
  84. reg = <0x4A800000 0x100>;
  85. interrupts = <0 0 20 3>;
  86. clock-names = "hsmmc", "mmc_busclk.0",
  87. "mmc_busclk.2";
  88. clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
  89. <&clocks MUX_HSMMC1>;
  90. status = "disabled";
  91. };
  92. watchdog: watchdog@53000000 {
  93. interrupts = <1 9 27 3>;
  94. clocks = <&clocks PCLK_WDT>;
  95. clock-names = "watchdog";
  96. };
  97. rtc: rtc@57000000 {
  98. compatible = "samsung,s3c2416-rtc";
  99. clocks = <&clocks PCLK_RTC>;
  100. clock-names = "rtc";
  101. };
  102. i2c@54000000 {
  103. compatible = "samsung,s3c2440-i2c";
  104. clocks = <&clocks PCLK_I2C0>;
  105. clock-names = "i2c";
  106. };
  107. };