pxa3xx.dtsi 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255
  1. /* The pxa3xx skeleton simply augments the 2xx version */
  2. #include "pxa2xx.dtsi"
  3. #define MFP_PIN_PXA300(gpio) \
  4. ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
  5. (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
  6. (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
  7. (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
  8. 0)
  9. #define MFP_PIN_PXA310(gpio) \
  10. ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
  11. (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
  12. (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
  13. (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
  14. (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
  15. (gpio <= 262) ? 0 : \
  16. (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
  17. 0)
  18. #define MFP_PIN_PXA320(gpio) \
  19. ((gpio <= 4) ? (0x0124 + 4 * gpio) : \
  20. (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
  21. (gpio <= 10) ? (0x0458 + 4 * (gpio - 10)) : \
  22. (gpio <= 26) ? (0x02a0 + 4 * (gpio - 11)) : \
  23. (gpio <= 48) ? (0x0400 + 4 * (gpio - 27)) : \
  24. (gpio <= 62) ? (0x045c + 4 * (gpio - 49)) : \
  25. (gpio <= 73) ? (0x04b4 + 4 * (gpio - 63)) : \
  26. (gpio <= 98) ? (0x04f0 + 4 * (gpio - 74)) : \
  27. (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
  28. 0)
  29. /*
  30. * MFP Alternate functions for pins having a gpio.
  31. * Example of use: pinctrl-single,pins = < MFP_PIN_PXA310(21) MFP_AF1 >
  32. */
  33. #define MFP_AF0 (0 << 0)
  34. #define MFP_AF1 (1 << 0)
  35. #define MFP_AF2 (2 << 0)
  36. #define MFP_AF3 (3 << 0)
  37. #define MFP_AF4 (4 << 0)
  38. #define MFP_AF5 (5 << 0)
  39. #define MFP_AF6 (6 << 0)
  40. /*
  41. * MFP drive strength functions for pins.
  42. * Example of use: pinctrl-single,drive-strength = MFP_DS03X;
  43. */
  44. #define MFP_DSMSK (0x7 << 10)
  45. #define MFP_DS01X < (0x0 << 10) MFP_DSMSK >
  46. #define MFP_DS02X < (0x1 << 10) MFP_DSMSK >
  47. #define MFP_DS03X < (0x2 << 10) MFP_DSMSK >
  48. #define MFP_DS04X < (0x3 << 10) MFP_DSMSK >
  49. #define MFP_DS06X < (0x4 << 10) MFP_DSMSK >
  50. #define MFP_DS08X < (0x5 << 10) MFP_DSMSK >
  51. #define MFP_DS10X < (0x6 << 10) MFP_DSMSK >
  52. #define MFP_DS13X < (0x7 << 10) MFP_DSMSK >
  53. /*
  54. * MFP low power mode for pins.
  55. * Example of use:
  56. * pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW|MFP_LPM_EDGE_FALL);
  57. *
  58. * Table that determines the low power modes outputs, with actual settings
  59. * used in parentheses for don't-care values. Except for the float output,
  60. * the configured driven and pulled levels match, so if there is a need for
  61. * non-LPM pulled output, the same configuration could probably be used.
  62. *
  63. * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel
  64. * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15)
  65. *
  66. * Input 0 X(0) X(0) X(0) 0
  67. * Drive 0 0 0 0 X(1) 0
  68. * Drive 1 0 1 X(1) 0 0
  69. * Pull hi (1) 1 X(1) 1 0 0
  70. * Pull lo (0) 1 X(0) 0 1 0
  71. * Z (float) 1 X(0) 0 0 0
  72. */
  73. #define MFP_LPM(x) < (x) MFP_LPM_MSK >
  74. #define MFP_LPM_MSK 0xe1f0
  75. #define MFP_LPM_INPUT 0x0000
  76. #define MFP_LPM_DRIVE_LOW 0x2000
  77. #define MFP_LPM_DRIVE_HIGH 0x4100
  78. #define MFP_LPM_PULL_LOW 0x2080
  79. #define MFP_LPM_PULL_HIGH 0x4180
  80. #define MFP_LPM_FLOAT 0x0080
  81. #define MFP_LPM_EDGE_NONE 0x0000
  82. #define MFP_LPM_EDGE_RISE 0x0010
  83. #define MFP_LPM_EDGE_FALL 0x0020
  84. #define MFP_LPM_EDGE_BOTH 0x0030
  85. / {
  86. model = "Marvell PXA3xx familiy SoC";
  87. compatible = "marvell,pxa3xx";
  88. pxabus {
  89. pdma: dma-controller@40000000 {
  90. compatible = "marvell,pdma-1.0";
  91. reg = <0x40000000 0x10000>;
  92. interrupts = <25>;
  93. #dma-channels = <32>;
  94. #dma-cells = <2>;
  95. #dma-requests = <100>;
  96. status = "okay";
  97. };
  98. pwri2c: i2c@40f500c0 {
  99. compatible = "mrvl,pwri2c";
  100. reg = <0x40f500c0 0x30>;
  101. interrupts = <6>;
  102. clocks = <&clks CLK_PWRI2C>;
  103. #address-cells = <0x1>;
  104. #size-cells = <0>;
  105. status = "disabled";
  106. };
  107. nand0: nand@43100000 {
  108. compatible = "marvell,pxa3xx-nand";
  109. reg = <0x43100000 90>;
  110. interrupts = <45>;
  111. clocks = <&clks CLK_NAND>;
  112. dmas = <&pdma 97 3>;
  113. dma-names = "data";
  114. #address-cells = <1>;
  115. #size-cells = <1>;
  116. status = "disabled";
  117. };
  118. pxairq: interrupt-controller@40d00000 {
  119. marvell,intc-priority;
  120. marvell,intc-nr-irqs = <56>;
  121. };
  122. pinctrl: pinctrl@40e10000 {
  123. compatible = "pinconf-single";
  124. reg = <0x40e10000 0xffff>;
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. pinctrl-single,register-width = <32>;
  128. pinctrl-single,function-mask = <0x7>;
  129. };
  130. gpio: gpio@40e00000 {
  131. compatible = "intel,pxa3xx-gpio";
  132. reg = <0x40e00000 0x10000>;
  133. clocks = <&clks CLK_GPIO>;
  134. interrupt-names = "gpio0", "gpio1", "gpio_mux";
  135. interrupts = <8 9 10>;
  136. gpio-controller;
  137. #gpio-cells = <0x2>;
  138. interrupt-controller;
  139. #interrupt-cells = <0x2>;
  140. };
  141. mmc0: mmc@41100000 {
  142. compatible = "marvell,pxa-mmc";
  143. reg = <0x41100000 0x1000>;
  144. interrupts = <23>;
  145. clocks = <&clks CLK_MMC>;
  146. dmas = <&pdma 21 3
  147. &pdma 22 3>;
  148. dma-names = "rx", "tx";
  149. status = "disabled";
  150. };
  151. mmc1: mmc@42000000 {
  152. compatible = "marvell,pxa-mmc";
  153. reg = <0x42000000 0x1000>;
  154. interrupts = <41>;
  155. clocks = <&clks CLK_MMC1>;
  156. dmas = <&pdma 93 3
  157. &pdma 94 3>;
  158. dma-names = "rx", "tx";
  159. status = "disabled";
  160. };
  161. mmc2: mmc@42500000 {
  162. compatible = "marvell,pxa-mmc";
  163. reg = <0x42500000 0x1000>;
  164. interrupts = <55>;
  165. clocks = <&clks CLK_MMC2>;
  166. dmas = <&pdma 46 3
  167. &pdma 47 3>;
  168. dma-names = "rx", "tx";
  169. status = "disabled";
  170. };
  171. pxa3xx_ohci: usb@4c000000 {
  172. compatible = "marvell,pxa-ohci";
  173. reg = <0x4c000000 0x10000>;
  174. interrupts = <3>;
  175. clocks = <&clks CLK_USBH>;
  176. status = "disabled";
  177. };
  178. pwm0: pwm@40b00000 {
  179. compatible = "marvell,pxa270-pwm";
  180. reg = <0x40b00000 0x10>;
  181. #pwm-cells = <1>;
  182. clocks = <&clks CLK_PWM0>;
  183. status = "disabled";
  184. };
  185. pwm1: pwm@40b00010 {
  186. compatible = "marvell,pxa270-pwm";
  187. reg = <0x40b00010 0x10>;
  188. #pwm-cells = <1>;
  189. clocks = <&clks CLK_PWM1>;
  190. status = "disabled";
  191. };
  192. pwm2: pwm@40c00000 {
  193. compatible = "marvell,pxa270-pwm";
  194. reg = <0x40c00000 0x10>;
  195. #pwm-cells = <1>;
  196. clocks = <&clks CLK_PWM0>;
  197. status = "disabled";
  198. };
  199. pwm3: pwm@40c00010 {
  200. compatible = "marvell,pxa270-pwm";
  201. reg = <0x40c00010 0x10>;
  202. #pwm-cells = <1>;
  203. clocks = <&clks CLK_PWM1>;
  204. status = "disabled";
  205. };
  206. };
  207. clocks {
  208. /*
  209. * The muxing of external clocks/internal dividers for osc* clock
  210. * sources has been hidden under the carpet by now.
  211. */
  212. #address-cells = <1>;
  213. #size-cells = <1>;
  214. ranges;
  215. clks: pxa3xx_clks@41300004 {
  216. compatible = "marvell,pxa300-clocks";
  217. #clock-cells = <1>;
  218. status = "okay";
  219. };
  220. };
  221. timer@40a00000 {
  222. compatible = "marvell,pxa-timer";
  223. reg = <0x40a00000 0x20>;
  224. interrupts = <26>;
  225. clocks = <&clks CLK_OSTIMER>;
  226. status = "okay";
  227. };
  228. };