pm9g45.dts 2.8 KB

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  1. /*
  2. * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
  3. *
  4. * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5. *
  6. * Licensed under GPLv2.
  7. */
  8. /dts-v1/;
  9. #include "at91sam9g45.dtsi"
  10. / {
  11. model = "Ronetix pm9g45";
  12. compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
  13. chosen {
  14. bootargs = "console=ttyS0,115200";
  15. };
  16. memory {
  17. reg = <0x70000000 0x8000000>;
  18. };
  19. clocks {
  20. slow_xtal {
  21. clock-frequency = <32768>;
  22. };
  23. main_xtal {
  24. clock-frequency = <12000000>;
  25. };
  26. };
  27. ahb {
  28. apb {
  29. dbgu: serial@ffffee00 {
  30. status = "okay";
  31. };
  32. pinctrl@fffff200 {
  33. board {
  34. pinctrl_board_nand: nand0-board {
  35. atmel,pins =
  36. <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
  37. AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
  38. };
  39. };
  40. mmc {
  41. pinctrl_board_mmc: mmc0-board {
  42. atmel,pins =
  43. <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
  44. };
  45. };
  46. };
  47. mmc0: mmc@fff80000 {
  48. pinctrl-0 = <
  49. &pinctrl_board_mmc
  50. &pinctrl_mmc0_slot0_clk_cmd_dat0
  51. &pinctrl_mmc0_slot0_dat1_3>;
  52. status = "okay";
  53. slot@0 {
  54. reg = <0>;
  55. bus-width = <4>;
  56. cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
  57. };
  58. };
  59. macb0: ethernet@fffbc000 {
  60. phy-mode = "rmii";
  61. status = "okay";
  62. };
  63. };
  64. nand0: nand@40000000 {
  65. nand-bus-width = <8>;
  66. nand-ecc-mode = "soft";
  67. nand-on-flash-bbt;
  68. pinctrl-0 = <&pinctrl_board_nand>;
  69. gpios = <&pioD 3 GPIO_ACTIVE_HIGH
  70. &pioC 14 GPIO_ACTIVE_HIGH
  71. 0
  72. >;
  73. status = "okay";
  74. at91bootstrap@0 {
  75. label = "at91bootstrap";
  76. reg = <0x0 0x20000>;
  77. };
  78. barebox@20000 {
  79. label = "barebox";
  80. reg = <0x20000 0x40000>;
  81. };
  82. bareboxenv@60000 {
  83. label = "bareboxenv";
  84. reg = <0x60000 0x1A0000>;
  85. };
  86. kernel@200000 {
  87. label = "bareboxenv2";
  88. reg = <0x200000 0x300000>;
  89. };
  90. kernel@500000 {
  91. label = "root";
  92. reg = <0x500000 0x400000>;
  93. };
  94. data@900000 {
  95. label = "data";
  96. reg = <0x900000 0x8340000>;
  97. };
  98. };
  99. usb0: ohci@00700000 {
  100. status = "okay";
  101. num-ports = <2>;
  102. };
  103. usb1: ehci@00800000 {
  104. status = "okay";
  105. };
  106. };
  107. leds {
  108. compatible = "gpio-leds";
  109. led0 {
  110. label = "led0";
  111. gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
  112. linux,default-trigger = "nand-disk";
  113. };
  114. led1 {
  115. label = "led1";
  116. gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
  117. linux,default-trigger = "heartbeat";
  118. };
  119. };
  120. gpio_keys {
  121. compatible = "gpio-keys";
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. right {
  125. label = "SW4";
  126. gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
  127. linux,code = <106>;
  128. };
  129. up {
  130. label = "SW3";
  131. gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
  132. linux,code = <103>;
  133. };
  134. };
  135. };