omap3-n950-n9.dtsi 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438
  1. /*
  2. * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
  3. *
  4. * Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include "omap36xx.dtsi"
  11. / {
  12. cpus {
  13. cpu@0 {
  14. cpu0-supply = <&vcc>;
  15. operating-points = <
  16. /* kHz uV */
  17. 300000 1012500
  18. 600000 1200000
  19. 800000 1325000
  20. 1000000 1375000
  21. >;
  22. };
  23. };
  24. memory@80000000 {
  25. device_type = "memory";
  26. reg = <0x80000000 0x40000000>; /* 1 GB */
  27. };
  28. vemmc: fixedregulator0 {
  29. compatible = "regulator-fixed";
  30. regulator-name = "VEMMC";
  31. regulator-min-microvolt = <2900000>;
  32. regulator-max-microvolt = <2900000>;
  33. gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */
  34. startup-delay-us = <150>;
  35. enable-active-high;
  36. };
  37. vwlan_fixed: fixedregulator2 {
  38. compatible = "regulator-fixed";
  39. regulator-name = "VWLAN";
  40. gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */
  41. enable-active-high;
  42. regulator-boot-off;
  43. };
  44. leds {
  45. compatible = "gpio-leds";
  46. heartbeat {
  47. label = "debug::sleep";
  48. gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; /* gpio92 */
  49. linux,default-trigger = "default-on";
  50. pinctrl-names = "default";
  51. pinctrl-0 = <&debug_leds>;
  52. };
  53. };
  54. };
  55. &omap3_pmx_core {
  56. accelerator_pins: pinmux_accelerator_pins {
  57. pinctrl-single,pins = <
  58. OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4) /* mcspi2_somi.gpio_180 -> LIS302 INT1 */
  59. OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4) /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */
  60. >;
  61. };
  62. debug_leds: pinmux_debug_led_pins {
  63. pinctrl-single,pins = <
  64. OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4) /* dss_data22.gpio_92 */
  65. >;
  66. };
  67. mmc2_pins: pinmux_mmc2_pins {
  68. pinctrl-single,pins = <
  69. OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
  70. OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
  71. OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
  72. OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
  73. OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
  74. OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
  75. >;
  76. };
  77. wlan_pins: pinmux_wlan_pins {
  78. pinctrl-single,pins = <
  79. OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE4) /* gpio 35 - wlan enable */
  80. OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 - wlan irq */
  81. >;
  82. };
  83. ssi_pins: pinmux_ssi_pins {
  84. pinctrl-single,pins = <
  85. OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
  86. OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
  87. OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
  88. OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
  89. OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
  90. OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
  91. OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
  92. OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
  93. >;
  94. };
  95. ssi_pins_idle: pinmux_ssi_pins_idle {
  96. pinctrl-single,pins = <
  97. OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7) /* ssi1_dat_tx */
  98. OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7) /* ssi1_flag_tx */
  99. OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7) /* ssi1_rdy_tx */
  100. OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
  101. OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7) /* ssi1_dat_rx */
  102. OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7) /* ssi1_flag_rx */
  103. OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4) /* ssi1_rdy_rx */
  104. OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE7) /* ssi1_wake */
  105. >;
  106. };
  107. modem_pins1: pinmux_modem_core1_pins {
  108. pinctrl-single,pins = <
  109. OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | MUX_MODE4) /* gpio_34 (ape_rst_rq) */
  110. OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst_rq) */
  111. OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */
  112. >;
  113. };
  114. };
  115. &omap3_pmx_core2 {
  116. modem_pins2: pinmux_modem_core2_pins {
  117. pinctrl-single,pins = <
  118. OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) /* gpio_23 (cmt_en) */
  119. >;
  120. };
  121. };
  122. &i2c1 {
  123. clock-frequency = <2900000>;
  124. twl: twl@48 {
  125. reg = <0x48>;
  126. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  127. interrupt-parent = <&intc>;
  128. };
  129. };
  130. /include/ "twl4030.dtsi"
  131. &twl {
  132. compatible = "ti,twl5031";
  133. twl_power: power {
  134. compatible = "ti,twl4030-power";
  135. ti,use_poweroff;
  136. };
  137. };
  138. &twl_gpio {
  139. ti,pullups = <0x000001>; /* BIT(0) */
  140. ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
  141. };
  142. &vdac {
  143. regulator-name = "vdac";
  144. regulator-min-microvolt = <1800000>;
  145. regulator-max-microvolt = <1800000>;
  146. };
  147. &vpll1 {
  148. regulator-name = "vpll1";
  149. regulator-min-microvolt = <1800000>;
  150. regulator-max-microvolt = <1800000>;
  151. };
  152. &vpll2 {
  153. regulator-name = "vpll2";
  154. regulator-min-microvolt = <1800000>;
  155. regulator-max-microvolt = <1800000>;
  156. };
  157. &vaux1 {
  158. regulator-name = "vaux1";
  159. regulator-min-microvolt = <2800000>;
  160. regulator-max-microvolt = <2800000>;
  161. };
  162. /* CSI-2 receiver */
  163. &vaux2 {
  164. regulator-name = "vaux2";
  165. regulator-min-microvolt = <1800000>;
  166. regulator-max-microvolt = <1800000>;
  167. };
  168. /* Cameras */
  169. &vaux3 {
  170. regulator-name = "vaux3";
  171. regulator-min-microvolt = <2800000>;
  172. regulator-max-microvolt = <2800000>;
  173. };
  174. &vaux4 {
  175. regulator-name = "vaux4";
  176. regulator-min-microvolt = <2800000>;
  177. regulator-max-microvolt = <2800000>;
  178. };
  179. &vmmc1 {
  180. regulator-name = "vmmc1";
  181. regulator-min-microvolt = <1850000>;
  182. regulator-max-microvolt = <3150000>;
  183. };
  184. &vmmc2 {
  185. regulator-name = "vmmc2";
  186. regulator-min-microvolt = <3000000>;
  187. regulator-max-microvolt = <3000000>;
  188. };
  189. &vintana1 {
  190. regulator-name = "vintana1";
  191. regulator-min-microvolt = <1500000>;
  192. regulator-max-microvolt = <1500000>;
  193. };
  194. &vintana2 {
  195. regulator-name = "vintana2";
  196. regulator-min-microvolt = <2750000>;
  197. regulator-max-microvolt = <2750000>;
  198. };
  199. &vintdig {
  200. regulator-name = "vintdig";
  201. regulator-min-microvolt = <1500000>;
  202. regulator-max-microvolt = <1500000>;
  203. };
  204. &vsim {
  205. regulator-name = "vsim";
  206. regulator-min-microvolt = <1800000>;
  207. regulator-max-microvolt = <1800000>;
  208. };
  209. &vio {
  210. regulator-name = "vio";
  211. regulator-min-microvolt = <1800000>;
  212. regulator-max-microvolt = <1800000>;
  213. };
  214. &i2c2 {
  215. clock-frequency = <400000>;
  216. };
  217. &i2c3 {
  218. clock-frequency = <400000>;
  219. lis302: lis302@1d {
  220. compatible = "st,lis3lv02d";
  221. reg = <0x1d>;
  222. Vdd-supply = <&vaux1>;
  223. Vdd_IO-supply = <&vio>;
  224. pinctrl-names = "default";
  225. pinctrl-0 = <&accelerator_pins>;
  226. interrupts-extended = <&gpio6 20 IRQ_TYPE_EDGE_FALLING>, <&gpio6 21 IRQ_TYPE_EDGE_FALLING>; /* 180, 181 */
  227. /* click flags */
  228. st,click-single-x;
  229. st,click-single-y;
  230. st,click-single-z;
  231. /* Limits are 0.5g * value */
  232. st,click-threshold-x = <8>;
  233. st,click-threshold-y = <8>;
  234. st,click-threshold-z = <10>;
  235. /* Click must be longer than time limit */
  236. st,click-time-limit = <9>;
  237. /* Kind of debounce filter */
  238. st,click-latency = <50>;
  239. st,wakeup-x-hi;
  240. st,wakeup-y-hi;
  241. st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
  242. st,wakeup2-z-hi;
  243. st,wakeup2-threshold = <(1000/18)>; /* millig-value / 18 to get HW values */
  244. st,highpass-cutoff-hz = <2>;
  245. /* Interrupt line 1 for thresholds */
  246. st,irq1-ff-wu-1;
  247. st,irq1-ff-wu-2;
  248. /* Interrupt line 2 for click detection */
  249. st,irq2-click;
  250. st,wu-duration-1 = <8>;
  251. st,wu-duration-2 = <8>;
  252. };
  253. };
  254. &mmc1 {
  255. status = "disabled";
  256. };
  257. &mmc2 {
  258. pinctrl-names = "default";
  259. pinctrl-0 = <&mmc2_pins>;
  260. vmmc-supply = <&vemmc>;
  261. bus-width = <4>;
  262. ti,non-removable;
  263. };
  264. &mmc3 {
  265. status = "disabled";
  266. };
  267. &usb_otg_hs {
  268. interface-type = <0>;
  269. usb-phy = <&usb2_phy>;
  270. phys = <&usb2_phy>;
  271. phy-names = "usb2-phy";
  272. mode = <3>;
  273. power = <50>;
  274. };
  275. &gpmc {
  276. ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
  277. onenand@0,0 {
  278. #address-cells = <1>;
  279. #size-cells = <1>;
  280. reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
  281. gpmc,sync-read;
  282. gpmc,sync-write;
  283. gpmc,burst-length = <16>;
  284. gpmc,burst-read;
  285. gpmc,burst-wrap;
  286. gpmc,burst-write;
  287. gpmc,device-width = <2>;
  288. gpmc,mux-add-data = <2>;
  289. gpmc,cs-on-ns = <0>;
  290. gpmc,cs-rd-off-ns = <87>;
  291. gpmc,cs-wr-off-ns = <87>;
  292. gpmc,adv-on-ns = <0>;
  293. gpmc,adv-rd-off-ns = <10>;
  294. gpmc,adv-wr-off-ns = <10>;
  295. gpmc,oe-on-ns = <15>;
  296. gpmc,oe-off-ns = <87>;
  297. gpmc,we-on-ns = <0>;
  298. gpmc,we-off-ns = <87>;
  299. gpmc,rd-cycle-ns = <112>;
  300. gpmc,wr-cycle-ns = <112>;
  301. gpmc,access-ns = <81>;
  302. gpmc,page-burst-access-ns = <15>;
  303. gpmc,bus-turnaround-ns = <0>;
  304. gpmc,cycle2cycle-delay-ns = <0>;
  305. gpmc,wait-monitoring-ns = <0>;
  306. gpmc,clk-activation-ns = <5>;
  307. gpmc,wr-data-mux-bus-ns = <30>;
  308. gpmc,wr-access-ns = <81>;
  309. gpmc,sync-clk-ps = <15000>;
  310. /*
  311. * MTD partition table corresponding to Nokia's MeeGo 1.2
  312. * Harmattan release.
  313. */
  314. partition@0 {
  315. label = "bootloader";
  316. reg = <0x00000000 0x00100000>;
  317. };
  318. partition@1 {
  319. label = "config";
  320. reg = <0x00100000 0x002c0000>;
  321. };
  322. partition@2 {
  323. label = "kernel";
  324. reg = <0x003c0000 0x01000000>;
  325. };
  326. partition@3 {
  327. label = "log";
  328. reg = <0x013c0000 0x00200000>;
  329. };
  330. partition@4 {
  331. label = "var";
  332. reg = <0x015c0000 0x1ca40000>;
  333. };
  334. partition@5 {
  335. label = "moslo";
  336. reg = <0x1e000000 0x02000000>;
  337. };
  338. partition@6 {
  339. label = "omap2-onenand";
  340. reg = <0x00000000 0x20000000>;
  341. };
  342. };
  343. };
  344. &ssi_port1 {
  345. pinctrl-names = "default", "idle";
  346. pinctrl-0 = <&ssi_pins>;
  347. pinctrl-1 = <&ssi_pins_idle>;
  348. ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
  349. modem: hsi-client {
  350. pinctrl-names = "default";
  351. pinctrl-0 = <&modem_pins1 &modem_pins2>;
  352. hsi-channel-ids = <0>, <1>, <2>, <3>;
  353. hsi-channel-names = "mcsaab-control",
  354. "speech-control",
  355. "speech-data",
  356. "mcsaab-data";
  357. hsi-speed-kbps = <96000>;
  358. hsi-mode = "frame";
  359. hsi-flow = "synchronized";
  360. hsi-arb-mode = "round-robin";
  361. interrupts-extended = <&gpio2 2 IRQ_TYPE_EDGE_RISING>; /* gpio 34 */
  362. gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>, /* gpio 93 */
  363. <&gpio3 24 GPIO_ACTIVE_HIGH>, /* gpio 88 */
  364. <&gpio1 23 GPIO_ACTIVE_HIGH>; /* gpio 23 */
  365. gpio-names = "cmt_apeslpx",
  366. "cmt_rst_rq",
  367. "cmt_en";
  368. };
  369. };
  370. &ssi_port2 {
  371. status = "disabled";
  372. };