omap3-beagle.dts 10 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "omap34xx.dtsi"
  10. / {
  11. model = "TI OMAP3 BeagleBoard";
  12. compatible = "ti,omap3-beagle", "ti,omap3";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vcc>;
  16. };
  17. };
  18. memory@80000000 {
  19. device_type = "memory";
  20. reg = <0x80000000 0x10000000>; /* 256 MB */
  21. };
  22. aliases {
  23. display0 = &dvi0;
  24. display1 = &tv0;
  25. };
  26. leds {
  27. compatible = "gpio-leds";
  28. pmu_stat {
  29. label = "beagleboard::pmu_stat";
  30. gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
  31. };
  32. heartbeat {
  33. label = "beagleboard::usr0";
  34. gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
  35. linux,default-trigger = "heartbeat";
  36. };
  37. mmc {
  38. label = "beagleboard::usr1";
  39. gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
  40. linux,default-trigger = "mmc0";
  41. };
  42. };
  43. /* HS USB Port 2 Power */
  44. hsusb2_power: hsusb2_power_reg {
  45. compatible = "regulator-fixed";
  46. regulator-name = "hsusb2_vbus";
  47. regulator-min-microvolt = <3300000>;
  48. regulator-max-microvolt = <3300000>;
  49. gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
  50. startup-delay-us = <70000>;
  51. };
  52. /* HS USB Host PHY on PORT 2 */
  53. hsusb2_phy: hsusb2_phy {
  54. compatible = "usb-nop-xceiv";
  55. reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
  56. vcc-supply = <&hsusb2_power>;
  57. };
  58. sound {
  59. compatible = "ti,omap-twl4030";
  60. ti,model = "omap3beagle";
  61. ti,mcbsp = <&mcbsp2>;
  62. };
  63. gpio_keys {
  64. compatible = "gpio-keys";
  65. user {
  66. label = "user";
  67. gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  68. linux,code = <0x114>;
  69. wakeup-source;
  70. };
  71. };
  72. tfp410: encoder0 {
  73. compatible = "ti,tfp410";
  74. powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
  75. pinctrl-names = "default";
  76. pinctrl-0 = <&tfp410_pins>;
  77. ports {
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. port@0 {
  81. reg = <0>;
  82. tfp410_in: endpoint {
  83. remote-endpoint = <&dpi_out>;
  84. };
  85. };
  86. port@1 {
  87. reg = <1>;
  88. tfp410_out: endpoint {
  89. remote-endpoint = <&dvi_connector_in>;
  90. };
  91. };
  92. };
  93. };
  94. dvi0: connector0 {
  95. compatible = "dvi-connector";
  96. label = "dvi";
  97. digital;
  98. ddc-i2c-bus = <&i2c3>;
  99. port {
  100. dvi_connector_in: endpoint {
  101. remote-endpoint = <&tfp410_out>;
  102. };
  103. };
  104. };
  105. tv0: connector1 {
  106. compatible = "svideo-connector";
  107. label = "tv";
  108. port {
  109. tv_connector_in: endpoint {
  110. remote-endpoint = <&venc_out>;
  111. };
  112. };
  113. };
  114. etb@540000000 {
  115. compatible = "arm,coresight-etb10", "arm,primecell";
  116. reg = <0x5401b000 0x1000>;
  117. clocks = <&emu_src_ck>;
  118. clock-names = "apb_pclk";
  119. port {
  120. etb_in: endpoint {
  121. slave-mode;
  122. remote-endpoint = <&etm_out>;
  123. };
  124. };
  125. };
  126. etm@54010000 {
  127. compatible = "arm,coresight-etm3x", "arm,primecell";
  128. reg = <0x54010000 0x1000>;
  129. clocks = <&emu_src_ck>;
  130. clock-names = "apb_pclk";
  131. port {
  132. etm_out: endpoint {
  133. remote-endpoint = <&etb_in>;
  134. };
  135. };
  136. };
  137. };
  138. &omap3_pmx_wkup {
  139. gpio1_pins: pinmux_gpio1_pins {
  140. pinctrl-single,pins = <
  141. OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
  142. >;
  143. };
  144. };
  145. &omap3_pmx_core {
  146. pinctrl-names = "default";
  147. pinctrl-0 = <
  148. &hsusb2_pins
  149. >;
  150. hsusb2_pins: pinmux_hsusb2_pins {
  151. pinctrl-single,pins = <
  152. OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
  153. OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
  154. OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
  155. OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
  156. OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
  157. OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
  158. >;
  159. };
  160. uart3_pins: pinmux_uart3_pins {
  161. pinctrl-single,pins = <
  162. OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
  163. OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
  164. >;
  165. };
  166. tfp410_pins: pinmux_tfp410_pins {
  167. pinctrl-single,pins = <
  168. OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
  169. >;
  170. };
  171. dss_dpi_pins: pinmux_dss_dpi_pins {
  172. pinctrl-single,pins = <
  173. OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
  174. OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
  175. OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
  176. OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
  177. OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
  178. OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
  179. OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
  180. OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
  181. OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
  182. OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
  183. OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
  184. OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
  185. OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
  186. OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
  187. OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
  188. OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
  189. OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
  190. OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
  191. OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
  192. OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
  193. OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
  194. OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
  195. OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
  196. OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
  197. OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
  198. OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
  199. OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
  200. OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
  201. >;
  202. };
  203. };
  204. &omap3_pmx_core2 {
  205. pinctrl-names = "default";
  206. pinctrl-0 = <
  207. &hsusb2_2_pins
  208. >;
  209. hsusb2_2_pins: pinmux_hsusb2_2_pins {
  210. pinctrl-single,pins = <
  211. OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
  212. OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
  213. OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
  214. OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
  215. OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
  216. OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
  217. >;
  218. };
  219. };
  220. &i2c1 {
  221. clock-frequency = <2600000>;
  222. twl: twl@48 {
  223. reg = <0x48>;
  224. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  225. interrupt-parent = <&intc>;
  226. twl_audio: audio {
  227. compatible = "ti,twl4030-audio";
  228. codec {
  229. };
  230. };
  231. };
  232. };
  233. #include "twl4030.dtsi"
  234. #include "twl4030_omap3.dtsi"
  235. &i2c3 {
  236. clock-frequency = <100000>;
  237. };
  238. &mmc1 {
  239. vmmc-supply = <&vmmc1>;
  240. vmmc_aux-supply = <&vsim>;
  241. bus-width = <8>;
  242. };
  243. &mmc2 {
  244. status = "disabled";
  245. };
  246. &mmc3 {
  247. status = "disabled";
  248. };
  249. &usbhshost {
  250. port2-mode = "ehci-phy";
  251. };
  252. &usbhsehci {
  253. phys = <0 &hsusb2_phy>;
  254. };
  255. &twl_gpio {
  256. ti,use-leds;
  257. /* pullups: BIT(1) */
  258. ti,pullups = <0x000002>;
  259. /*
  260. * pulldowns:
  261. * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
  262. * BIT(15), BIT(16), BIT(17)
  263. */
  264. ti,pulldowns = <0x03a1c4>;
  265. };
  266. &uart3 {
  267. pinctrl-names = "default";
  268. pinctrl-0 = <&uart3_pins>;
  269. interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
  270. };
  271. &gpio1 {
  272. pinctrl-names = "default";
  273. pinctrl-0 = <&gpio1_pins>;
  274. };
  275. &usb_otg_hs {
  276. interface-type = <0>;
  277. usb-phy = <&usb2_phy>;
  278. phys = <&usb2_phy>;
  279. phy-names = "usb2-phy";
  280. mode = <3>;
  281. power = <50>;
  282. };
  283. &vaux2 {
  284. regulator-name = "vdd_ehci";
  285. regulator-min-microvolt = <1800000>;
  286. regulator-max-microvolt = <1800000>;
  287. regulator-always-on;
  288. };
  289. &mcbsp2 {
  290. status = "okay";
  291. };
  292. /* Needed to power the DPI pins */
  293. &vpll2 {
  294. regulator-always-on;
  295. };
  296. &dss {
  297. status = "ok";
  298. pinctrl-names = "default";
  299. pinctrl-0 = <&dss_dpi_pins>;
  300. port {
  301. dpi_out: endpoint {
  302. remote-endpoint = <&tfp410_in>;
  303. data-lines = <24>;
  304. };
  305. };
  306. };
  307. &venc {
  308. status = "ok";
  309. vdda-supply = <&vdac>;
  310. port {
  311. venc_out: endpoint {
  312. remote-endpoint = <&tv_connector_in>;
  313. ti,channels = <2>;
  314. };
  315. };
  316. };
  317. &gpmc {
  318. status = "ok";
  319. ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
  320. /* Chip select 0 */
  321. nand@0,0 {
  322. compatible = "ti,omap2-nand";
  323. reg = <0 0 4>; /* NAND I/O window, 4 bytes */
  324. interrupt-parent = <&gpmc>;
  325. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  326. <1 IRQ_TYPE_NONE>; /* termcount */
  327. ti,nand-ecc-opt = "ham1";
  328. rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  329. nand-bus-width = <16>;
  330. #address-cells = <1>;
  331. #size-cells = <1>;
  332. gpmc,device-width = <2>;
  333. gpmc,cs-on-ns = <0>;
  334. gpmc,cs-rd-off-ns = <36>;
  335. gpmc,cs-wr-off-ns = <36>;
  336. gpmc,adv-on-ns = <6>;
  337. gpmc,adv-rd-off-ns = <24>;
  338. gpmc,adv-wr-off-ns = <36>;
  339. gpmc,oe-on-ns = <6>;
  340. gpmc,oe-off-ns = <48>;
  341. gpmc,we-on-ns = <6>;
  342. gpmc,we-off-ns = <30>;
  343. gpmc,rd-cycle-ns = <72>;
  344. gpmc,wr-cycle-ns = <72>;
  345. gpmc,access-ns = <54>;
  346. gpmc,wr-access-ns = <30>;
  347. partition@0 {
  348. label = "X-Loader";
  349. reg = <0 0x80000>;
  350. };
  351. partition@80000 {
  352. label = "U-Boot";
  353. reg = <0x80000 0x1e0000>;
  354. };
  355. partition@1c0000 {
  356. label = "U-Boot Env";
  357. reg = <0x260000 0x20000>;
  358. };
  359. partition@280000 {
  360. label = "Kernel";
  361. reg = <0x280000 0x400000>;
  362. };
  363. partition@780000 {
  364. label = "Filesystem";
  365. reg = <0x680000 0xf980000>;
  366. };
  367. };
  368. };