kirkwood-nas2big.dts 2.5 KB

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  1. /*
  2. * Device Tree file for LaCie 2Big NAS
  3. *
  4. * Copyright (C) 2015 Seagate
  5. *
  6. * Author: Simon Guinot <simon.guinot@sequanux.org>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. /dts-v1/;
  13. #include "kirkwood-netxbig.dtsi"
  14. / {
  15. model = "LaCie 2Big NAS";
  16. compatible = "lacie,nas2big", "lacie,netxbig", "marvell,kirkwood-88f6282", "marvell,kirkwood";
  17. memory {
  18. device_type = "memory";
  19. reg = <0x00000000 0x10000000>;
  20. };
  21. chosen {
  22. bootargs = "console=ttyS0,115200n8";
  23. stdout-path = &uart0;
  24. };
  25. ocp@f1000000 {
  26. rtc@10300 {
  27. /* The on-chip RTC is not powered (no supercap). */
  28. status = "disabled";
  29. };
  30. spi@10600 {
  31. /*
  32. * A NAND flash is used instead of an SPI flash for
  33. * the other netxbig-compatible boards.
  34. */
  35. status = "disabled";
  36. };
  37. };
  38. fan {
  39. /*
  40. * An I2C fan controller (GMT G762) is used but alarm is
  41. * wired to a separate GPIO.
  42. */
  43. compatible = "gpio-fan";
  44. alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
  45. };
  46. regulators: regulators {
  47. status = "okay";
  48. compatible = "simple-bus";
  49. #address-cells = <1>;
  50. #size-cells = <0>;
  51. pinctrl-names = "default";
  52. regulator@2 {
  53. compatible = "regulator-fixed";
  54. reg = <2>;
  55. regulator-name = "hdd1power";
  56. regulator-min-microvolt = <5000000>;
  57. regulator-max-microvolt = <5000000>;
  58. enable-active-high;
  59. regulator-always-on;
  60. regulator-boot-on;
  61. gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
  62. };
  63. clocks {
  64. g762_clk: g762-oscillator {
  65. compatible = "fixed-clock";
  66. #clock-cells = <0>;
  67. clock-frequency = <32768>;
  68. };
  69. };
  70. };
  71. };
  72. &mdio {
  73. status = "okay";
  74. ethphy0: ethernet-phy@0 {
  75. reg = <0>;
  76. };
  77. };
  78. &i2c0 {
  79. status = "okay";
  80. /*
  81. * An external I2C RTC (Dallas DS1337S+) is used. This allows
  82. * to power-up the board on an RTC alarm. The external RTC can
  83. * be kept powered, even when the SoC is off.
  84. */
  85. rtc@68 {
  86. compatible = "dallas,ds1307";
  87. reg = <0x68>;
  88. interrupts = <43>;
  89. };
  90. g762@3e {
  91. compatible = "gmt,g762";
  92. reg = <0x3e>;
  93. clocks = <&g762_clk>;
  94. };
  95. };
  96. &nand {
  97. chip-delay = <50>;
  98. status = "okay";
  99. partition@0 {
  100. label = "U-Boot";
  101. reg = <0x0 0x100000>;
  102. };
  103. partition@100000 {
  104. label = "uImage";
  105. reg = <0x100000 0x1000000>;
  106. };
  107. partition@1100000 {
  108. label = "root";
  109. reg = <0x1100000 0x8000000>;
  110. };
  111. partition@9100000 {
  112. label = "unused";
  113. reg = <0x9100000 0x6f00000>;
  114. };
  115. };
  116. &pciec {
  117. status = "okay";
  118. };
  119. &pcie0 {
  120. status = "okay";
  121. };