imx6sl-warp.dts 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234
  1. /*
  2. * Copyright 2014, 2015 O.S. Systems Software LTDA.
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This file is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public
  20. * License along with this file; if not, write to the Free
  21. * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. *
  24. * Or, alternatively,
  25. *
  26. * b) Permission is hereby granted, free of charge, to any person
  27. * obtaining a copy of this software and associated documentation
  28. * files (the "Software"), to deal in the Software without
  29. * restriction, including without limitation the rights to use,
  30. * copy, modify, merge, publish, distribute, sublicense, and/or
  31. * sell copies of the Software, and to permit persons to whom the
  32. * Software is furnished to do so, subject to the following
  33. * conditions:
  34. *
  35. * The above copyright notice and this permission notice shall be
  36. * included in all copies or substantial portions of the Software.
  37. *
  38. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45. * OTHER DEALINGS IN THE SOFTWARE.
  46. */
  47. /dts-v1/;
  48. #include <dt-bindings/gpio/gpio.h>
  49. #include "imx6sl.dtsi"
  50. / {
  51. model = "WaRP Board";
  52. compatible = "warp,imx6sl-warp", "fsl,imx6sl";
  53. memory {
  54. reg = <0x80000000 0x20000000>;
  55. };
  56. usdhc3_pwrseq: usdhc3_pwrseq {
  57. compatible = "mmc-pwrseq-simple";
  58. reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>, /* WL_REG_ON */
  59. <&gpio4 7 GPIO_ACTIVE_LOW>, /* WL_HOSTWAKE */
  60. <&gpio3 25 GPIO_ACTIVE_LOW>, /* BT_REG_ON */
  61. <&gpio3 27 GPIO_ACTIVE_LOW>, /* BT_HOSTWAKE */
  62. <&gpio4 4 GPIO_ACTIVE_LOW>, /* BT_WAKE */
  63. <&gpio4 6 GPIO_ACTIVE_LOW>; /* BT_RST_N */
  64. };
  65. };
  66. &uart1 {
  67. pinctrl-names = "default";
  68. pinctrl-0 = <&pinctrl_uart1>;
  69. status = "okay";
  70. };
  71. &uart3 {
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&pinctrl_uart3>;
  74. status = "okay";
  75. };
  76. &uart5 {
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&pinctrl_uart5>;
  79. uart-has-rtscts;
  80. status = "okay";
  81. };
  82. &usbotg1 {
  83. dr_mode = "peripheral";
  84. disable-over-current;
  85. status = "okay";
  86. };
  87. &usbotg2 {
  88. dr_mode = "host";
  89. disable-over-current;
  90. status = "okay";
  91. };
  92. &usdhc2 {
  93. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  94. pinctrl-0 = <&pinctrl_usdhc2>;
  95. pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
  96. pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
  97. bus-width = <8>;
  98. non-removable;
  99. status = "okay";
  100. };
  101. &usdhc3 {
  102. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  103. pinctrl-0 = <&pinctrl_usdhc3>;
  104. pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
  105. pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
  106. bus-width = <4>;
  107. non-removable;
  108. keep-power-in-suspend;
  109. wakeup-source;
  110. mmc-pwrseq = <&usdhc3_pwrseq>;
  111. status = "okay";
  112. };
  113. &iomuxc {
  114. imx6sl-warp {
  115. pinctrl_uart1: uart1grp {
  116. fsl,pins = <
  117. MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x41b0b1
  118. MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x41b0b1
  119. >;
  120. };
  121. pinctrl_uart3: uart3grp {
  122. fsl,pins = <
  123. MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x41b0b1
  124. MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x41b0b1
  125. >;
  126. };
  127. pinctrl_uart5: uart5grp {
  128. fsl,pins = <
  129. MX6SL_PAD_ECSPI1_SCLK__UART5_RX_DATA 0x41b0b1
  130. MX6SL_PAD_ECSPI1_MOSI__UART5_TX_DATA 0x41b0b1
  131. MX6SL_PAD_ECSPI1_MISO__UART5_RTS_B 0x4130b1
  132. MX6SL_PAD_ECSPI1_SS0__UART5_CTS_B 0x4130b1
  133. >;
  134. };
  135. pinctrl_usdhc2: usdhc2grp {
  136. fsl,pins = <
  137. MX6SL_PAD_SD2_CMD__SD2_CMD 0x417059
  138. MX6SL_PAD_SD2_CLK__SD2_CLK 0x410059
  139. MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x417059
  140. MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x417059
  141. MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x417059
  142. MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x417059
  143. MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x417059
  144. MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x417059
  145. MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x417059
  146. MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x417059
  147. MX6SL_PAD_SD2_RST__SD2_RESET 0x417059
  148. >;
  149. };
  150. pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
  151. fsl,pins = <
  152. MX6SL_PAD_SD2_CMD__SD2_CMD 0x4170b9
  153. MX6SL_PAD_SD2_CLK__SD2_CLK 0x4100b9
  154. MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x4170b9
  155. MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x4170b9
  156. MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x4170b9
  157. MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x4170b9
  158. MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x4170b9
  159. MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x4170b9
  160. MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x4170b9
  161. MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x4170b9
  162. MX6SL_PAD_SD2_RST__SD2_RESET 0x4170b9
  163. >;
  164. };
  165. pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
  166. fsl,pins = <
  167. MX6SL_PAD_SD2_CMD__SD2_CMD 0x4170f9
  168. MX6SL_PAD_SD2_CLK__SD2_CLK 0x4100f9
  169. MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x4170f9
  170. MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x4170f9
  171. MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x4170f9
  172. MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x4170f9
  173. MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x4170f9
  174. MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x4170f9
  175. MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x4170f9
  176. MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x4170f9
  177. MX6SL_PAD_SD2_RST__SD2_RESET 0x4170f9
  178. >;
  179. };
  180. pinctrl_usdhc3: usdhc3grp {
  181. fsl,pins = <
  182. MX6SL_PAD_SD3_CMD__SD3_CMD 0x417059
  183. MX6SL_PAD_SD3_CLK__SD3_CLK 0x410059
  184. MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x417059
  185. MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x417059
  186. MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x417059
  187. MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x417059
  188. >;
  189. };
  190. pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
  191. fsl,pins = <
  192. MX6SL_PAD_SD3_CMD__SD3_CMD 0x4170b9
  193. MX6SL_PAD_SD3_CLK__SD3_CLK 0x4100b9
  194. MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x4170b9
  195. MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x4170b9
  196. MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x4170b9
  197. MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x4170b9
  198. >;
  199. };
  200. pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
  201. fsl,pins = <
  202. MX6SL_PAD_SD3_CMD__SD3_CMD 0x4170f9
  203. MX6SL_PAD_SD3_CLK__SD3_CLK 0x4100f9
  204. MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x4170f9
  205. MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x4170f9
  206. MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x4170f9
  207. MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x4170f9
  208. >;
  209. };
  210. };
  211. };