imx6qdl-nitrogen6x.dtsi 16 KB

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  1. /*
  2. * Copyright 2013 Boundary Devices, Inc.
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Copyright 2011 Linaro Ltd.
  5. *
  6. * This file is dual-licensed: you can use it either under the terms
  7. * of the GPL or the X11 license, at your option. Note that this dual
  8. * licensing only applies to this file, and not this project as a
  9. * whole.
  10. *
  11. * a) This file is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * version 2 as published by the Free Software Foundation.
  14. *
  15. * This file is distributed in the hope that it will be useful
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * Or, alternatively
  21. *
  22. * b) Permission is hereby granted, free of charge, to any person
  23. * obtaining a copy of this software and associated documentation
  24. * files (the "Software"), to deal in the Software without
  25. * restriction, including without limitation the rights to use
  26. * copy, modify, merge, publish, distribute, sublicense, and/or
  27. * sell copies of the Software, and to permit persons to whom the
  28. * Software is furnished to do so, subject to the following
  29. * conditions:
  30. *
  31. * The above copyright notice and this permission notice shall be
  32. * included in all copies or substantial portions of the Software.
  33. *
  34. * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  35. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  36. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  37. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  38. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  39. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  40. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  41. * OTHER DEALINGS IN THE SOFTWARE.
  42. */
  43. #include <dt-bindings/gpio/gpio.h>
  44. #include <dt-bindings/input/input.h>
  45. / {
  46. chosen {
  47. stdout-path = &uart2;
  48. };
  49. memory {
  50. reg = <0x10000000 0x40000000>;
  51. };
  52. regulators {
  53. compatible = "simple-bus";
  54. #address-cells = <1>;
  55. #size-cells = <0>;
  56. reg_2p5v: regulator@0 {
  57. compatible = "regulator-fixed";
  58. reg = <0>;
  59. regulator-name = "2P5V";
  60. regulator-min-microvolt = <2500000>;
  61. regulator-max-microvolt = <2500000>;
  62. regulator-always-on;
  63. };
  64. reg_3p3v: regulator@1 {
  65. compatible = "regulator-fixed";
  66. reg = <1>;
  67. regulator-name = "3P3V";
  68. regulator-min-microvolt = <3300000>;
  69. regulator-max-microvolt = <3300000>;
  70. regulator-always-on;
  71. };
  72. reg_usb_otg_vbus: regulator@2 {
  73. compatible = "regulator-fixed";
  74. reg = <2>;
  75. regulator-name = "usb_otg_vbus";
  76. regulator-min-microvolt = <5000000>;
  77. regulator-max-microvolt = <5000000>;
  78. gpio = <&gpio3 22 0>;
  79. enable-active-high;
  80. };
  81. reg_can_xcvr: regulator@3 {
  82. compatible = "regulator-fixed";
  83. reg = <3>;
  84. regulator-name = "CAN XCVR";
  85. regulator-min-microvolt = <3300000>;
  86. regulator-max-microvolt = <3300000>;
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&pinctrl_can_xcvr>;
  89. gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  90. };
  91. reg_wlan_vmmc: regulator@4 {
  92. compatible = "regulator-fixed";
  93. reg = <4>;
  94. pinctrl-names = "default";
  95. pinctrl-0 = <&pinctrl_wlan_vmmc>;
  96. regulator-name = "reg_wlan_vmmc";
  97. regulator-min-microvolt = <3300000>;
  98. regulator-max-microvolt = <3300000>;
  99. gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
  100. startup-delay-us = <70000>;
  101. enable-active-high;
  102. };
  103. };
  104. gpio-keys {
  105. compatible = "gpio-keys";
  106. pinctrl-names = "default";
  107. pinctrl-0 = <&pinctrl_gpio_keys>;
  108. power {
  109. label = "Power Button";
  110. gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  111. linux,code = <KEY_POWER>;
  112. wakeup-source;
  113. };
  114. menu {
  115. label = "Menu";
  116. gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  117. linux,code = <KEY_MENU>;
  118. };
  119. home {
  120. label = "Home";
  121. gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  122. linux,code = <KEY_HOME>;
  123. };
  124. back {
  125. label = "Back";
  126. gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  127. linux,code = <KEY_BACK>;
  128. };
  129. volume-up {
  130. label = "Volume Up";
  131. gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  132. linux,code = <KEY_VOLUMEUP>;
  133. };
  134. volume-down {
  135. label = "Volume Down";
  136. gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  137. linux,code = <KEY_VOLUMEDOWN>;
  138. };
  139. };
  140. sound {
  141. compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
  142. "fsl,imx-audio-sgtl5000";
  143. model = "imx6q-nitrogen6x-sgtl5000";
  144. ssi-controller = <&ssi1>;
  145. audio-codec = <&codec>;
  146. audio-routing =
  147. "MIC_IN", "Mic Jack",
  148. "Mic Jack", "Mic Bias",
  149. "Headphone Jack", "HP_OUT";
  150. mux-int-port = <1>;
  151. mux-ext-port = <3>;
  152. };
  153. backlight_lcd: backlight_lcd {
  154. compatible = "pwm-backlight";
  155. pwms = <&pwm1 0 5000000>;
  156. brightness-levels = <0 4 8 16 32 64 128 255>;
  157. default-brightness-level = <7>;
  158. power-supply = <&reg_3p3v>;
  159. status = "okay";
  160. };
  161. backlight_lvds: backlight_lvds {
  162. compatible = "pwm-backlight";
  163. pwms = <&pwm4 0 5000000>;
  164. brightness-levels = <0 4 8 16 32 64 128 255>;
  165. default-brightness-level = <7>;
  166. power-supply = <&reg_3p3v>;
  167. status = "okay";
  168. };
  169. lcd_display: display@di0 {
  170. compatible = "fsl,imx-parallel-display";
  171. #address-cells = <1>;
  172. #size-cells = <0>;
  173. interface-pix-fmt = "bgr666";
  174. pinctrl-names = "default";
  175. pinctrl-0 = <&pinctrl_j15>;
  176. status = "okay";
  177. port@0 {
  178. reg = <0>;
  179. lcd_display_in: endpoint {
  180. remote-endpoint = <&ipu1_di0_disp0>;
  181. };
  182. };
  183. port@1 {
  184. reg = <1>;
  185. lcd_display_out: endpoint {
  186. remote-endpoint = <&lcd_panel_in>;
  187. };
  188. };
  189. };
  190. lcd_panel {
  191. compatible = "okaya,rs800480t-7x0gp";
  192. backlight = <&backlight_lcd>;
  193. port {
  194. lcd_panel_in: endpoint {
  195. remote-endpoint = <&lcd_display_out>;
  196. };
  197. };
  198. };
  199. panel {
  200. compatible = "hannstar,hsd100pxn1";
  201. backlight = <&backlight_lvds>;
  202. port {
  203. panel_in: endpoint {
  204. remote-endpoint = <&lvds0_out>;
  205. };
  206. };
  207. };
  208. };
  209. &audmux {
  210. pinctrl-names = "default";
  211. pinctrl-0 = <&pinctrl_audmux>;
  212. status = "okay";
  213. };
  214. &can1 {
  215. pinctrl-names = "default";
  216. pinctrl-0 = <&pinctrl_can1>;
  217. xceiver-supply = <&reg_can_xcvr>;
  218. status = "okay";
  219. };
  220. &clks {
  221. assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
  222. <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
  223. assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
  224. <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
  225. };
  226. &ecspi1 {
  227. fsl,spi-num-chipselects = <1>;
  228. cs-gpios = <&gpio3 19 0>;
  229. pinctrl-names = "default";
  230. pinctrl-0 = <&pinctrl_ecspi1>;
  231. status = "okay";
  232. flash: m25p80@0 {
  233. compatible = "sst,sst25vf016b", "jedec,spi-nor";
  234. spi-max-frequency = <20000000>;
  235. reg = <0>;
  236. };
  237. };
  238. &fec {
  239. pinctrl-names = "default";
  240. pinctrl-0 = <&pinctrl_enet>;
  241. phy-mode = "rgmii";
  242. phy-reset-gpios = <&gpio1 27 0>;
  243. txen-skew-ps = <0>;
  244. txc-skew-ps = <3000>;
  245. rxdv-skew-ps = <0>;
  246. rxc-skew-ps = <3000>;
  247. rxd0-skew-ps = <0>;
  248. rxd1-skew-ps = <0>;
  249. rxd2-skew-ps = <0>;
  250. rxd3-skew-ps = <0>;
  251. txd0-skew-ps = <0>;
  252. txd1-skew-ps = <0>;
  253. txd2-skew-ps = <0>;
  254. txd3-skew-ps = <0>;
  255. interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
  256. <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
  257. fsl,err006687-workaround-present;
  258. status = "okay";
  259. };
  260. &hdmi {
  261. ddc-i2c-bus = <&i2c2>;
  262. status = "okay";
  263. };
  264. &i2c1 {
  265. clock-frequency = <100000>;
  266. pinctrl-names = "default";
  267. pinctrl-0 = <&pinctrl_i2c1>;
  268. status = "okay";
  269. codec: sgtl5000@0a {
  270. compatible = "fsl,sgtl5000";
  271. reg = <0x0a>;
  272. clocks = <&clks IMX6QDL_CLK_CKO>;
  273. VDDA-supply = <&reg_2p5v>;
  274. VDDIO-supply = <&reg_3p3v>;
  275. };
  276. rtc: rtc@6f {
  277. compatible = "isil,isl1208";
  278. reg = <0x6f>;
  279. };
  280. };
  281. &i2c2 {
  282. clock-frequency = <100000>;
  283. pinctrl-names = "default";
  284. pinctrl-0 = <&pinctrl_i2c2>;
  285. status = "okay";
  286. };
  287. &i2c3 {
  288. clock-frequency = <100000>;
  289. pinctrl-names = "default";
  290. pinctrl-0 = <&pinctrl_i2c3>;
  291. status = "okay";
  292. touchscreen@04 {
  293. compatible = "eeti,egalax_ts";
  294. reg = <0x04>;
  295. interrupt-parent = <&gpio1>;
  296. interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
  297. wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  298. };
  299. touchscreen@38 {
  300. compatible = "edt,edt-ft5x06";
  301. reg = <0x38>;
  302. interrupt-parent = <&gpio1>;
  303. interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
  304. };
  305. };
  306. &iomuxc {
  307. pinctrl-names = "default";
  308. pinctrl-0 = <&pinctrl_hog>;
  309. imx6q-nitrogen6x {
  310. pinctrl_hog: hoggrp {
  311. fsl,pins = <
  312. /* SGTL5000 sys_mclk */
  313. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
  314. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
  315. >;
  316. };
  317. pinctrl_audmux: audmuxgrp {
  318. fsl,pins = <
  319. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  320. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  321. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  322. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  323. >;
  324. };
  325. pinctrl_can1: can1grp {
  326. fsl,pins = <
  327. MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
  328. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
  329. >;
  330. };
  331. pinctrl_can_xcvr: can-xcvrgrp {
  332. fsl,pins = <
  333. /* Flexcan XCVR enable */
  334. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
  335. >;
  336. };
  337. pinctrl_ecspi1: ecspi1grp {
  338. fsl,pins = <
  339. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  340. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  341. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  342. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
  343. >;
  344. };
  345. pinctrl_enet: enetgrp {
  346. fsl,pins = <
  347. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
  348. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
  349. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
  350. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
  351. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
  352. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
  353. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
  354. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
  355. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
  356. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
  357. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
  358. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
  359. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
  360. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
  361. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
  362. /* Phy reset */
  363. MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
  364. MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
  365. >;
  366. };
  367. pinctrl_gpio_keys: gpio_keysgrp {
  368. fsl,pins = <
  369. /* Power Button */
  370. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
  371. /* Menu Button */
  372. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
  373. /* Home Button */
  374. MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
  375. /* Back Button */
  376. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
  377. /* Volume Up Button */
  378. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
  379. /* Volume Down Button */
  380. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
  381. >;
  382. };
  383. pinctrl_i2c1: i2c1grp {
  384. fsl,pins = <
  385. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  386. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  387. >;
  388. };
  389. pinctrl_i2c2: i2c2grp {
  390. fsl,pins = <
  391. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  392. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  393. >;
  394. };
  395. pinctrl_i2c3: i2c3grp {
  396. fsl,pins = <
  397. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  398. MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
  399. >;
  400. };
  401. pinctrl_j15: j15grp {
  402. fsl,pins = <
  403. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
  404. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
  405. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
  406. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
  407. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
  408. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
  409. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
  410. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
  411. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
  412. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
  413. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
  414. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
  415. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
  416. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
  417. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
  418. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
  419. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
  420. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
  421. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
  422. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
  423. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
  424. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
  425. MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
  426. MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
  427. MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
  428. MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
  429. MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
  430. MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
  431. >;
  432. };
  433. pinctrl_pwm1: pwm1grp {
  434. fsl,pins = <
  435. MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
  436. >;
  437. };
  438. pinctrl_pwm3: pwm3grp {
  439. fsl,pins = <
  440. MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
  441. >;
  442. };
  443. pinctrl_pwm4: pwm4grp {
  444. fsl,pins = <
  445. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  446. >;
  447. };
  448. pinctrl_uart1: uart1grp {
  449. fsl,pins = <
  450. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  451. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  452. >;
  453. };
  454. pinctrl_uart2: uart2grp {
  455. fsl,pins = <
  456. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  457. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  458. >;
  459. };
  460. pinctrl_usbotg: usbotggrp {
  461. fsl,pins = <
  462. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  463. MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
  464. /* power enable, high active */
  465. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
  466. >;
  467. };
  468. pinctrl_usdhc2: usdhc2grp {
  469. fsl,pins = <
  470. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
  471. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
  472. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
  473. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
  474. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
  475. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
  476. MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
  477. >;
  478. };
  479. pinctrl_usdhc3: usdhc3grp {
  480. fsl,pins = <
  481. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  482. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  483. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  484. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  485. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  486. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  487. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
  488. >;
  489. };
  490. pinctrl_usdhc4: usdhc4grp {
  491. fsl,pins = <
  492. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  493. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  494. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  495. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  496. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  497. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  498. MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
  499. >;
  500. };
  501. pinctrl_wlan_vmmc: wlan_vmmcgrp {
  502. fsl,pins = <
  503. MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
  504. MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
  505. MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
  506. MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
  507. >;
  508. };
  509. };
  510. };
  511. &ipu1_di0_disp0 {
  512. remote-endpoint = <&lcd_display_in>;
  513. };
  514. &ldb {
  515. status = "okay";
  516. lvds-channel@0 {
  517. fsl,data-mapping = "spwg";
  518. fsl,data-width = <18>;
  519. status = "okay";
  520. port@4 {
  521. reg = <4>;
  522. lvds0_out: endpoint {
  523. remote-endpoint = <&panel_in>;
  524. };
  525. };
  526. };
  527. };
  528. &pcie {
  529. status = "okay";
  530. };
  531. &pwm1 {
  532. pinctrl-names = "default";
  533. pinctrl-0 = <&pinctrl_pwm1>;
  534. status = "okay";
  535. };
  536. &pwm3 {
  537. pinctrl-names = "default";
  538. pinctrl-0 = <&pinctrl_pwm3>;
  539. status = "okay";
  540. };
  541. &pwm4 {
  542. pinctrl-names = "default";
  543. pinctrl-0 = <&pinctrl_pwm4>;
  544. status = "okay";
  545. };
  546. &ssi1 {
  547. status = "okay";
  548. };
  549. &uart1 {
  550. pinctrl-names = "default";
  551. pinctrl-0 = <&pinctrl_uart1>;
  552. status = "okay";
  553. };
  554. &uart2 {
  555. pinctrl-names = "default";
  556. pinctrl-0 = <&pinctrl_uart2>;
  557. status = "okay";
  558. };
  559. &usbh1 {
  560. status = "okay";
  561. };
  562. &usbotg {
  563. vbus-supply = <&reg_usb_otg_vbus>;
  564. pinctrl-names = "default";
  565. pinctrl-0 = <&pinctrl_usbotg>;
  566. disable-over-current;
  567. status = "okay";
  568. };
  569. &usdhc2 {
  570. pinctrl-names = "default";
  571. pinctrl-0 = <&pinctrl_usdhc2>;
  572. bus-width = <4>;
  573. non-removable;
  574. vmmc-supply = <&reg_wlan_vmmc>;
  575. cap-power-off-card;
  576. keep-power-in-suspend;
  577. status = "okay";
  578. #address-cells = <1>;
  579. #size-cells = <0>;
  580. wlcore: wlcore@2 {
  581. compatible = "ti,wl1271";
  582. reg = <2>;
  583. interrupt-parent = <&gpio6>;
  584. interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
  585. ref-clock-frequency = <38400000>;
  586. };
  587. };
  588. &usdhc3 {
  589. pinctrl-names = "default";
  590. pinctrl-0 = <&pinctrl_usdhc3>;
  591. cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
  592. vmmc-supply = <&reg_3p3v>;
  593. status = "okay";
  594. };
  595. &usdhc4 {
  596. pinctrl-names = "default";
  597. pinctrl-0 = <&pinctrl_usdhc4>;
  598. cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
  599. vmmc-supply = <&reg_3p3v>;
  600. status = "okay";
  601. };