imx53-tx53.dtsi 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550
  1. /*
  2. * Copyright 2012 <LW@KARO-electronics.de>
  3. * based on imx53-qsb.dts
  4. * Copyright 2011 Freescale Semiconductor, Inc.
  5. * Copyright 2011 Linaro Ltd.
  6. *
  7. * The code contained herein is licensed under the GNU General Public
  8. * License. You may obtain a copy of the GNU General Public License
  9. * Version 2 at the following locations:
  10. *
  11. * http://www.opensource.org/licenses/gpl-license.html
  12. * http://www.gnu.org/copyleft/gpl.html
  13. */
  14. #include "imx53.dtsi"
  15. #include <dt-bindings/gpio/gpio.h>
  16. / {
  17. model = "Ka-Ro electronics TX53 module";
  18. compatible = "karo,tx53", "fsl,imx53";
  19. aliases {
  20. can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
  21. can1 = &can1;
  22. ipu = &ipu;
  23. reg_can_xcvr = &reg_can_xcvr;
  24. usbh1 = &usbh1;
  25. usbotg = &usbotg;
  26. };
  27. clocks {
  28. ckih1 {
  29. clock-frequency = <0>;
  30. };
  31. mclk: clock@0 {
  32. compatible = "fixed-clock";
  33. reg = <0>;
  34. #clock-cells = <0>;
  35. clock-frequency = <26000000>;
  36. };
  37. };
  38. gpio-keys {
  39. compatible = "gpio-keys";
  40. pinctrl-names = "default";
  41. pinctrl-0 = <&pinctrl_gpio_key>;
  42. power {
  43. label = "Power Button";
  44. gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  45. linux,code = <116>; /* KEY_POWER */
  46. wakeup-source;
  47. };
  48. };
  49. leds {
  50. compatible = "gpio-leds";
  51. pinctrl-names = "default";
  52. pinctrl-0 = <&pinctrl_stk5led>;
  53. user {
  54. label = "Heartbeat";
  55. gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
  56. linux,default-trigger = "heartbeat";
  57. };
  58. };
  59. regulators {
  60. compatible = "simple-bus";
  61. #address-cells = <1>;
  62. #size-cells = <0>;
  63. reg_2v5: regulator@0 {
  64. compatible = "regulator-fixed";
  65. reg = <0>;
  66. regulator-name = "2V5";
  67. regulator-min-microvolt = <2500000>;
  68. regulator-max-microvolt = <2500000>;
  69. };
  70. reg_3v3: regulator@1 {
  71. compatible = "regulator-fixed";
  72. reg = <1>;
  73. regulator-name = "3V3";
  74. regulator-min-microvolt = <3300000>;
  75. regulator-max-microvolt = <3300000>;
  76. };
  77. reg_can_xcvr: regulator@2 {
  78. compatible = "regulator-fixed";
  79. reg = <2>;
  80. regulator-name = "CAN XCVR";
  81. regulator-min-microvolt = <3300000>;
  82. regulator-max-microvolt = <3300000>;
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&pinctrl_can_xcvr>;
  85. gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
  86. };
  87. reg_usbh1_vbus: regulator@3 {
  88. compatible = "regulator-fixed";
  89. reg = <3>;
  90. regulator-name = "usbh1_vbus";
  91. regulator-min-microvolt = <5000000>;
  92. regulator-max-microvolt = <5000000>;
  93. pinctrl-names = "default";
  94. pinctrl-0 = <&pinctrl_usbh1_vbus>;
  95. gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
  96. enable-active-high;
  97. };
  98. reg_usbotg_vbus: regulator@4 {
  99. compatible = "regulator-fixed";
  100. reg = <4>;
  101. regulator-name = "usbotg_vbus";
  102. regulator-min-microvolt = <5000000>;
  103. regulator-max-microvolt = <5000000>;
  104. pinctrl-names = "default";
  105. pinctrl-0 = <&pinctrl_usbotg_vbus>;
  106. gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  107. enable-active-high;
  108. };
  109. };
  110. sound {
  111. compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
  112. model = "tx53-audio-sgtl5000";
  113. ssi-controller = <&ssi1>;
  114. audio-codec = <&sgtl5000>;
  115. audio-routing =
  116. "MIC_IN", "Mic Jack",
  117. "Mic Jack", "Mic Bias",
  118. "Headphone Jack", "HP_OUT";
  119. /* '1' based port numbers according to datasheet names */
  120. mux-int-port = <1>;
  121. mux-ext-port = <5>;
  122. };
  123. };
  124. &audmux {
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_ssi1>;
  127. status = "okay";
  128. };
  129. &can1 {
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&pinctrl_can1>;
  132. xceiver-supply = <&reg_can_xcvr>;
  133. status = "okay";
  134. };
  135. &can2 {
  136. pinctrl-names = "default";
  137. pinctrl-0 = <&pinctrl_can2>;
  138. xceiver-supply = <&reg_can_xcvr>;
  139. status = "okay";
  140. };
  141. &ecspi1 {
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&pinctrl_ecspi1>;
  144. fsl,spi-num-chipselects = <2>;
  145. status = "okay";
  146. cs-gpios = <
  147. &gpio2 30 GPIO_ACTIVE_HIGH
  148. &gpio3 19 GPIO_ACTIVE_HIGH
  149. >;
  150. spidev0: spi@0 {
  151. compatible = "spidev";
  152. reg = <0>;
  153. spi-max-frequency = <54000000>;
  154. };
  155. spidev1: spi@1 {
  156. compatible = "spidev";
  157. reg = <1>;
  158. spi-max-frequency = <54000000>;
  159. };
  160. };
  161. &esdhc1 {
  162. cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
  163. fsl,wp-controller;
  164. pinctrl-names = "default";
  165. pinctrl-0 = <&pinctrl_esdhc1>;
  166. status = "okay";
  167. };
  168. &esdhc2 {
  169. cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
  170. fsl,wp-controller;
  171. pinctrl-names = "default";
  172. pinctrl-0 = <&pinctrl_esdhc2>;
  173. status = "okay";
  174. };
  175. &fec {
  176. pinctrl-names = "default";
  177. pinctrl-0 = <&pinctrl_fec>;
  178. phy-mode = "rmii";
  179. phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
  180. phy-handle = <&phy0>;
  181. mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
  182. status = "okay";
  183. phy0: ethernet-phy@0 {
  184. interrupt-parent = <&gpio2>;
  185. interrupts = <4>;
  186. device_type = "ethernet-phy";
  187. };
  188. };
  189. &i2c1 {
  190. pinctrl-names = "default";
  191. pinctrl-0 = <&pinctrl_i2c1>;
  192. clock-frequency = <400000>;
  193. status = "okay";
  194. rtc1: ds1339@68 {
  195. compatible = "dallas,ds1339";
  196. reg = <0x68>;
  197. pinctrl-names = "default";
  198. pinctrl-0 = <&pinctrl_ds1339>;
  199. interrupt-parent = <&gpio4>;
  200. interrupts = <20 0>;
  201. };
  202. };
  203. &iomuxc {
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&pinctrl_hog>;
  206. imx53-tx53 {
  207. pinctrl_hog: hoggrp {
  208. /* pins not in use by any device on the Starterkit board series */
  209. fsl,pins = <
  210. /* CMOS Sensor Interface */
  211. MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
  212. MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
  213. MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
  214. MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
  215. MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
  216. MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
  217. MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
  218. MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
  219. MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
  220. MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
  221. MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
  222. MX53_PAD_GPIO_0__GPIO1_0 0x1f4
  223. /* Module Specific Signal */
  224. /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
  225. /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
  226. MX53_PAD_EIM_D29__GPIO3_29 0x1f4
  227. MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
  228. /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
  229. /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
  230. MX53_PAD_EIM_A19__GPIO2_19 0x1f4
  231. MX53_PAD_EIM_A20__GPIO2_18 0x1f4
  232. MX53_PAD_EIM_A21__GPIO2_17 0x1f4
  233. MX53_PAD_EIM_A22__GPIO2_16 0x1f4
  234. MX53_PAD_EIM_A23__GPIO6_6 0x1f4
  235. MX53_PAD_EIM_A24__GPIO5_4 0x1f4
  236. MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
  237. MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
  238. MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
  239. MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
  240. /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
  241. /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
  242. MX53_PAD_GPIO_13__GPIO4_3 0x1f4
  243. MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
  244. MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
  245. MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
  246. MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
  247. MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
  248. MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
  249. MX53_PAD_EIM_OE__GPIO2_25 0x1f4
  250. MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
  251. MX53_PAD_EIM_RW__GPIO2_26 0x1f4
  252. MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
  253. MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
  254. MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
  255. MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
  256. MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
  257. MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
  258. MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
  259. MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
  260. >;
  261. };
  262. pinctrl_can1: can1grp {
  263. fsl,pins = <
  264. MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
  265. MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
  266. >;
  267. };
  268. pinctrl_can2: can2grp {
  269. fsl,pins = <
  270. MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
  271. MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
  272. >;
  273. };
  274. pinctrl_can_xcvr: can-xcvrgrp {
  275. fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
  276. };
  277. pinctrl_ds1339: ds1339grp {
  278. fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
  279. };
  280. pinctrl_ecspi1: ecspi1grp {
  281. fsl,pins = <
  282. MX53_PAD_GPIO_19__ECSPI1_RDY 0x80000000
  283. MX53_PAD_EIM_EB2__ECSPI1_SS0 0x80000000
  284. MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
  285. MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
  286. MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
  287. MX53_PAD_EIM_D19__ECSPI1_SS1 0x80000000
  288. >;
  289. };
  290. pinctrl_esdhc1: esdhc1grp {
  291. fsl,pins = <
  292. MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
  293. MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
  294. MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
  295. MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
  296. MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
  297. MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
  298. MX53_PAD_EIM_D24__GPIO3_24 0x1f0
  299. >;
  300. };
  301. pinctrl_esdhc2: esdhc2grp {
  302. fsl,pins = <
  303. MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
  304. MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
  305. MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
  306. MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
  307. MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
  308. MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
  309. MX53_PAD_EIM_D25__GPIO3_25 0x1f0
  310. >;
  311. };
  312. pinctrl_fec: fecgrp {
  313. fsl,pins = <
  314. MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
  315. MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
  316. MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
  317. MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
  318. MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
  319. MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
  320. MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
  321. MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
  322. MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
  323. MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
  324. >;
  325. };
  326. pinctrl_gpio_key: gpio-keygrp {
  327. fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
  328. };
  329. pinctrl_i2c1: i2c1grp {
  330. fsl,pins = <
  331. MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
  332. MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
  333. >;
  334. };
  335. pinctrl_i2c3: i2c3grp {
  336. fsl,pins = <
  337. MX53_PAD_GPIO_3__I2C3_SCL 0xc0000000
  338. MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
  339. >;
  340. };
  341. pinctrl_nand: nandgrp {
  342. fsl,pins = <
  343. MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
  344. MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
  345. MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
  346. MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
  347. MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
  348. MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
  349. MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
  350. MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4
  351. MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4
  352. MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4
  353. MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4
  354. MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4
  355. MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4
  356. MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4
  357. MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4
  358. >;
  359. };
  360. pinctrl_pwm2: pwm2grp {
  361. fsl,pins = <
  362. MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000
  363. >;
  364. };
  365. pinctrl_ssi1: ssi1grp {
  366. fsl,pins = <
  367. MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
  368. MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
  369. MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
  370. MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
  371. >;
  372. };
  373. pinctrl_ssi2: ssi2grp {
  374. fsl,pins = <
  375. MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000
  376. MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000
  377. MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000
  378. MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000
  379. MX53_PAD_EIM_D27__GPIO3_27 0x1f0
  380. >;
  381. };
  382. pinctrl_stk5led: stk5ledgrp {
  383. fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
  384. };
  385. pinctrl_uart1: uart1grp {
  386. fsl,pins = <
  387. MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
  388. MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
  389. MX53_PAD_PATA_RESET_B__UART1_CTS 0x1c5
  390. MX53_PAD_PATA_IORDY__UART1_RTS 0x1c5
  391. >;
  392. };
  393. pinctrl_uart2: uart2grp {
  394. fsl,pins = <
  395. MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
  396. MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5
  397. MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5
  398. MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5
  399. >;
  400. };
  401. pinctrl_uart3: uart3grp {
  402. fsl,pins = <
  403. MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
  404. MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
  405. MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
  406. MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
  407. >;
  408. };
  409. pinctrl_usbh1: usbh1grp {
  410. fsl,pins = <
  411. MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
  412. >;
  413. };
  414. pinctrl_usbh1_vbus: usbh1-vbusgrp {
  415. fsl,pins = <
  416. MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
  417. >;
  418. };
  419. pinctrl_usbotg_vbus: usbotg-vbusgrp {
  420. fsl,pins = <
  421. MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
  422. MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
  423. >;
  424. };
  425. };
  426. };
  427. &ipu {
  428. status = "okay";
  429. };
  430. &nfc {
  431. pinctrl-names = "default";
  432. pinctrl-0 = <&pinctrl_nand>;
  433. nand-bus-width = <8>;
  434. nand-ecc-mode = "hw";
  435. nand-on-flash-bbt;
  436. status = "okay";
  437. };
  438. &pwm2 {
  439. pinctrl-names = "default";
  440. pinctrl-0 = <&pinctrl_pwm2>;
  441. #pwm-cells = <3>;
  442. };
  443. &sdma {
  444. fsl,sdma-ram-script-name = "/*(DEBLOBBED)*/";
  445. };
  446. &ssi1 {
  447. codec-handle = <&sgtl5000>;
  448. status = "okay";
  449. };
  450. &ssi2 {
  451. status = "disabled";
  452. };
  453. &uart1 {
  454. pinctrl-names = "default";
  455. pinctrl-0 = <&pinctrl_uart1>;
  456. uart-has-rtscts;
  457. status = "okay";
  458. };
  459. &uart2 {
  460. pinctrl-names = "default";
  461. pinctrl-0 = <&pinctrl_uart2>;
  462. uart-has-rtscts;
  463. status = "okay";
  464. };
  465. &uart3 {
  466. pinctrl-names = "default";
  467. pinctrl-0 = <&pinctrl_uart3>;
  468. uart-has-rtscts;
  469. status = "okay";
  470. };
  471. &usbh1 {
  472. pinctrl-names = "default";
  473. pinctrl-0 = <&pinctrl_usbh1>;
  474. phy_type = "utmi";
  475. disable-over-current;
  476. vbus-supply = <&reg_usbh1_vbus>;
  477. status = "okay";
  478. };
  479. &usbotg {
  480. phy_type = "utmi";
  481. dr_mode = "peripheral";
  482. disable-over-current;
  483. vbus-supply = <&reg_usbotg_vbus>;
  484. status = "okay";
  485. };