imx25-karo-tx25.dts 2.6 KB

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  1. /*
  2. * Copyright 2012 Sascha Hauer, Pengutronix
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /dts-v1/;
  12. #include "imx25.dtsi"
  13. / {
  14. model = "Ka-Ro TX25";
  15. compatible = "karo,imx25-tx25", "fsl,imx25";
  16. chosen {
  17. stdout-path = &uart1;
  18. };
  19. regulators {
  20. compatible = "simple-bus";
  21. #address-cells = <1>;
  22. #size-cells = <0>;
  23. reg_fec_phy: regulator@0 {
  24. compatible = "regulator-fixed";
  25. reg = <0>;
  26. regulator-name = "fec-phy";
  27. regulator-min-microvolt = <3300000>;
  28. regulator-max-microvolt = <3300000>;
  29. gpio = <&gpio4 9 0>;
  30. enable-active-high;
  31. };
  32. };
  33. memory {
  34. reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
  35. };
  36. };
  37. &iomuxc {
  38. pinctrl_uart1: uart1grp {
  39. fsl,pins = <
  40. MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
  41. MX25_PAD_UART1_RXD__UART1_RXD 0x80000000
  42. MX25_PAD_UART1_CTS__UART1_CTS 0x80000000
  43. MX25_PAD_UART1_RTS__UART1_RTS 0x80000000
  44. >;
  45. };
  46. pinctrl_fec: fecgrp {
  47. fsl,pins = <
  48. MX25_PAD_D11__GPIO_4_9 0x80000000 /* FEC PHY power on pin */
  49. MX25_PAD_D13__GPIO_4_7 0x80000000 /* FEC reset */
  50. MX25_PAD_FEC_MDC__FEC_MDC 0x80000000
  51. MX25_PAD_FEC_MDIO__FEC_MDIO 0x80000000
  52. MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
  53. MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
  54. MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
  55. MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
  56. MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000
  57. MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
  58. MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000
  59. >;
  60. };
  61. pinctrl_nfc: nfcgrp {
  62. fsl,pins = <
  63. MX25_PAD_NF_CE0__NF_CE0 0x80000000
  64. MX25_PAD_NFWE_B__NFWE_B 0x80000000
  65. MX25_PAD_NFRE_B__NFRE_B 0x80000000
  66. MX25_PAD_NFALE__NFALE 0x80000000
  67. MX25_PAD_NFCLE__NFCLE 0x80000000
  68. MX25_PAD_NFWP_B__NFWP_B 0x80000000
  69. MX25_PAD_NFRB__NFRB 0x80000000
  70. MX25_PAD_D7__D7 0x80000000
  71. MX25_PAD_D6__D6 0x80000000
  72. MX25_PAD_D5__D5 0x80000000
  73. MX25_PAD_D4__D4 0x80000000
  74. MX25_PAD_D3__D3 0x80000000
  75. MX25_PAD_D2__D2 0x80000000
  76. MX25_PAD_D1__D1 0x80000000
  77. MX25_PAD_D0__D0 0x80000000
  78. >;
  79. };
  80. };
  81. &uart1 {
  82. pinctrl-names = "default";
  83. pinctrl-0 = <&pinctrl_uart1>;
  84. status = "okay";
  85. };
  86. &fec {
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&pinctrl_fec>;
  89. phy-reset-gpios = <&gpio3 7 0>;
  90. phy-mode = "rmii";
  91. phy-supply = <&reg_fec_phy>;
  92. status = "okay";
  93. };
  94. &nfc {
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&pinctrl_nfc>;
  97. nand-on-flash-bbt;
  98. nand-ecc-mode = "hw";
  99. nand-bus-width = <8>;
  100. status = "okay";
  101. };