da850-lcdk.dts 4.3 KB

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  1. /*
  2. * Copyright (c) 2016 BayLibre, Inc.
  3. *
  4. * Licensed under GPLv2.
  5. */
  6. /dts-v1/;
  7. #include "da850.dtsi"
  8. #include <dt-bindings/gpio/gpio.h>
  9. / {
  10. model = "DA850/AM1808/OMAP-L138 LCDK";
  11. compatible = "ti,da850-lcdk", "ti,da850";
  12. aliases {
  13. serial2 = &serial2;
  14. };
  15. chosen {
  16. stdout-path = "serial2:115200n8";
  17. };
  18. memory {
  19. device_type = "memory";
  20. reg = <0xc0000000 0x08000000>;
  21. };
  22. sound {
  23. compatible = "simple-audio-card";
  24. simple-audio-card,name = "DA850/OMAP-L138 LCDK";
  25. simple-audio-card,widgets =
  26. "Line", "Line In",
  27. "Line", "Line Out";
  28. simple-audio-card,routing =
  29. "LINE1L", "Line In",
  30. "LINE1R", "Line In",
  31. "Line Out", "LLOUT",
  32. "Line Out", "RLOUT";
  33. simple-audio-card,format = "dsp_b";
  34. simple-audio-card,bitclock-master = <&link0_codec>;
  35. simple-audio-card,frame-master = <&link0_codec>;
  36. simple-audio-card,bitclock-inversion;
  37. simple-audio-card,cpu {
  38. sound-dai = <&mcasp0>;
  39. system-clock-frequency = <24576000>;
  40. };
  41. link0_codec: simple-audio-card,codec {
  42. sound-dai = <&tlv320aic3106>;
  43. system-clock-frequency = <24576000>;
  44. };
  45. };
  46. };
  47. &pmx_core {
  48. status = "okay";
  49. mcasp0_pins: pinmux_mcasp0_pins {
  50. pinctrl-single,bits = <
  51. /* AHCLKX AFSX ACLKX */
  52. 0x00 0x00101010 0x00f0f0f0
  53. /* ARX13 ARX14 */
  54. 0x04 0x00000110 0x00000ff0
  55. >;
  56. };
  57. nand_pins: nand_pins {
  58. pinctrl-single,bits = <
  59. /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
  60. 0x1c 0x10110010 0xf0ff00f0
  61. /*
  62. * EMA_D[0], EMA_D[1], EMA_D[2],
  63. * EMA_D[3], EMA_D[4], EMA_D[5],
  64. * EMA_D[6], EMA_D[7]
  65. */
  66. 0x24 0x11111111 0xffffffff
  67. /*
  68. * EMA_D[8], EMA_D[9], EMA_D[10],
  69. * EMA_D[11], EMA_D[12], EMA_D[13],
  70. * EMA_D[14], EMA_D[15]
  71. */
  72. 0x20 0x11111111 0xffffffff
  73. /* EMA_A[1], EMA_A[2] */
  74. 0x30 0x01100000 0x0ff00000
  75. >;
  76. };
  77. };
  78. &serial2 {
  79. pinctrl-names = "default";
  80. pinctrl-0 = <&serial2_rxtx_pins>;
  81. status = "okay";
  82. };
  83. &wdt {
  84. status = "okay";
  85. };
  86. &rtc0 {
  87. status = "okay";
  88. };
  89. &gpio {
  90. status = "okay";
  91. };
  92. &mdio {
  93. pinctrl-names = "default";
  94. pinctrl-0 = <&mdio_pins>;
  95. bus_freq = <2200000>;
  96. status = "okay";
  97. };
  98. &eth0 {
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&mii_pins>;
  101. status = "okay";
  102. };
  103. &mmc0 {
  104. max-frequency = <50000000>;
  105. bus-width = <4>;
  106. pinctrl-names = "default";
  107. pinctrl-0 = <&mmc0_pins>;
  108. cd-gpios = <&gpio 64 GPIO_ACTIVE_HIGH>;
  109. status = "okay";
  110. };
  111. &i2c0 {
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&i2c0_pins>;
  114. clock-frequency = <100000>;
  115. status = "okay";
  116. tlv320aic3106: tlv320aic3106@18 {
  117. #sound-dai-cells = <0>;
  118. compatible = "ti,tlv320aic3106";
  119. reg = <0x18>;
  120. status = "okay";
  121. };
  122. };
  123. &mcasp0 {
  124. #sound-dai-cells = <0>;
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&mcasp0_pins>;
  127. status = "okay";
  128. op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
  129. tdm-slots = <2>;
  130. serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
  131. 0 0 0 0
  132. 0 0 0 0
  133. 0 0 0 0
  134. 0 1 2 0
  135. >;
  136. tx-num-evt = <32>;
  137. rx-num-evt = <32>;
  138. };
  139. &aemif {
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&nand_pins>;
  142. status = "okay";
  143. cs3 {
  144. #address-cells = <2>;
  145. #size-cells = <1>;
  146. clock-ranges;
  147. ranges;
  148. ti,cs-chipselect = <3>;
  149. nand@2000000,0 {
  150. compatible = "ti,davinci-nand";
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153. reg = <0 0x02000000 0x02000000
  154. 1 0x00000000 0x00008000>;
  155. ti,davinci-chipselect = <1>;
  156. ti,davinci-mask-ale = <0>;
  157. ti,davinci-mask-cle = <0>;
  158. ti,davinci-mask-chipsel = <0>;
  159. ti,davinci-nand-buswidth = <16>;
  160. ti,davinci-ecc-mode = "hw";
  161. ti,davinci-ecc-bits = <4>;
  162. ti,davinci-nand-use-bbt;
  163. /*
  164. * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
  165. * "To boot from NAND Flash, the AIS should be written
  166. * to NAND block 1 (NAND block 0 is not used by default)".
  167. * The same doc mentions that for ROM "Silicon Revision 2.1",
  168. * "Updated NAND boot mode to offer boot from block 0 or block 1".
  169. * However the limitaion is left here by default for compatibility
  170. * with older silicon and because it needs new boot pin settings
  171. * not possible in stock LCDK.
  172. */
  173. partitions {
  174. compatible = "fixed-partitions";
  175. #address-cells = <1>;
  176. #size-cells = <1>;
  177. partition@0 {
  178. label = "u-boot env";
  179. reg = <0 0x020000>;
  180. };
  181. partition@0x020000 {
  182. /* The LCDK defaults to booting from this partition */
  183. label = "u-boot";
  184. reg = <0x020000 0x080000>;
  185. };
  186. partition@0x0a0000 {
  187. label = "free space";
  188. reg = <0x0a0000 0>;
  189. };
  190. };
  191. };
  192. };
  193. };