am335x-sl50.dts 13 KB

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  1. /*
  2. * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. / {
  11. model = "Toby Churchill SL50 Series";
  12. compatible = "tcl,am335x-sl50", "ti,am33xx";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&dcdc2_reg>;
  16. };
  17. };
  18. memory@80000000 {
  19. device_type = "memory";
  20. reg = <0x80000000 0x20000000>; /* 512 MB */
  21. };
  22. chosen {
  23. stdout-path = &uart0;
  24. };
  25. leds {
  26. compatible = "gpio-leds";
  27. pinctrl-names = "default";
  28. pinctrl-0 = <&led_pins>;
  29. led0 {
  30. label = "sl50:green:usr0";
  31. gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
  32. default-state = "off";
  33. };
  34. led1 {
  35. label = "sl50:red:usr1";
  36. gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
  37. default-state = "off";
  38. };
  39. led2 {
  40. label = "sl50:green:usr2";
  41. gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
  42. default-state = "off";
  43. };
  44. led3 {
  45. label = "sl50:red:usr3";
  46. gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
  47. default-state = "off";
  48. };
  49. };
  50. backlight0: disp0 {
  51. compatible = "pwm-backlight";
  52. pwms = <&ehrpwm1 0 500000 0>;
  53. brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
  54. default-brightness-level = <6>;
  55. };
  56. backlight1: disp1 {
  57. compatible = "pwm-backlight";
  58. pwms = <&ehrpwm1 1 500000 0>;
  59. brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
  60. default-brightness-level = <6>;
  61. };
  62. clocks {
  63. compatible = "simple-bus";
  64. #address-cells = <1>;
  65. #size-cells = <0>;
  66. /* audio external oscillator */
  67. tlv320aic3x_mclk: oscillator@0 {
  68. compatible = "fixed-clock";
  69. #clock-cells = <0>;
  70. clock-frequency = <24576000>; /* 24.576MHz */
  71. };
  72. };
  73. sound {
  74. compatible = "ti,da830-evm-audio";
  75. ti,model = "AM335x-SL50";
  76. ti,audio-codec = <&audio_codec>;
  77. ti,mcasp-controller = <&mcasp0>;
  78. clocks = <&tlv320aic3x_mclk>;
  79. clock-names = "mclk";
  80. ti,audio-routing =
  81. "Headphone Jack", "HPLOUT",
  82. "Headphone Jack", "HPROUT",
  83. "LINE1R", "Line In",
  84. "LINE1L", "Line In";
  85. };
  86. emmc_pwrseq: pwrseq@0 {
  87. compatible = "mmc-pwrseq-emmc";
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&emmc_pwrseq_pins>;
  90. reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
  91. };
  92. vmmcsd_fixed: fixedregulator0 {
  93. compatible = "regulator-fixed";
  94. regulator-name = "vmmcsd_fixed";
  95. regulator-min-microvolt = <3300000>;
  96. regulator-max-microvolt = <3300000>;
  97. };
  98. };
  99. &am33xx_pinmux {
  100. pinctrl-names = "default";
  101. pinctrl-0 = <&lwb_pins>;
  102. led_pins: pinmux_led_pins {
  103. pinctrl-single,pins = <
  104. AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  105. AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  106. AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23 */
  107. AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* gpmc_a8.gpio1_24 */
  108. >;
  109. };
  110. uart0_pins: pinmux_uart0_pins {
  111. pinctrl-single,pins = <
  112. AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  113. AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  114. >;
  115. };
  116. uart4_pins: pinmux_uart4_pins {
  117. pinctrl-single,pins = <
  118. AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
  119. AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
  120. >;
  121. };
  122. i2c0_pins: pinmux_i2c0_pins {
  123. pinctrl-single,pins = <
  124. AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  125. AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  126. >;
  127. };
  128. i2c1_pins: pinmux_i2c1_pins {
  129. pinctrl-single,pins = <
  130. AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
  131. AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txdi2c1_scl */
  132. >;
  133. };
  134. i2c2_pins: pinmux_i2c2_pins {
  135. pinctrl-single,pins = <
  136. AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
  137. AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
  138. >;
  139. };
  140. cpsw_default: cpsw_default {
  141. pinctrl-single,pins = <
  142. /* Slave 1 */
  143. AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
  144. AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
  145. AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
  146. AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
  147. AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
  148. AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
  149. AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
  150. AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
  151. AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
  152. AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
  153. AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
  154. AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
  155. AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
  156. >;
  157. };
  158. cpsw_sleep: cpsw_sleep {
  159. pinctrl-single,pins = <
  160. /* Slave 1 reset value */
  161. AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
  162. AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
  163. AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
  164. AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  165. AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
  166. AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
  167. AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
  168. AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  169. AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
  170. AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
  171. AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
  172. AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  173. AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
  174. >;
  175. };
  176. davinci_mdio_default: davinci_mdio_default {
  177. pinctrl-single,pins = <
  178. /* MDIO */
  179. AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  180. AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  181. >;
  182. };
  183. davinci_mdio_sleep: davinci_mdio_sleep {
  184. pinctrl-single,pins = <
  185. /* MDIO reset value */
  186. AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
  187. AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  188. >;
  189. };
  190. mmc1_pins: pinmux_mmc1_pins {
  191. pinctrl-single,pins = <
  192. AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
  193. >;
  194. };
  195. emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
  196. pinctrl-single,pins = <
  197. AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */
  198. >;
  199. };
  200. emmc_pins: pinmux_emmc_pins {
  201. pinctrl-single,pins = <
  202. AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
  203. AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
  204. AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
  205. AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
  206. AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
  207. AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
  208. AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
  209. AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
  210. AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
  211. AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
  212. >;
  213. };
  214. audio_pins: pinmux_audio_pins {
  215. pinctrl-single,pins = <
  216. AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
  217. AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
  218. AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
  219. AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
  220. AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */
  221. >;
  222. };
  223. ehrpwm1_pins: pinmux_ehrpwm1a_pins {
  224. pinctrl-single,pins = <
  225. AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
  226. AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */
  227. >;
  228. };
  229. lwb_pins: pinmux_lwb_pins {
  230. pinctrl-single,pins = <
  231. AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */
  232. AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* nKbdOnC - gpmc_ad10.gpio0_26 */
  233. AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
  234. AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
  235. AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */
  236. AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
  237. /* AVR Programming - SPI Bus (bit bang) - Screen and Keyboard */
  238. AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMOSI spi0_d0.gpio0_3 */
  239. AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMISO spi0_d1.gpio0_4 */
  240. AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattSCLK spi0_clk.gpio0_2 */
  241. /* PDI Bus - Battery system */
  242. AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
  243. AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
  244. >;
  245. };
  246. };
  247. &i2c0 {
  248. status = "okay";
  249. pinctrl-names = "default";
  250. pinctrl-0 = <&i2c0_pins>;
  251. clock-frequency = <400000>;
  252. tps: tps@24 {
  253. reg = <0x24>;
  254. };
  255. eeprom: eeprom@50 {
  256. compatible = "at,24c256";
  257. reg = <0x50>;
  258. };
  259. };
  260. &i2c1 {
  261. status = "okay";
  262. pinctrl-names = "default";
  263. pinctrl-0 = <&i2c1_pins>;
  264. };
  265. &i2c2 {
  266. status = "okay";
  267. pinctrl-names = "default";
  268. pinctrl-0 = <&i2c2_pins>;
  269. clock-frequency = <400000>;
  270. audio_codec: tlv320aic3106@1b {
  271. status = "okay";
  272. compatible = "ti,tlv320aic3106";
  273. reg = <0x1b>;
  274. AVDD-supply = <&ldo4_reg>;
  275. IOVDD-supply = <&ldo4_reg>;
  276. DRVDD-supply = <&ldo4_reg>;
  277. DVDD-supply = <&ldo3_reg>;
  278. };
  279. };
  280. &usb {
  281. status = "okay";
  282. };
  283. &usb_ctrl_mod {
  284. status = "okay";
  285. };
  286. &usb0_phy {
  287. status = "okay";
  288. };
  289. &usb1_phy {
  290. status = "okay";
  291. };
  292. &usb0 {
  293. status = "okay";
  294. dr_mode = "peripheral";
  295. };
  296. &usb1 {
  297. status = "okay";
  298. dr_mode = "host";
  299. };
  300. &cppi41dma {
  301. status = "okay";
  302. };
  303. &mmc1 {
  304. status = "okay";
  305. pinctrl-names = "default";
  306. pinctrl-0 = <&mmc1_pins>;
  307. bus-width = <4>;
  308. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  309. vmmc-supply = <&vmmcsd_fixed>;
  310. };
  311. &mmc2 {
  312. status = "okay";
  313. pinctrl-names = "default";
  314. pinctrl-0 = <&emmc_pins>;
  315. bus-width = <8>;
  316. vmmc-supply = <&vmmcsd_fixed>;
  317. mmc-pwrseq = <&emmc_pwrseq>;
  318. };
  319. &mcasp0 {
  320. status = "okay";
  321. pinctrl-names = "default";
  322. pinctrl-0 = <&audio_pins>;
  323. op-mode = <0>; /* MCASP_ISS_MODE */
  324. tdm-slots = <2>;
  325. serial-dir = <
  326. 2 0 1 0
  327. 0 0 0 0
  328. 0 0 0 0
  329. 0 0 0 0
  330. >;
  331. tx-num-evt = <1>;
  332. rx-num-evt = <1>;
  333. };
  334. &uart0 {
  335. status = "okay";
  336. pinctrl-names = "default";
  337. pinctrl-0 = <&uart0_pins>;
  338. };
  339. &uart4 {
  340. status = "okay";
  341. pinctrl-names = "default";
  342. pinctrl-0 = <&uart4_pins>;
  343. };
  344. #include "tps65217.dtsi"
  345. &tps {
  346. ti,pmic-shutdown-controller;
  347. interrupt-parent = <&intc>;
  348. interrupts = <7>; /* NNMI */
  349. regulators {
  350. dcdc1_reg: regulator@0 {
  351. /* VDDS_DDR */
  352. regulator-min-microvolt = <1500000>;
  353. regulator-max-microvolt = <1500000>;
  354. regulator-always-on;
  355. };
  356. dcdc2_reg: regulator@1 {
  357. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  358. regulator-name = "vdd_mpu";
  359. regulator-min-microvolt = <925000>;
  360. regulator-max-microvolt = <1325000>;
  361. regulator-boot-on;
  362. regulator-always-on;
  363. };
  364. dcdc3_reg: regulator@2 {
  365. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  366. regulator-name = "vdd_core";
  367. regulator-min-microvolt = <925000>;
  368. regulator-max-microvolt = <1150000>;
  369. regulator-boot-on;
  370. regulator-always-on;
  371. };
  372. ldo1_reg: regulator@3 {
  373. /* VRTC / VIO / VDDS*/
  374. regulator-always-on;
  375. regulator-min-microvolt = <1800000>;
  376. regulator-max-microvolt = <1800000>;
  377. };
  378. ldo2_reg: regulator@4 {
  379. /* VDD_3V3AUX */
  380. regulator-always-on;
  381. regulator-min-microvolt = <3300000>;
  382. regulator-max-microvolt = <3300000>;
  383. };
  384. ldo3_reg: regulator@5 {
  385. /* VDD_1V8 */
  386. regulator-min-microvolt = <1800000>;
  387. regulator-max-microvolt = <1800000>;
  388. regulator-always-on;
  389. };
  390. ldo4_reg: regulator@6 {
  391. /* VDD_3V3A */
  392. regulator-min-microvolt = <3300000>;
  393. regulator-max-microvolt = <3300000>;
  394. regulator-always-on;
  395. };
  396. };
  397. };
  398. &cpsw_emac0 {
  399. phy_id = <&davinci_mdio>, <0>;
  400. phy-mode = "mii";
  401. };
  402. &cpsw_emac1 {
  403. phy_id = <&davinci_mdio>, <1>;
  404. phy-mode = "mii";
  405. };
  406. &mac {
  407. status = "okay";
  408. pinctrl-names = "default", "sleep";
  409. pinctrl-0 = <&cpsw_default>;
  410. pinctrl-1 = <&cpsw_sleep>;
  411. };
  412. &davinci_mdio {
  413. status = "okay";
  414. pinctrl-names = "default", "sleep";
  415. pinctrl-0 = <&davinci_mdio_default>;
  416. pinctrl-1 = <&davinci_mdio_sleep>;
  417. };
  418. &sham {
  419. status = "okay";
  420. };
  421. &aes {
  422. status = "okay";
  423. };
  424. &epwmss1 {
  425. status = "okay";
  426. };
  427. &ehrpwm1 {
  428. status = "okay";
  429. pinctrl-names = "default";
  430. pinctrl-0 = <&ehrpwm1_pins>;
  431. };