swiotlb.c 28 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. * 08/12/11 beckyb Add highmem support
  18. */
  19. #include <linux/cache.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/mm.h>
  22. #include <linux/export.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/pfn.h>
  27. #include <linux/types.h>
  28. #include <linux/ctype.h>
  29. #include <linux/highmem.h>
  30. #include <linux/gfp.h>
  31. #include <linux/scatterlist.h>
  32. #include <asm/io.h>
  33. #include <asm/dma.h>
  34. #include <linux/init.h>
  35. #include <linux/bootmem.h>
  36. #include <linux/iommu-helper.h>
  37. #define CREATE_TRACE_POINTS
  38. #include <trace/events/swiotlb.h>
  39. #define OFFSET(val,align) ((unsigned long) \
  40. ( (val) & ( (align) - 1)))
  41. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  42. /*
  43. * Minimum IO TLB size to bother booting with. Systems with mainly
  44. * 64bit capable cards will only lightly use the swiotlb. If we can't
  45. * allocate a contiguous 1MB, we're probably in trouble anyway.
  46. */
  47. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  48. enum swiotlb_force swiotlb_force;
  49. /*
  50. * Used to do a quick range check in swiotlb_tbl_unmap_single and
  51. * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
  52. * API.
  53. */
  54. static phys_addr_t io_tlb_start, io_tlb_end;
  55. /*
  56. * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
  57. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  58. */
  59. static unsigned long io_tlb_nslabs;
  60. /*
  61. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  62. */
  63. static unsigned long io_tlb_overflow = 32*1024;
  64. static phys_addr_t io_tlb_overflow_buffer;
  65. /*
  66. * This is a free list describing the number of free entries available from
  67. * each index
  68. */
  69. static unsigned int *io_tlb_list;
  70. static unsigned int io_tlb_index;
  71. /*
  72. * We need to save away the original address corresponding to a mapped entry
  73. * for the sync operations.
  74. */
  75. #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
  76. static phys_addr_t *io_tlb_orig_addr;
  77. /*
  78. * Protect the above data structures in the map and unmap calls
  79. */
  80. static DEFINE_SPINLOCK(io_tlb_lock);
  81. static int late_alloc;
  82. static int __init
  83. setup_io_tlb_npages(char *str)
  84. {
  85. if (isdigit(*str)) {
  86. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  87. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  88. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  89. }
  90. if (*str == ',')
  91. ++str;
  92. if (!strcmp(str, "force")) {
  93. swiotlb_force = SWIOTLB_FORCE;
  94. } else if (!strcmp(str, "noforce")) {
  95. swiotlb_force = SWIOTLB_NO_FORCE;
  96. io_tlb_nslabs = 1;
  97. }
  98. return 0;
  99. }
  100. early_param("swiotlb", setup_io_tlb_npages);
  101. /* make io_tlb_overflow tunable too? */
  102. unsigned long swiotlb_nr_tbl(void)
  103. {
  104. return io_tlb_nslabs;
  105. }
  106. EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
  107. /* default to 64MB */
  108. #define IO_TLB_DEFAULT_SIZE (64UL<<20)
  109. unsigned long swiotlb_size_or_default(void)
  110. {
  111. unsigned long size;
  112. size = io_tlb_nslabs << IO_TLB_SHIFT;
  113. return size ? size : (IO_TLB_DEFAULT_SIZE);
  114. }
  115. /* Note that this doesn't work with highmem page */
  116. static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
  117. volatile void *address)
  118. {
  119. return phys_to_dma(hwdev, virt_to_phys(address));
  120. }
  121. static bool no_iotlb_memory;
  122. void swiotlb_print_info(void)
  123. {
  124. unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  125. unsigned char *vstart, *vend;
  126. if (no_iotlb_memory) {
  127. pr_warn("software IO TLB: No low mem\n");
  128. return;
  129. }
  130. vstart = phys_to_virt(io_tlb_start);
  131. vend = phys_to_virt(io_tlb_end);
  132. printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
  133. (unsigned long long)io_tlb_start,
  134. (unsigned long long)io_tlb_end,
  135. bytes >> 20, vstart, vend - 1);
  136. }
  137. int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
  138. {
  139. void *v_overflow_buffer;
  140. unsigned long i, bytes;
  141. bytes = nslabs << IO_TLB_SHIFT;
  142. io_tlb_nslabs = nslabs;
  143. io_tlb_start = __pa(tlb);
  144. io_tlb_end = io_tlb_start + bytes;
  145. /*
  146. * Get the overflow emergency buffer
  147. */
  148. v_overflow_buffer = memblock_virt_alloc_low_nopanic(
  149. PAGE_ALIGN(io_tlb_overflow),
  150. PAGE_SIZE);
  151. if (!v_overflow_buffer)
  152. return -ENOMEM;
  153. io_tlb_overflow_buffer = __pa(v_overflow_buffer);
  154. /*
  155. * Allocate and initialize the free list array. This array is used
  156. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  157. * between io_tlb_start and io_tlb_end.
  158. */
  159. io_tlb_list = memblock_virt_alloc(
  160. PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
  161. PAGE_SIZE);
  162. io_tlb_orig_addr = memblock_virt_alloc(
  163. PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
  164. PAGE_SIZE);
  165. for (i = 0; i < io_tlb_nslabs; i++) {
  166. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  167. io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
  168. }
  169. io_tlb_index = 0;
  170. if (verbose)
  171. swiotlb_print_info();
  172. return 0;
  173. }
  174. /*
  175. * Statically reserve bounce buffer space and initialize bounce buffer data
  176. * structures for the software IO TLB used to implement the DMA API.
  177. */
  178. void __init
  179. swiotlb_init(int verbose)
  180. {
  181. size_t default_size = IO_TLB_DEFAULT_SIZE;
  182. unsigned char *vstart;
  183. unsigned long bytes;
  184. if (!io_tlb_nslabs) {
  185. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  186. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  187. }
  188. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  189. /* Get IO TLB memory from the low pages */
  190. vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
  191. if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
  192. return;
  193. if (io_tlb_start)
  194. memblock_free_early(io_tlb_start,
  195. PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
  196. pr_warn("Cannot allocate SWIOTLB buffer");
  197. no_iotlb_memory = true;
  198. }
  199. /*
  200. * Systems with larger DMA zones (those that don't support ISA) can
  201. * initialize the swiotlb later using the slab allocator if needed.
  202. * This should be just like above, but with some error catching.
  203. */
  204. int
  205. swiotlb_late_init_with_default_size(size_t default_size)
  206. {
  207. unsigned long bytes, req_nslabs = io_tlb_nslabs;
  208. unsigned char *vstart = NULL;
  209. unsigned int order;
  210. int rc = 0;
  211. if (!io_tlb_nslabs) {
  212. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  213. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  214. }
  215. /*
  216. * Get IO TLB memory from the low pages
  217. */
  218. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  219. io_tlb_nslabs = SLABS_PER_PAGE << order;
  220. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  221. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  222. vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  223. order);
  224. if (vstart)
  225. break;
  226. order--;
  227. }
  228. if (!vstart) {
  229. io_tlb_nslabs = req_nslabs;
  230. return -ENOMEM;
  231. }
  232. if (order != get_order(bytes)) {
  233. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  234. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  235. io_tlb_nslabs = SLABS_PER_PAGE << order;
  236. }
  237. rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
  238. if (rc)
  239. free_pages((unsigned long)vstart, order);
  240. return rc;
  241. }
  242. int
  243. swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
  244. {
  245. unsigned long i, bytes;
  246. unsigned char *v_overflow_buffer;
  247. bytes = nslabs << IO_TLB_SHIFT;
  248. io_tlb_nslabs = nslabs;
  249. io_tlb_start = virt_to_phys(tlb);
  250. io_tlb_end = io_tlb_start + bytes;
  251. memset(tlb, 0, bytes);
  252. /*
  253. * Get the overflow emergency buffer
  254. */
  255. v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  256. get_order(io_tlb_overflow));
  257. if (!v_overflow_buffer)
  258. goto cleanup2;
  259. io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
  260. /*
  261. * Allocate and initialize the free list array. This array is used
  262. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  263. * between io_tlb_start and io_tlb_end.
  264. */
  265. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  266. get_order(io_tlb_nslabs * sizeof(int)));
  267. if (!io_tlb_list)
  268. goto cleanup3;
  269. io_tlb_orig_addr = (phys_addr_t *)
  270. __get_free_pages(GFP_KERNEL,
  271. get_order(io_tlb_nslabs *
  272. sizeof(phys_addr_t)));
  273. if (!io_tlb_orig_addr)
  274. goto cleanup4;
  275. for (i = 0; i < io_tlb_nslabs; i++) {
  276. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  277. io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
  278. }
  279. io_tlb_index = 0;
  280. swiotlb_print_info();
  281. late_alloc = 1;
  282. return 0;
  283. cleanup4:
  284. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  285. sizeof(int)));
  286. io_tlb_list = NULL;
  287. cleanup3:
  288. free_pages((unsigned long)v_overflow_buffer,
  289. get_order(io_tlb_overflow));
  290. io_tlb_overflow_buffer = 0;
  291. cleanup2:
  292. io_tlb_end = 0;
  293. io_tlb_start = 0;
  294. io_tlb_nslabs = 0;
  295. return -ENOMEM;
  296. }
  297. void __init swiotlb_free(void)
  298. {
  299. if (!io_tlb_orig_addr)
  300. return;
  301. if (late_alloc) {
  302. free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
  303. get_order(io_tlb_overflow));
  304. free_pages((unsigned long)io_tlb_orig_addr,
  305. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  306. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  307. sizeof(int)));
  308. free_pages((unsigned long)phys_to_virt(io_tlb_start),
  309. get_order(io_tlb_nslabs << IO_TLB_SHIFT));
  310. } else {
  311. memblock_free_late(io_tlb_overflow_buffer,
  312. PAGE_ALIGN(io_tlb_overflow));
  313. memblock_free_late(__pa(io_tlb_orig_addr),
  314. PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
  315. memblock_free_late(__pa(io_tlb_list),
  316. PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
  317. memblock_free_late(io_tlb_start,
  318. PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
  319. }
  320. io_tlb_nslabs = 0;
  321. }
  322. int is_swiotlb_buffer(phys_addr_t paddr)
  323. {
  324. return paddr >= io_tlb_start && paddr < io_tlb_end;
  325. }
  326. /*
  327. * Bounce: copy the swiotlb buffer back to the original dma location
  328. */
  329. static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
  330. size_t size, enum dma_data_direction dir)
  331. {
  332. unsigned long pfn = PFN_DOWN(orig_addr);
  333. unsigned char *vaddr = phys_to_virt(tlb_addr);
  334. if (PageHighMem(pfn_to_page(pfn))) {
  335. /* The buffer does not have a mapping. Map it in and copy */
  336. unsigned int offset = orig_addr & ~PAGE_MASK;
  337. char *buffer;
  338. unsigned int sz = 0;
  339. unsigned long flags;
  340. while (size) {
  341. sz = min_t(size_t, PAGE_SIZE - offset, size);
  342. local_irq_save(flags);
  343. buffer = kmap_atomic(pfn_to_page(pfn));
  344. if (dir == DMA_TO_DEVICE)
  345. memcpy(vaddr, buffer + offset, sz);
  346. else
  347. memcpy(buffer + offset, vaddr, sz);
  348. kunmap_atomic(buffer);
  349. local_irq_restore(flags);
  350. size -= sz;
  351. pfn++;
  352. vaddr += sz;
  353. offset = 0;
  354. }
  355. } else if (dir == DMA_TO_DEVICE) {
  356. memcpy(vaddr, phys_to_virt(orig_addr), size);
  357. } else {
  358. memcpy(phys_to_virt(orig_addr), vaddr, size);
  359. }
  360. }
  361. phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
  362. dma_addr_t tbl_dma_addr,
  363. phys_addr_t orig_addr, size_t size,
  364. enum dma_data_direction dir)
  365. {
  366. unsigned long flags;
  367. phys_addr_t tlb_addr;
  368. unsigned int nslots, stride, index, wrap;
  369. int i;
  370. unsigned long mask;
  371. unsigned long offset_slots;
  372. unsigned long max_slots;
  373. if (no_iotlb_memory)
  374. panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
  375. mask = dma_get_seg_boundary(hwdev);
  376. tbl_dma_addr &= mask;
  377. offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  378. /*
  379. * Carefully handle integer overflow which can occur when mask == ~0UL.
  380. */
  381. max_slots = mask + 1
  382. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  383. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  384. /*
  385. * For mappings greater than or equal to a page, we limit the stride
  386. * (and hence alignment) to a page size.
  387. */
  388. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  389. if (size >= PAGE_SIZE)
  390. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  391. else
  392. stride = 1;
  393. BUG_ON(!nslots);
  394. /*
  395. * Find suitable number of IO TLB entries size that will fit this
  396. * request and allocate a buffer from that IO TLB pool.
  397. */
  398. spin_lock_irqsave(&io_tlb_lock, flags);
  399. index = ALIGN(io_tlb_index, stride);
  400. if (index >= io_tlb_nslabs)
  401. index = 0;
  402. wrap = index;
  403. do {
  404. while (iommu_is_span_boundary(index, nslots, offset_slots,
  405. max_slots)) {
  406. index += stride;
  407. if (index >= io_tlb_nslabs)
  408. index = 0;
  409. if (index == wrap)
  410. goto not_found;
  411. }
  412. /*
  413. * If we find a slot that indicates we have 'nslots' number of
  414. * contiguous buffers, we allocate the buffers from that slot
  415. * and mark the entries as '0' indicating unavailable.
  416. */
  417. if (io_tlb_list[index] >= nslots) {
  418. int count = 0;
  419. for (i = index; i < (int) (index + nslots); i++)
  420. io_tlb_list[i] = 0;
  421. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  422. io_tlb_list[i] = ++count;
  423. tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  424. /*
  425. * Update the indices to avoid searching in the next
  426. * round.
  427. */
  428. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  429. ? (index + nslots) : 0);
  430. goto found;
  431. }
  432. index += stride;
  433. if (index >= io_tlb_nslabs)
  434. index = 0;
  435. } while (index != wrap);
  436. not_found:
  437. spin_unlock_irqrestore(&io_tlb_lock, flags);
  438. if (printk_ratelimit())
  439. dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
  440. return SWIOTLB_MAP_ERROR;
  441. found:
  442. spin_unlock_irqrestore(&io_tlb_lock, flags);
  443. /*
  444. * Save away the mapping from the original address to the DMA address.
  445. * This is needed when we sync the memory. Then we sync the buffer if
  446. * needed.
  447. */
  448. for (i = 0; i < nslots; i++)
  449. io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
  450. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  451. swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
  452. return tlb_addr;
  453. }
  454. EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
  455. /*
  456. * Allocates bounce buffer and returns its kernel virtual address.
  457. */
  458. static phys_addr_t
  459. map_single(struct device *hwdev, phys_addr_t phys, size_t size,
  460. enum dma_data_direction dir)
  461. {
  462. dma_addr_t start_dma_addr;
  463. if (swiotlb_force == SWIOTLB_NO_FORCE) {
  464. dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n",
  465. &phys);
  466. return SWIOTLB_MAP_ERROR;
  467. }
  468. start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
  469. return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
  470. }
  471. /*
  472. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  473. */
  474. void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
  475. size_t size, enum dma_data_direction dir)
  476. {
  477. unsigned long flags;
  478. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  479. int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
  480. phys_addr_t orig_addr = io_tlb_orig_addr[index];
  481. /*
  482. * First, sync the memory before unmapping the entry
  483. */
  484. if (orig_addr != INVALID_PHYS_ADDR &&
  485. ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  486. swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
  487. /*
  488. * Return the buffer to the free list by setting the corresponding
  489. * entries to indicate the number of contiguous entries available.
  490. * While returning the entries to the free list, we merge the entries
  491. * with slots below and above the pool being returned.
  492. */
  493. spin_lock_irqsave(&io_tlb_lock, flags);
  494. {
  495. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  496. io_tlb_list[index + nslots] : 0);
  497. /*
  498. * Step 1: return the slots to the free list, merging the
  499. * slots with superceeding slots
  500. */
  501. for (i = index + nslots - 1; i >= index; i--) {
  502. io_tlb_list[i] = ++count;
  503. io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
  504. }
  505. /*
  506. * Step 2: merge the returned slots with the preceding slots,
  507. * if available (non zero)
  508. */
  509. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  510. io_tlb_list[i] = ++count;
  511. }
  512. spin_unlock_irqrestore(&io_tlb_lock, flags);
  513. }
  514. EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
  515. void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
  516. size_t size, enum dma_data_direction dir,
  517. enum dma_sync_target target)
  518. {
  519. int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
  520. phys_addr_t orig_addr = io_tlb_orig_addr[index];
  521. if (orig_addr == INVALID_PHYS_ADDR)
  522. return;
  523. orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
  524. switch (target) {
  525. case SYNC_FOR_CPU:
  526. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  527. swiotlb_bounce(orig_addr, tlb_addr,
  528. size, DMA_FROM_DEVICE);
  529. else
  530. BUG_ON(dir != DMA_TO_DEVICE);
  531. break;
  532. case SYNC_FOR_DEVICE:
  533. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  534. swiotlb_bounce(orig_addr, tlb_addr,
  535. size, DMA_TO_DEVICE);
  536. else
  537. BUG_ON(dir != DMA_FROM_DEVICE);
  538. break;
  539. default:
  540. BUG();
  541. }
  542. }
  543. EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
  544. void *
  545. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  546. dma_addr_t *dma_handle, gfp_t flags)
  547. {
  548. dma_addr_t dev_addr;
  549. void *ret;
  550. int order = get_order(size);
  551. u64 dma_mask = DMA_BIT_MASK(32);
  552. if (hwdev && hwdev->coherent_dma_mask)
  553. dma_mask = hwdev->coherent_dma_mask;
  554. ret = (void *)__get_free_pages(flags, order);
  555. if (ret) {
  556. dev_addr = swiotlb_virt_to_bus(hwdev, ret);
  557. if (dev_addr + size - 1 > dma_mask) {
  558. /*
  559. * The allocated memory isn't reachable by the device.
  560. */
  561. free_pages((unsigned long) ret, order);
  562. ret = NULL;
  563. }
  564. }
  565. if (!ret) {
  566. /*
  567. * We are either out of memory or the device can't DMA to
  568. * GFP_DMA memory; fall back on map_single(), which
  569. * will grab memory from the lowest available address range.
  570. */
  571. phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
  572. if (paddr == SWIOTLB_MAP_ERROR)
  573. goto err_warn;
  574. ret = phys_to_virt(paddr);
  575. dev_addr = phys_to_dma(hwdev, paddr);
  576. /* Confirm address can be DMA'd by device */
  577. if (dev_addr + size - 1 > dma_mask) {
  578. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  579. (unsigned long long)dma_mask,
  580. (unsigned long long)dev_addr);
  581. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  582. swiotlb_tbl_unmap_single(hwdev, paddr,
  583. size, DMA_TO_DEVICE);
  584. goto err_warn;
  585. }
  586. }
  587. *dma_handle = dev_addr;
  588. memset(ret, 0, size);
  589. return ret;
  590. err_warn:
  591. pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n",
  592. dev_name(hwdev), size);
  593. dump_stack();
  594. return NULL;
  595. }
  596. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  597. void
  598. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  599. dma_addr_t dev_addr)
  600. {
  601. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  602. WARN_ON(irqs_disabled());
  603. if (!is_swiotlb_buffer(paddr))
  604. free_pages((unsigned long)vaddr, get_order(size));
  605. else
  606. /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
  607. swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
  608. }
  609. EXPORT_SYMBOL(swiotlb_free_coherent);
  610. static void
  611. swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
  612. int do_panic)
  613. {
  614. if (swiotlb_force == SWIOTLB_NO_FORCE)
  615. return;
  616. /*
  617. * Ran out of IOMMU space for this operation. This is very bad.
  618. * Unfortunately the drivers cannot handle this operation properly.
  619. * unless they check for dma_mapping_error (most don't)
  620. * When the mapping is small enough return a static buffer to limit
  621. * the damage, or panic when the transfer is too big.
  622. */
  623. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  624. "device %s\n", size, dev ? dev_name(dev) : "?");
  625. if (size <= io_tlb_overflow || !do_panic)
  626. return;
  627. if (dir == DMA_BIDIRECTIONAL)
  628. panic("DMA: Random memory could be DMA accessed\n");
  629. if (dir == DMA_FROM_DEVICE)
  630. panic("DMA: Random memory could be DMA written\n");
  631. if (dir == DMA_TO_DEVICE)
  632. panic("DMA: Random memory could be DMA read\n");
  633. }
  634. /*
  635. * Map a single buffer of the indicated size for DMA in streaming mode. The
  636. * physical address to use is returned.
  637. *
  638. * Once the device is given the dma address, the device owns this memory until
  639. * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
  640. */
  641. dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
  642. unsigned long offset, size_t size,
  643. enum dma_data_direction dir,
  644. unsigned long attrs)
  645. {
  646. phys_addr_t map, phys = page_to_phys(page) + offset;
  647. dma_addr_t dev_addr = phys_to_dma(dev, phys);
  648. BUG_ON(dir == DMA_NONE);
  649. /*
  650. * If the address happens to be in the device's DMA window,
  651. * we can safely return the device addr and not worry about bounce
  652. * buffering it.
  653. */
  654. if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE)
  655. return dev_addr;
  656. trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
  657. /* Oh well, have to allocate and map a bounce buffer. */
  658. map = map_single(dev, phys, size, dir);
  659. if (map == SWIOTLB_MAP_ERROR) {
  660. swiotlb_full(dev, size, dir, 1);
  661. return phys_to_dma(dev, io_tlb_overflow_buffer);
  662. }
  663. dev_addr = phys_to_dma(dev, map);
  664. /* Ensure that the address returned is DMA'ble */
  665. if (!dma_capable(dev, dev_addr, size)) {
  666. swiotlb_tbl_unmap_single(dev, map, size, dir);
  667. return phys_to_dma(dev, io_tlb_overflow_buffer);
  668. }
  669. return dev_addr;
  670. }
  671. EXPORT_SYMBOL_GPL(swiotlb_map_page);
  672. /*
  673. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  674. * match what was provided for in a previous swiotlb_map_page call. All
  675. * other usages are undefined.
  676. *
  677. * After this call, reads by the cpu to the buffer are guaranteed to see
  678. * whatever the device wrote there.
  679. */
  680. static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
  681. size_t size, enum dma_data_direction dir)
  682. {
  683. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  684. BUG_ON(dir == DMA_NONE);
  685. if (is_swiotlb_buffer(paddr)) {
  686. swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
  687. return;
  688. }
  689. if (dir != DMA_FROM_DEVICE)
  690. return;
  691. /*
  692. * phys_to_virt doesn't work with hihgmem page but we could
  693. * call dma_mark_clean() with hihgmem page here. However, we
  694. * are fine since dma_mark_clean() is null on POWERPC. We can
  695. * make dma_mark_clean() take a physical address if necessary.
  696. */
  697. dma_mark_clean(phys_to_virt(paddr), size);
  698. }
  699. void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
  700. size_t size, enum dma_data_direction dir,
  701. unsigned long attrs)
  702. {
  703. unmap_single(hwdev, dev_addr, size, dir);
  704. }
  705. EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
  706. /*
  707. * Make physical memory consistent for a single streaming mode DMA translation
  708. * after a transfer.
  709. *
  710. * If you perform a swiotlb_map_page() but wish to interrogate the buffer
  711. * using the cpu, yet do not wish to teardown the dma mapping, you must
  712. * call this function before doing so. At the next point you give the dma
  713. * address back to the card, you must first perform a
  714. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  715. */
  716. static void
  717. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  718. size_t size, enum dma_data_direction dir,
  719. enum dma_sync_target target)
  720. {
  721. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  722. BUG_ON(dir == DMA_NONE);
  723. if (is_swiotlb_buffer(paddr)) {
  724. swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
  725. return;
  726. }
  727. if (dir != DMA_FROM_DEVICE)
  728. return;
  729. dma_mark_clean(phys_to_virt(paddr), size);
  730. }
  731. void
  732. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  733. size_t size, enum dma_data_direction dir)
  734. {
  735. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  736. }
  737. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  738. void
  739. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  740. size_t size, enum dma_data_direction dir)
  741. {
  742. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  743. }
  744. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  745. /*
  746. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  747. * This is the scatter-gather version of the above swiotlb_map_page
  748. * interface. Here the scatter gather list elements are each tagged with the
  749. * appropriate dma address and length. They are obtained via
  750. * sg_dma_{address,length}(SG).
  751. *
  752. * NOTE: An implementation may be able to use a smaller number of
  753. * DMA address/length pairs than there are SG table elements.
  754. * (for example via virtual mapping capabilities)
  755. * The routine returns the number of addr/length pairs actually
  756. * used, at most nents.
  757. *
  758. * Device ownership issues as mentioned above for swiotlb_map_page are the
  759. * same here.
  760. */
  761. int
  762. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  763. enum dma_data_direction dir, unsigned long attrs)
  764. {
  765. struct scatterlist *sg;
  766. int i;
  767. BUG_ON(dir == DMA_NONE);
  768. for_each_sg(sgl, sg, nelems, i) {
  769. phys_addr_t paddr = sg_phys(sg);
  770. dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
  771. if (swiotlb_force == SWIOTLB_FORCE ||
  772. !dma_capable(hwdev, dev_addr, sg->length)) {
  773. phys_addr_t map = map_single(hwdev, sg_phys(sg),
  774. sg->length, dir);
  775. if (map == SWIOTLB_MAP_ERROR) {
  776. /* Don't panic here, we expect map_sg users
  777. to do proper error handling. */
  778. swiotlb_full(hwdev, sg->length, dir, 0);
  779. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  780. attrs);
  781. sg_dma_len(sgl) = 0;
  782. return 0;
  783. }
  784. sg->dma_address = phys_to_dma(hwdev, map);
  785. } else
  786. sg->dma_address = dev_addr;
  787. sg_dma_len(sg) = sg->length;
  788. }
  789. return nelems;
  790. }
  791. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  792. int
  793. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  794. enum dma_data_direction dir)
  795. {
  796. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, 0);
  797. }
  798. EXPORT_SYMBOL(swiotlb_map_sg);
  799. /*
  800. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  801. * concerning calls here are the same as for swiotlb_unmap_page() above.
  802. */
  803. void
  804. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  805. int nelems, enum dma_data_direction dir,
  806. unsigned long attrs)
  807. {
  808. struct scatterlist *sg;
  809. int i;
  810. BUG_ON(dir == DMA_NONE);
  811. for_each_sg(sgl, sg, nelems, i)
  812. unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
  813. }
  814. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  815. void
  816. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  817. enum dma_data_direction dir)
  818. {
  819. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, 0);
  820. }
  821. EXPORT_SYMBOL(swiotlb_unmap_sg);
  822. /*
  823. * Make physical memory consistent for a set of streaming mode DMA translations
  824. * after a transfer.
  825. *
  826. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  827. * and usage.
  828. */
  829. static void
  830. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  831. int nelems, enum dma_data_direction dir,
  832. enum dma_sync_target target)
  833. {
  834. struct scatterlist *sg;
  835. int i;
  836. for_each_sg(sgl, sg, nelems, i)
  837. swiotlb_sync_single(hwdev, sg->dma_address,
  838. sg_dma_len(sg), dir, target);
  839. }
  840. void
  841. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  842. int nelems, enum dma_data_direction dir)
  843. {
  844. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  845. }
  846. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  847. void
  848. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  849. int nelems, enum dma_data_direction dir)
  850. {
  851. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  852. }
  853. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  854. int
  855. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  856. {
  857. return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
  858. }
  859. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  860. /*
  861. * Return whether the given device DMA address mask can be supported
  862. * properly. For example, if your device can only drive the low 24-bits
  863. * during bus mastering, then you would pass 0x00ffffff as the mask to
  864. * this function.
  865. */
  866. int
  867. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  868. {
  869. return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
  870. }
  871. EXPORT_SYMBOL(swiotlb_dma_supported);