ar7_wdt.c 7.7 KB

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  1. /*
  2. * drivers/watchdog/ar7_wdt.c
  3. *
  4. * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
  5. * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
  6. *
  7. * Some code taken from:
  8. * National Semiconductor SCx200 Watchdog support
  9. * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  24. */
  25. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/errno.h>
  29. #include <linux/miscdevice.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/watchdog.h>
  32. #include <linux/fs.h>
  33. #include <linux/ioport.h>
  34. #include <linux/io.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/clk.h>
  37. #include <asm/addrspace.h>
  38. #include <asm/mach-ar7/ar7.h>
  39. #define LONGNAME "TI AR7 Watchdog Timer"
  40. MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
  41. MODULE_DESCRIPTION(LONGNAME);
  42. MODULE_LICENSE("GPL");
  43. static int margin = 60;
  44. module_param(margin, int, 0);
  45. MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
  46. static bool nowayout = WATCHDOG_NOWAYOUT;
  47. module_param(nowayout, bool, 0);
  48. MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
  49. #define READ_REG(x) readl((void __iomem *)&(x))
  50. #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))
  51. struct ar7_wdt {
  52. u32 kick_lock;
  53. u32 kick;
  54. u32 change_lock;
  55. u32 change;
  56. u32 disable_lock;
  57. u32 disable;
  58. u32 prescale_lock;
  59. u32 prescale;
  60. };
  61. static unsigned long wdt_is_open;
  62. static unsigned expect_close;
  63. static DEFINE_SPINLOCK(wdt_lock);
  64. /* XXX currently fixed, allows max margin ~68.72 secs */
  65. #define prescale_value 0xffff
  66. /* Resource of the WDT registers */
  67. static struct resource *ar7_regs_wdt;
  68. /* Pointer to the remapped WDT IO space */
  69. static struct ar7_wdt *ar7_wdt;
  70. static struct clk *vbus_clk;
  71. static void ar7_wdt_kick(u32 value)
  72. {
  73. WRITE_REG(ar7_wdt->kick_lock, 0x5555);
  74. if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
  75. WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
  76. if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
  77. WRITE_REG(ar7_wdt->kick, value);
  78. return;
  79. }
  80. }
  81. pr_err("failed to unlock WDT kick reg\n");
  82. }
  83. static void ar7_wdt_prescale(u32 value)
  84. {
  85. WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
  86. if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
  87. WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
  88. if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
  89. WRITE_REG(ar7_wdt->prescale, value);
  90. return;
  91. }
  92. }
  93. pr_err("failed to unlock WDT prescale reg\n");
  94. }
  95. static void ar7_wdt_change(u32 value)
  96. {
  97. WRITE_REG(ar7_wdt->change_lock, 0x6666);
  98. if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
  99. WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
  100. if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
  101. WRITE_REG(ar7_wdt->change, value);
  102. return;
  103. }
  104. }
  105. pr_err("failed to unlock WDT change reg\n");
  106. }
  107. static void ar7_wdt_disable(u32 value)
  108. {
  109. WRITE_REG(ar7_wdt->disable_lock, 0x7777);
  110. if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
  111. WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
  112. if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
  113. WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
  114. if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
  115. WRITE_REG(ar7_wdt->disable, value);
  116. return;
  117. }
  118. }
  119. }
  120. pr_err("failed to unlock WDT disable reg\n");
  121. }
  122. static void ar7_wdt_update_margin(int new_margin)
  123. {
  124. u32 change;
  125. u32 vbus_rate;
  126. vbus_rate = clk_get_rate(vbus_clk);
  127. change = new_margin * (vbus_rate / prescale_value);
  128. if (change < 1)
  129. change = 1;
  130. if (change > 0xffff)
  131. change = 0xffff;
  132. ar7_wdt_change(change);
  133. margin = change * prescale_value / vbus_rate;
  134. pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n",
  135. margin, prescale_value, change, vbus_rate);
  136. }
  137. static void ar7_wdt_enable_wdt(void)
  138. {
  139. pr_debug("enabling watchdog timer\n");
  140. ar7_wdt_disable(1);
  141. ar7_wdt_kick(1);
  142. }
  143. static void ar7_wdt_disable_wdt(void)
  144. {
  145. pr_debug("disabling watchdog timer\n");
  146. ar7_wdt_disable(0);
  147. }
  148. static int ar7_wdt_open(struct inode *inode, struct file *file)
  149. {
  150. /* only allow one at a time */
  151. if (test_and_set_bit(0, &wdt_is_open))
  152. return -EBUSY;
  153. ar7_wdt_enable_wdt();
  154. expect_close = 0;
  155. return nonseekable_open(inode, file);
  156. }
  157. static int ar7_wdt_release(struct inode *inode, struct file *file)
  158. {
  159. if (!expect_close)
  160. pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
  161. else if (!nowayout)
  162. ar7_wdt_disable_wdt();
  163. clear_bit(0, &wdt_is_open);
  164. return 0;
  165. }
  166. static ssize_t ar7_wdt_write(struct file *file, const char *data,
  167. size_t len, loff_t *ppos)
  168. {
  169. /* check for a magic close character */
  170. if (len) {
  171. size_t i;
  172. spin_lock(&wdt_lock);
  173. ar7_wdt_kick(1);
  174. spin_unlock(&wdt_lock);
  175. expect_close = 0;
  176. for (i = 0; i < len; ++i) {
  177. char c;
  178. if (get_user(c, data + i))
  179. return -EFAULT;
  180. if (c == 'V')
  181. expect_close = 1;
  182. }
  183. }
  184. return len;
  185. }
  186. static long ar7_wdt_ioctl(struct file *file,
  187. unsigned int cmd, unsigned long arg)
  188. {
  189. static const struct watchdog_info ident = {
  190. .identity = LONGNAME,
  191. .firmware_version = 1,
  192. .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  193. WDIOF_MAGICCLOSE),
  194. };
  195. int new_margin;
  196. switch (cmd) {
  197. case WDIOC_GETSUPPORT:
  198. if (copy_to_user((struct watchdog_info *)arg, &ident,
  199. sizeof(ident)))
  200. return -EFAULT;
  201. return 0;
  202. case WDIOC_GETSTATUS:
  203. case WDIOC_GETBOOTSTATUS:
  204. if (put_user(0, (int *)arg))
  205. return -EFAULT;
  206. return 0;
  207. case WDIOC_KEEPALIVE:
  208. ar7_wdt_kick(1);
  209. return 0;
  210. case WDIOC_SETTIMEOUT:
  211. if (get_user(new_margin, (int *)arg))
  212. return -EFAULT;
  213. if (new_margin < 1)
  214. return -EINVAL;
  215. spin_lock(&wdt_lock);
  216. ar7_wdt_update_margin(new_margin);
  217. ar7_wdt_kick(1);
  218. spin_unlock(&wdt_lock);
  219. case WDIOC_GETTIMEOUT:
  220. if (put_user(margin, (int *)arg))
  221. return -EFAULT;
  222. return 0;
  223. default:
  224. return -ENOTTY;
  225. }
  226. }
  227. static const struct file_operations ar7_wdt_fops = {
  228. .owner = THIS_MODULE,
  229. .write = ar7_wdt_write,
  230. .unlocked_ioctl = ar7_wdt_ioctl,
  231. .open = ar7_wdt_open,
  232. .release = ar7_wdt_release,
  233. .llseek = no_llseek,
  234. };
  235. static struct miscdevice ar7_wdt_miscdev = {
  236. .minor = WATCHDOG_MINOR,
  237. .name = "watchdog",
  238. .fops = &ar7_wdt_fops,
  239. };
  240. static int ar7_wdt_probe(struct platform_device *pdev)
  241. {
  242. int rc;
  243. ar7_regs_wdt =
  244. platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  245. ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
  246. if (IS_ERR(ar7_wdt))
  247. return PTR_ERR(ar7_wdt);
  248. vbus_clk = clk_get(NULL, "vbus");
  249. if (IS_ERR(vbus_clk)) {
  250. pr_err("could not get vbus clock\n");
  251. return PTR_ERR(vbus_clk);
  252. }
  253. ar7_wdt_disable_wdt();
  254. ar7_wdt_prescale(prescale_value);
  255. ar7_wdt_update_margin(margin);
  256. rc = misc_register(&ar7_wdt_miscdev);
  257. if (rc) {
  258. pr_err("unable to register misc device\n");
  259. goto out;
  260. }
  261. return 0;
  262. out:
  263. clk_put(vbus_clk);
  264. vbus_clk = NULL;
  265. return rc;
  266. }
  267. static int ar7_wdt_remove(struct platform_device *pdev)
  268. {
  269. misc_deregister(&ar7_wdt_miscdev);
  270. clk_put(vbus_clk);
  271. vbus_clk = NULL;
  272. return 0;
  273. }
  274. static void ar7_wdt_shutdown(struct platform_device *pdev)
  275. {
  276. if (!nowayout)
  277. ar7_wdt_disable_wdt();
  278. }
  279. static struct platform_driver ar7_wdt_driver = {
  280. .probe = ar7_wdt_probe,
  281. .remove = ar7_wdt_remove,
  282. .shutdown = ar7_wdt_shutdown,
  283. .driver = {
  284. .name = "ar7_wdt",
  285. },
  286. };
  287. module_platform_driver(ar7_wdt_driver);