mac53c94.c 15 KB

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  1. /*
  2. * SCSI low-level driver for the 53c94 SCSI bus adaptor found
  3. * on Power Macintosh computers, controlling the external SCSI chain.
  4. * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA)
  5. * controller.
  6. *
  7. * Paul Mackerras, August 1996.
  8. * Copyright (C) 1996 Paul Mackerras.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/types.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/blkdev.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/stat.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <asm/dbdma.h>
  23. #include <asm/io.h>
  24. #include <asm/pgtable.h>
  25. #include <asm/prom.h>
  26. #include <asm/macio.h>
  27. #include <scsi/scsi.h>
  28. #include <scsi/scsi_cmnd.h>
  29. #include <scsi/scsi_device.h>
  30. #include <scsi/scsi_host.h>
  31. #include "mac53c94.h"
  32. enum fsc_phase {
  33. idle,
  34. selecting,
  35. dataing,
  36. completing,
  37. busfreeing,
  38. };
  39. struct fsc_state {
  40. struct mac53c94_regs __iomem *regs;
  41. int intr;
  42. struct dbdma_regs __iomem *dma;
  43. int dmaintr;
  44. int clk_freq;
  45. struct Scsi_Host *host;
  46. struct scsi_cmnd *request_q;
  47. struct scsi_cmnd *request_qtail;
  48. struct scsi_cmnd *current_req; /* req we're currently working on */
  49. enum fsc_phase phase; /* what we're currently trying to do */
  50. struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */
  51. void *dma_cmd_space;
  52. struct pci_dev *pdev;
  53. dma_addr_t dma_addr;
  54. struct macio_dev *mdev;
  55. };
  56. static void mac53c94_init(struct fsc_state *);
  57. static void mac53c94_start(struct fsc_state *);
  58. static void mac53c94_interrupt(int, void *);
  59. static irqreturn_t do_mac53c94_interrupt(int, void *);
  60. static void cmd_done(struct fsc_state *, int result);
  61. static void set_dma_cmds(struct fsc_state *, struct scsi_cmnd *);
  62. static int mac53c94_queue_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  63. {
  64. struct fsc_state *state;
  65. #if 0
  66. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  67. int i;
  68. printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd);
  69. for (i = 0; i < cmd->cmd_len; ++i)
  70. printk(KERN_CONT " %.2x", cmd->cmnd[i]);
  71. printk(KERN_CONT "\n");
  72. printk(KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n",
  73. scsi_sg_count(cmd), scsi_bufflen(cmd), scsi_sglist(cmd));
  74. }
  75. #endif
  76. cmd->scsi_done = done;
  77. cmd->host_scribble = NULL;
  78. state = (struct fsc_state *) cmd->device->host->hostdata;
  79. if (state->request_q == NULL)
  80. state->request_q = cmd;
  81. else
  82. state->request_qtail->host_scribble = (void *) cmd;
  83. state->request_qtail = cmd;
  84. if (state->phase == idle)
  85. mac53c94_start(state);
  86. return 0;
  87. }
  88. static DEF_SCSI_QCMD(mac53c94_queue)
  89. static int mac53c94_host_reset(struct scsi_cmnd *cmd)
  90. {
  91. struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata;
  92. struct mac53c94_regs __iomem *regs = state->regs;
  93. struct dbdma_regs __iomem *dma = state->dma;
  94. unsigned long flags;
  95. spin_lock_irqsave(cmd->device->host->host_lock, flags);
  96. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  97. writeb(CMD_SCSI_RESET, &regs->command); /* assert RST */
  98. udelay(100); /* leave it on for a while (>= 25us) */
  99. writeb(CMD_RESET, &regs->command);
  100. udelay(20);
  101. mac53c94_init(state);
  102. writeb(CMD_NOP, &regs->command);
  103. spin_unlock_irqrestore(cmd->device->host->host_lock, flags);
  104. return SUCCESS;
  105. }
  106. static void mac53c94_init(struct fsc_state *state)
  107. {
  108. struct mac53c94_regs __iomem *regs = state->regs;
  109. struct dbdma_regs __iomem *dma = state->dma;
  110. int x;
  111. writeb(state->host->this_id | CF1_PAR_ENABLE, &regs->config1);
  112. writeb(TIMO_VAL(250), &regs->sel_timeout); /* 250ms */
  113. writeb(CLKF_VAL(state->clk_freq), &regs->clk_factor);
  114. writeb(CF2_FEATURE_EN, &regs->config2);
  115. writeb(0, &regs->config3);
  116. writeb(0, &regs->sync_period);
  117. writeb(0, &regs->sync_offset);
  118. x = readb(&regs->interrupt);
  119. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  120. }
  121. /*
  122. * Start the next command for a 53C94.
  123. * Should be called with interrupts disabled.
  124. */
  125. static void mac53c94_start(struct fsc_state *state)
  126. {
  127. struct scsi_cmnd *cmd;
  128. struct mac53c94_regs __iomem *regs = state->regs;
  129. int i;
  130. if (state->phase != idle || state->current_req != NULL)
  131. panic("inappropriate mac53c94_start (state=%p)", state);
  132. if (state->request_q == NULL)
  133. return;
  134. state->current_req = cmd = state->request_q;
  135. state->request_q = (struct scsi_cmnd *) cmd->host_scribble;
  136. /* Off we go */
  137. writeb(0, &regs->count_lo);
  138. writeb(0, &regs->count_mid);
  139. writeb(0, &regs->count_hi);
  140. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  141. udelay(1);
  142. writeb(CMD_FLUSH, &regs->command);
  143. udelay(1);
  144. writeb(cmd->device->id, &regs->dest_id);
  145. writeb(0, &regs->sync_period);
  146. writeb(0, &regs->sync_offset);
  147. /* load the command into the FIFO */
  148. for (i = 0; i < cmd->cmd_len; ++i)
  149. writeb(cmd->cmnd[i], &regs->fifo);
  150. /* do select without ATN XXX */
  151. writeb(CMD_SELECT, &regs->command);
  152. state->phase = selecting;
  153. set_dma_cmds(state, cmd);
  154. }
  155. static irqreturn_t do_mac53c94_interrupt(int irq, void *dev_id)
  156. {
  157. unsigned long flags;
  158. struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host;
  159. spin_lock_irqsave(dev->host_lock, flags);
  160. mac53c94_interrupt(irq, dev_id);
  161. spin_unlock_irqrestore(dev->host_lock, flags);
  162. return IRQ_HANDLED;
  163. }
  164. static void mac53c94_interrupt(int irq, void *dev_id)
  165. {
  166. struct fsc_state *state = (struct fsc_state *) dev_id;
  167. struct mac53c94_regs __iomem *regs = state->regs;
  168. struct dbdma_regs __iomem *dma = state->dma;
  169. struct scsi_cmnd *cmd = state->current_req;
  170. int nb, stat, seq, intr;
  171. static int mac53c94_errors;
  172. /*
  173. * Apparently, reading the interrupt register unlatches
  174. * the status and sequence step registers.
  175. */
  176. seq = readb(&regs->seqstep);
  177. stat = readb(&regs->status);
  178. intr = readb(&regs->interrupt);
  179. #if 0
  180. printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n",
  181. intr, stat, seq, state->phase);
  182. #endif
  183. if (intr & INTR_RESET) {
  184. /* SCSI bus was reset */
  185. printk(KERN_INFO "external SCSI bus reset detected\n");
  186. writeb(CMD_NOP, &regs->command);
  187. writel(RUN << 16, &dma->control); /* stop dma */
  188. cmd_done(state, DID_RESET << 16);
  189. return;
  190. }
  191. if (intr & INTR_ILL_CMD) {
  192. printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n",
  193. intr, stat, seq, state->phase);
  194. cmd_done(state, DID_ERROR << 16);
  195. return;
  196. }
  197. if (stat & STAT_ERROR) {
  198. #if 0
  199. /* XXX these seem to be harmless? */
  200. printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n",
  201. intr, stat, seq, state->phase);
  202. #endif
  203. ++mac53c94_errors;
  204. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  205. }
  206. if (cmd == 0) {
  207. printk(KERN_DEBUG "53c94: interrupt with no command active?\n");
  208. return;
  209. }
  210. if (stat & STAT_PARITY) {
  211. printk(KERN_ERR "mac53c94: parity error\n");
  212. cmd_done(state, DID_PARITY << 16);
  213. return;
  214. }
  215. switch (state->phase) {
  216. case selecting:
  217. if (intr & INTR_DISCONNECT) {
  218. /* selection timed out */
  219. cmd_done(state, DID_BAD_TARGET << 16);
  220. return;
  221. }
  222. if (intr != INTR_BUS_SERV + INTR_DONE) {
  223. printk(KERN_DEBUG "got intr %x during selection\n", intr);
  224. cmd_done(state, DID_ERROR << 16);
  225. return;
  226. }
  227. if ((seq & SS_MASK) != SS_DONE) {
  228. printk(KERN_DEBUG "seq step %x after command\n", seq);
  229. cmd_done(state, DID_ERROR << 16);
  230. return;
  231. }
  232. writeb(CMD_NOP, &regs->command);
  233. /* set DMA controller going if any data to transfer */
  234. if ((stat & (STAT_MSG|STAT_CD)) == 0
  235. && (scsi_sg_count(cmd) > 0 || scsi_bufflen(cmd))) {
  236. nb = cmd->SCp.this_residual;
  237. if (nb > 0xfff0)
  238. nb = 0xfff0;
  239. cmd->SCp.this_residual -= nb;
  240. writeb(nb, &regs->count_lo);
  241. writeb(nb >> 8, &regs->count_mid);
  242. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  243. writel(virt_to_phys(state->dma_cmds), &dma->cmdptr);
  244. writel((RUN << 16) | RUN, &dma->control);
  245. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  246. state->phase = dataing;
  247. break;
  248. } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) {
  249. /* up to status phase already */
  250. writeb(CMD_I_COMPLETE, &regs->command);
  251. state->phase = completing;
  252. } else {
  253. printk(KERN_DEBUG "in unexpected phase %x after cmd\n",
  254. stat & STAT_PHASE);
  255. cmd_done(state, DID_ERROR << 16);
  256. return;
  257. }
  258. break;
  259. case dataing:
  260. if (intr != INTR_BUS_SERV) {
  261. printk(KERN_DEBUG "got intr %x before status\n", intr);
  262. cmd_done(state, DID_ERROR << 16);
  263. return;
  264. }
  265. if (cmd->SCp.this_residual != 0
  266. && (stat & (STAT_MSG|STAT_CD)) == 0) {
  267. /* Set up the count regs to transfer more */
  268. nb = cmd->SCp.this_residual;
  269. if (nb > 0xfff0)
  270. nb = 0xfff0;
  271. cmd->SCp.this_residual -= nb;
  272. writeb(nb, &regs->count_lo);
  273. writeb(nb >> 8, &regs->count_mid);
  274. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  275. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  276. break;
  277. }
  278. if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) {
  279. printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);
  280. }
  281. writel(RUN << 16, &dma->control); /* stop dma */
  282. scsi_dma_unmap(cmd);
  283. /* should check dma status */
  284. writeb(CMD_I_COMPLETE, &regs->command);
  285. state->phase = completing;
  286. break;
  287. case completing:
  288. if (intr != INTR_DONE) {
  289. printk(KERN_DEBUG "got intr %x on completion\n", intr);
  290. cmd_done(state, DID_ERROR << 16);
  291. return;
  292. }
  293. cmd->SCp.Status = readb(&regs->fifo);
  294. cmd->SCp.Message = readb(&regs->fifo);
  295. cmd->result = CMD_ACCEPT_MSG;
  296. writeb(CMD_ACCEPT_MSG, &regs->command);
  297. state->phase = busfreeing;
  298. break;
  299. case busfreeing:
  300. if (intr != INTR_DISCONNECT) {
  301. printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr);
  302. }
  303. cmd_done(state, (DID_OK << 16) + (cmd->SCp.Message << 8)
  304. + cmd->SCp.Status);
  305. break;
  306. default:
  307. printk(KERN_DEBUG "don't know about phase %d\n", state->phase);
  308. }
  309. }
  310. static void cmd_done(struct fsc_state *state, int result)
  311. {
  312. struct scsi_cmnd *cmd;
  313. cmd = state->current_req;
  314. if (cmd != 0) {
  315. cmd->result = result;
  316. (*cmd->scsi_done)(cmd);
  317. state->current_req = NULL;
  318. }
  319. state->phase = idle;
  320. mac53c94_start(state);
  321. }
  322. /*
  323. * Set up DMA commands for transferring data.
  324. */
  325. static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd)
  326. {
  327. int i, dma_cmd, total, nseg;
  328. struct scatterlist *scl;
  329. struct dbdma_cmd *dcmds;
  330. dma_addr_t dma_addr;
  331. u32 dma_len;
  332. nseg = scsi_dma_map(cmd);
  333. BUG_ON(nseg < 0);
  334. if (!nseg)
  335. return;
  336. dma_cmd = cmd->sc_data_direction == DMA_TO_DEVICE ?
  337. OUTPUT_MORE : INPUT_MORE;
  338. dcmds = state->dma_cmds;
  339. total = 0;
  340. scsi_for_each_sg(cmd, scl, nseg, i) {
  341. dma_addr = sg_dma_address(scl);
  342. dma_len = sg_dma_len(scl);
  343. if (dma_len > 0xffff)
  344. panic("mac53c94: scatterlist element >= 64k");
  345. total += dma_len;
  346. dcmds->req_count = cpu_to_le16(dma_len);
  347. dcmds->command = cpu_to_le16(dma_cmd);
  348. dcmds->phy_addr = cpu_to_le32(dma_addr);
  349. dcmds->xfer_status = 0;
  350. ++dcmds;
  351. }
  352. dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
  353. dcmds[-1].command = cpu_to_le16(dma_cmd);
  354. dcmds->command = cpu_to_le16(DBDMA_STOP);
  355. cmd->SCp.this_residual = total;
  356. }
  357. static struct scsi_host_template mac53c94_template = {
  358. .proc_name = "53c94",
  359. .name = "53C94",
  360. .queuecommand = mac53c94_queue,
  361. .eh_host_reset_handler = mac53c94_host_reset,
  362. .can_queue = 1,
  363. .this_id = 7,
  364. .sg_tablesize = SG_ALL,
  365. .use_clustering = DISABLE_CLUSTERING,
  366. };
  367. static int mac53c94_probe(struct macio_dev *mdev, const struct of_device_id *match)
  368. {
  369. struct device_node *node = macio_get_of_node(mdev);
  370. struct pci_dev *pdev = macio_get_pci_dev(mdev);
  371. struct fsc_state *state;
  372. struct Scsi_Host *host;
  373. void *dma_cmd_space;
  374. const unsigned char *clkprop;
  375. int proplen, rc = -ENODEV;
  376. if (macio_resource_count(mdev) != 2 || macio_irq_count(mdev) != 2) {
  377. printk(KERN_ERR "mac53c94: expected 2 addrs and intrs"
  378. " (got %d/%d)\n",
  379. macio_resource_count(mdev), macio_irq_count(mdev));
  380. return -ENODEV;
  381. }
  382. if (macio_request_resources(mdev, "mac53c94") != 0) {
  383. printk(KERN_ERR "mac53c94: unable to request memory resources");
  384. return -EBUSY;
  385. }
  386. host = scsi_host_alloc(&mac53c94_template, sizeof(struct fsc_state));
  387. if (host == NULL) {
  388. printk(KERN_ERR "mac53c94: couldn't register host");
  389. rc = -ENOMEM;
  390. goto out_release;
  391. }
  392. state = (struct fsc_state *) host->hostdata;
  393. macio_set_drvdata(mdev, state);
  394. state->host = host;
  395. state->pdev = pdev;
  396. state->mdev = mdev;
  397. state->regs = (struct mac53c94_regs __iomem *)
  398. ioremap(macio_resource_start(mdev, 0), 0x1000);
  399. state->intr = macio_irq(mdev, 0);
  400. state->dma = (struct dbdma_regs __iomem *)
  401. ioremap(macio_resource_start(mdev, 1), 0x1000);
  402. state->dmaintr = macio_irq(mdev, 1);
  403. if (state->regs == NULL || state->dma == NULL) {
  404. printk(KERN_ERR "mac53c94: ioremap failed for %s\n",
  405. node->full_name);
  406. goto out_free;
  407. }
  408. clkprop = of_get_property(node, "clock-frequency", &proplen);
  409. if (clkprop == NULL || proplen != sizeof(int)) {
  410. printk(KERN_ERR "%s: can't get clock frequency, "
  411. "assuming 25MHz\n", node->full_name);
  412. state->clk_freq = 25000000;
  413. } else
  414. state->clk_freq = *(int *)clkprop;
  415. /* Space for dma command list: +1 for stop command,
  416. * +1 to allow for aligning.
  417. * XXX FIXME: Use DMA consistent routines
  418. */
  419. dma_cmd_space = kmalloc((host->sg_tablesize + 2) *
  420. sizeof(struct dbdma_cmd), GFP_KERNEL);
  421. if (dma_cmd_space == 0) {
  422. printk(KERN_ERR "mac53c94: couldn't allocate dma "
  423. "command space for %s\n", node->full_name);
  424. rc = -ENOMEM;
  425. goto out_free;
  426. }
  427. state->dma_cmds = (struct dbdma_cmd *)DBDMA_ALIGN(dma_cmd_space);
  428. memset(state->dma_cmds, 0, (host->sg_tablesize + 1)
  429. * sizeof(struct dbdma_cmd));
  430. state->dma_cmd_space = dma_cmd_space;
  431. mac53c94_init(state);
  432. if (request_irq(state->intr, do_mac53c94_interrupt, 0, "53C94",state)) {
  433. printk(KERN_ERR "mac53C94: can't get irq %d for %s\n",
  434. state->intr, node->full_name);
  435. goto out_free_dma;
  436. }
  437. rc = scsi_add_host(host, &mdev->ofdev.dev);
  438. if (rc != 0)
  439. goto out_release_irq;
  440. scsi_scan_host(host);
  441. return 0;
  442. out_release_irq:
  443. free_irq(state->intr, state);
  444. out_free_dma:
  445. kfree(state->dma_cmd_space);
  446. out_free:
  447. if (state->dma != NULL)
  448. iounmap(state->dma);
  449. if (state->regs != NULL)
  450. iounmap(state->regs);
  451. scsi_host_put(host);
  452. out_release:
  453. macio_release_resources(mdev);
  454. return rc;
  455. }
  456. static int mac53c94_remove(struct macio_dev *mdev)
  457. {
  458. struct fsc_state *fp = (struct fsc_state *)macio_get_drvdata(mdev);
  459. struct Scsi_Host *host = fp->host;
  460. scsi_remove_host(host);
  461. free_irq(fp->intr, fp);
  462. if (fp->regs)
  463. iounmap(fp->regs);
  464. if (fp->dma)
  465. iounmap(fp->dma);
  466. kfree(fp->dma_cmd_space);
  467. scsi_host_put(host);
  468. macio_release_resources(mdev);
  469. return 0;
  470. }
  471. static struct of_device_id mac53c94_match[] =
  472. {
  473. {
  474. .name = "53c94",
  475. },
  476. {},
  477. };
  478. MODULE_DEVICE_TABLE (of, mac53c94_match);
  479. static struct macio_driver mac53c94_driver =
  480. {
  481. .driver = {
  482. .name = "mac53c94",
  483. .owner = THIS_MODULE,
  484. .of_match_table = mac53c94_match,
  485. },
  486. .probe = mac53c94_probe,
  487. .remove = mac53c94_remove,
  488. };
  489. static int __init init_mac53c94(void)
  490. {
  491. return macio_register_driver(&mac53c94_driver);
  492. }
  493. static void __exit exit_mac53c94(void)
  494. {
  495. return macio_unregister_driver(&mac53c94_driver);
  496. }
  497. module_init(init_mac53c94);
  498. module_exit(exit_mac53c94);
  499. MODULE_DESCRIPTION("PowerMac 53c94 SCSI driver");
  500. MODULE_AUTHOR("Paul Mackerras <paulus@samba.org>");
  501. MODULE_LICENSE("GPL");