ipr.c 300 KB

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  1. /*
  2. * ipr.c -- driver for IBM Power Linux RAID adapters
  3. *
  4. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  5. *
  6. * Copyright (C) 2003, 2004 IBM Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. /*
  24. * Notes:
  25. *
  26. * This driver is used to control the following SCSI adapters:
  27. *
  28. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  29. *
  30. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  31. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  32. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  33. * Embedded SCSI adapter on p615 and p655 systems
  34. *
  35. * Supported Hardware Features:
  36. * - Ultra 320 SCSI controller
  37. * - PCI-X host interface
  38. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  39. * - Non-Volatile Write Cache
  40. * - Supports attachment of non-RAID disks, tape, and optical devices
  41. * - RAID Levels 0, 5, 10
  42. * - Hot spare
  43. * - Background Parity Checking
  44. * - Background Data Scrubbing
  45. * - Ability to increase the capacity of an existing RAID 5 disk array
  46. * by adding disks
  47. *
  48. * Driver Features:
  49. * - Tagged command queuing
  50. * - Adapter microcode download
  51. * - PCI hot plug
  52. * - SCSI device hot plug
  53. *
  54. */
  55. #include <linux/fs.h>
  56. #include <linux/init.h>
  57. #include <linux/types.h>
  58. #include <linux/errno.h>
  59. #include <linux/kernel.h>
  60. #include <linux/slab.h>
  61. #include <linux/vmalloc.h>
  62. #include <linux/ioport.h>
  63. #include <linux/delay.h>
  64. #include <linux/pci.h>
  65. #include <linux/wait.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/sched.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/blkdev.h>
  70. #include <linux/firmware.h>
  71. #include <linux/module.h>
  72. #include <linux/moduleparam.h>
  73. #include <linux/libata.h>
  74. #include <linux/hdreg.h>
  75. #include <linux/reboot.h>
  76. #include <linux/stringify.h>
  77. #include <asm/io.h>
  78. #include <asm/irq.h>
  79. #include <asm/processor.h>
  80. #include <scsi/scsi.h>
  81. #include <scsi/scsi_host.h>
  82. #include <scsi/scsi_tcq.h>
  83. #include <scsi/scsi_eh.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include "ipr.h"
  86. /*
  87. * Global Data
  88. */
  89. static LIST_HEAD(ipr_ioa_head);
  90. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  91. static unsigned int ipr_max_speed = 1;
  92. static int ipr_testmode = 0;
  93. static unsigned int ipr_fastfail = 0;
  94. static unsigned int ipr_transop_timeout = 0;
  95. static unsigned int ipr_debug = 0;
  96. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  97. static unsigned int ipr_dual_ioa_raid = 1;
  98. static unsigned int ipr_number_of_msix = 16;
  99. static unsigned int ipr_fast_reboot;
  100. static DEFINE_SPINLOCK(ipr_driver_lock);
  101. /* This table describes the differences between DMA controller chips */
  102. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  103. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  104. .mailbox = 0x0042C,
  105. .max_cmds = 100,
  106. .cache_line_size = 0x20,
  107. .clear_isr = 1,
  108. .iopoll_weight = 0,
  109. {
  110. .set_interrupt_mask_reg = 0x0022C,
  111. .clr_interrupt_mask_reg = 0x00230,
  112. .clr_interrupt_mask_reg32 = 0x00230,
  113. .sense_interrupt_mask_reg = 0x0022C,
  114. .sense_interrupt_mask_reg32 = 0x0022C,
  115. .clr_interrupt_reg = 0x00228,
  116. .clr_interrupt_reg32 = 0x00228,
  117. .sense_interrupt_reg = 0x00224,
  118. .sense_interrupt_reg32 = 0x00224,
  119. .ioarrin_reg = 0x00404,
  120. .sense_uproc_interrupt_reg = 0x00214,
  121. .sense_uproc_interrupt_reg32 = 0x00214,
  122. .set_uproc_interrupt_reg = 0x00214,
  123. .set_uproc_interrupt_reg32 = 0x00214,
  124. .clr_uproc_interrupt_reg = 0x00218,
  125. .clr_uproc_interrupt_reg32 = 0x00218
  126. }
  127. },
  128. { /* Snipe and Scamp */
  129. .mailbox = 0x0052C,
  130. .max_cmds = 100,
  131. .cache_line_size = 0x20,
  132. .clear_isr = 1,
  133. .iopoll_weight = 0,
  134. {
  135. .set_interrupt_mask_reg = 0x00288,
  136. .clr_interrupt_mask_reg = 0x0028C,
  137. .clr_interrupt_mask_reg32 = 0x0028C,
  138. .sense_interrupt_mask_reg = 0x00288,
  139. .sense_interrupt_mask_reg32 = 0x00288,
  140. .clr_interrupt_reg = 0x00284,
  141. .clr_interrupt_reg32 = 0x00284,
  142. .sense_interrupt_reg = 0x00280,
  143. .sense_interrupt_reg32 = 0x00280,
  144. .ioarrin_reg = 0x00504,
  145. .sense_uproc_interrupt_reg = 0x00290,
  146. .sense_uproc_interrupt_reg32 = 0x00290,
  147. .set_uproc_interrupt_reg = 0x00290,
  148. .set_uproc_interrupt_reg32 = 0x00290,
  149. .clr_uproc_interrupt_reg = 0x00294,
  150. .clr_uproc_interrupt_reg32 = 0x00294
  151. }
  152. },
  153. { /* CRoC */
  154. .mailbox = 0x00044,
  155. .max_cmds = 1000,
  156. .cache_line_size = 0x20,
  157. .clear_isr = 0,
  158. .iopoll_weight = 64,
  159. {
  160. .set_interrupt_mask_reg = 0x00010,
  161. .clr_interrupt_mask_reg = 0x00018,
  162. .clr_interrupt_mask_reg32 = 0x0001C,
  163. .sense_interrupt_mask_reg = 0x00010,
  164. .sense_interrupt_mask_reg32 = 0x00014,
  165. .clr_interrupt_reg = 0x00008,
  166. .clr_interrupt_reg32 = 0x0000C,
  167. .sense_interrupt_reg = 0x00000,
  168. .sense_interrupt_reg32 = 0x00004,
  169. .ioarrin_reg = 0x00070,
  170. .sense_uproc_interrupt_reg = 0x00020,
  171. .sense_uproc_interrupt_reg32 = 0x00024,
  172. .set_uproc_interrupt_reg = 0x00020,
  173. .set_uproc_interrupt_reg32 = 0x00024,
  174. .clr_uproc_interrupt_reg = 0x00028,
  175. .clr_uproc_interrupt_reg32 = 0x0002C,
  176. .init_feedback_reg = 0x0005C,
  177. .dump_addr_reg = 0x00064,
  178. .dump_data_reg = 0x00068,
  179. .endian_swap_reg = 0x00084
  180. }
  181. },
  182. };
  183. static const struct ipr_chip_t ipr_chip[] = {
  184. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  185. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  186. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  187. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  188. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  189. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  190. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  191. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  192. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  193. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  194. };
  195. static int ipr_max_bus_speeds[] = {
  196. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  197. };
  198. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  199. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  200. module_param_named(max_speed, ipr_max_speed, uint, 0);
  201. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  202. module_param_named(log_level, ipr_log_level, uint, 0);
  203. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  204. module_param_named(testmode, ipr_testmode, int, 0);
  205. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  206. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  207. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  208. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  209. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  210. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  211. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  212. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  213. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  214. module_param_named(max_devs, ipr_max_devs, int, 0);
  215. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  216. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  217. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  218. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:16)");
  219. module_param_named(fast_reboot, ipr_fast_reboot, int, S_IRUGO | S_IWUSR);
  220. MODULE_PARM_DESC(fast_reboot, "Skip adapter shutdown during reboot. Set to 1 to enable. (default: 0)");
  221. MODULE_LICENSE("GPL");
  222. MODULE_VERSION(IPR_DRIVER_VERSION);
  223. /* A constant array of IOASCs/URCs/Error Messages */
  224. static const
  225. struct ipr_error_table_t ipr_error_table[] = {
  226. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  227. "8155: An unknown error was received"},
  228. {0x00330000, 0, 0,
  229. "Soft underlength error"},
  230. {0x005A0000, 0, 0,
  231. "Command to be cancelled not found"},
  232. {0x00808000, 0, 0,
  233. "Qualified success"},
  234. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  235. "FFFE: Soft device bus error recovered by the IOA"},
  236. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  237. "4101: Soft device bus fabric error"},
  238. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  239. "FFFC: Logical block guard error recovered by the device"},
  240. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  241. "FFFC: Logical block reference tag error recovered by the device"},
  242. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  243. "4171: Recovered scatter list tag / sequence number error"},
  244. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  245. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  246. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  247. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  248. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  249. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  250. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  251. "FFFD: Logical block guard error recovered by the IOA"},
  252. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  253. "FFF9: Device sector reassign successful"},
  254. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  255. "FFF7: Media error recovered by device rewrite procedures"},
  256. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  257. "7001: IOA sector reassignment successful"},
  258. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  259. "FFF9: Soft media error. Sector reassignment recommended"},
  260. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  261. "FFF7: Media error recovered by IOA rewrite procedures"},
  262. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  263. "FF3D: Soft PCI bus error recovered by the IOA"},
  264. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  265. "FFF6: Device hardware error recovered by the IOA"},
  266. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  267. "FFF6: Device hardware error recovered by the device"},
  268. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  269. "FF3D: Soft IOA error recovered by the IOA"},
  270. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  271. "FFFA: Undefined device response recovered by the IOA"},
  272. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  273. "FFF6: Device bus error, message or command phase"},
  274. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  275. "FFFE: Task Management Function failed"},
  276. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  277. "FFF6: Failure prediction threshold exceeded"},
  278. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  279. "8009: Impending cache battery pack failure"},
  280. {0x02040100, 0, 0,
  281. "Logical Unit in process of becoming ready"},
  282. {0x02040200, 0, 0,
  283. "Initializing command required"},
  284. {0x02040400, 0, 0,
  285. "34FF: Disk device format in progress"},
  286. {0x02040C00, 0, 0,
  287. "Logical unit not accessible, target port in unavailable state"},
  288. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  289. "9070: IOA requested reset"},
  290. {0x023F0000, 0, 0,
  291. "Synchronization required"},
  292. {0x02408500, 0, 0,
  293. "IOA microcode download required"},
  294. {0x02408600, 0, 0,
  295. "Device bus connection is prohibited by host"},
  296. {0x024E0000, 0, 0,
  297. "No ready, IOA shutdown"},
  298. {0x025A0000, 0, 0,
  299. "Not ready, IOA has been shutdown"},
  300. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  301. "3020: Storage subsystem configuration error"},
  302. {0x03110B00, 0, 0,
  303. "FFF5: Medium error, data unreadable, recommend reassign"},
  304. {0x03110C00, 0, 0,
  305. "7000: Medium error, data unreadable, do not reassign"},
  306. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  307. "FFF3: Disk media format bad"},
  308. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  309. "3002: Addressed device failed to respond to selection"},
  310. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  311. "3100: Device bus error"},
  312. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  313. "3109: IOA timed out a device command"},
  314. {0x04088000, 0, 0,
  315. "3120: SCSI bus is not operational"},
  316. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  317. "4100: Hard device bus fabric error"},
  318. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  319. "310C: Logical block guard error detected by the device"},
  320. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  321. "310C: Logical block reference tag error detected by the device"},
  322. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  323. "4170: Scatter list tag / sequence number error"},
  324. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  325. "8150: Logical block CRC error on IOA to Host transfer"},
  326. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  327. "4170: Logical block sequence number error on IOA to Host transfer"},
  328. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  329. "310D: Logical block reference tag error detected by the IOA"},
  330. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  331. "310D: Logical block guard error detected by the IOA"},
  332. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  333. "9000: IOA reserved area data check"},
  334. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  335. "9001: IOA reserved area invalid data pattern"},
  336. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  337. "9002: IOA reserved area LRC error"},
  338. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  339. "Hardware Error, IOA metadata access error"},
  340. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  341. "102E: Out of alternate sectors for disk storage"},
  342. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  343. "FFF4: Data transfer underlength error"},
  344. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  345. "FFF4: Data transfer overlength error"},
  346. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  347. "3400: Logical unit failure"},
  348. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  349. "FFF4: Device microcode is corrupt"},
  350. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  351. "8150: PCI bus error"},
  352. {0x04430000, 1, 0,
  353. "Unsupported device bus message received"},
  354. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  355. "FFF4: Disk device problem"},
  356. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  357. "8150: Permanent IOA failure"},
  358. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  359. "3010: Disk device returned wrong response to IOA"},
  360. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  361. "8151: IOA microcode error"},
  362. {0x04448500, 0, 0,
  363. "Device bus status error"},
  364. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  365. "8157: IOA error requiring IOA reset to recover"},
  366. {0x04448700, 0, 0,
  367. "ATA device status error"},
  368. {0x04490000, 0, 0,
  369. "Message reject received from the device"},
  370. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  371. "8008: A permanent cache battery pack failure occurred"},
  372. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  373. "9090: Disk unit has been modified after the last known status"},
  374. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  375. "9081: IOA detected device error"},
  376. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  377. "9082: IOA detected device error"},
  378. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  379. "3110: Device bus error, message or command phase"},
  380. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  381. "3110: SAS Command / Task Management Function failed"},
  382. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  383. "9091: Incorrect hardware configuration change has been detected"},
  384. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  385. "9073: Invalid multi-adapter configuration"},
  386. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  387. "4010: Incorrect connection between cascaded expanders"},
  388. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  389. "4020: Connections exceed IOA design limits"},
  390. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  391. "4030: Incorrect multipath connection"},
  392. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  393. "4110: Unsupported enclosure function"},
  394. {0x04679800, 0, IPR_DEFAULT_LOG_LEVEL,
  395. "4120: SAS cable VPD cannot be read"},
  396. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  397. "FFF4: Command to logical unit failed"},
  398. {0x05240000, 1, 0,
  399. "Illegal request, invalid request type or request packet"},
  400. {0x05250000, 0, 0,
  401. "Illegal request, invalid resource handle"},
  402. {0x05258000, 0, 0,
  403. "Illegal request, commands not allowed to this device"},
  404. {0x05258100, 0, 0,
  405. "Illegal request, command not allowed to a secondary adapter"},
  406. {0x05258200, 0, 0,
  407. "Illegal request, command not allowed to a non-optimized resource"},
  408. {0x05260000, 0, 0,
  409. "Illegal request, invalid field in parameter list"},
  410. {0x05260100, 0, 0,
  411. "Illegal request, parameter not supported"},
  412. {0x05260200, 0, 0,
  413. "Illegal request, parameter value invalid"},
  414. {0x052C0000, 0, 0,
  415. "Illegal request, command sequence error"},
  416. {0x052C8000, 1, 0,
  417. "Illegal request, dual adapter support not enabled"},
  418. {0x052C8100, 1, 0,
  419. "Illegal request, another cable connector was physically disabled"},
  420. {0x054E8000, 1, 0,
  421. "Illegal request, inconsistent group id/group count"},
  422. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  423. "9031: Array protection temporarily suspended, protection resuming"},
  424. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  425. "9040: Array protection temporarily suspended, protection resuming"},
  426. {0x060B0100, 0, IPR_DEFAULT_LOG_LEVEL,
  427. "4080: IOA exceeded maximum operating temperature"},
  428. {0x060B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  429. "4085: Service required"},
  430. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  431. "3140: Device bus not ready to ready transition"},
  432. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  433. "FFFB: SCSI bus was reset"},
  434. {0x06290500, 0, 0,
  435. "FFFE: SCSI bus transition to single ended"},
  436. {0x06290600, 0, 0,
  437. "FFFE: SCSI bus transition to LVD"},
  438. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  439. "FFFB: SCSI bus was reset by another initiator"},
  440. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  441. "3029: A device replacement has occurred"},
  442. {0x063F8300, 0, IPR_DEFAULT_LOG_LEVEL,
  443. "4102: Device bus fabric performance degradation"},
  444. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  445. "9051: IOA cache data exists for a missing or failed device"},
  446. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  447. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  448. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  449. "9025: Disk unit is not supported at its physical location"},
  450. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  451. "3020: IOA detected a SCSI bus configuration error"},
  452. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  453. "3150: SCSI bus configuration error"},
  454. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  455. "9074: Asymmetric advanced function disk configuration"},
  456. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  457. "4040: Incomplete multipath connection between IOA and enclosure"},
  458. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  459. "4041: Incomplete multipath connection between enclosure and device"},
  460. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  461. "9075: Incomplete multipath connection between IOA and remote IOA"},
  462. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  463. "9076: Configuration error, missing remote IOA"},
  464. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  465. "4050: Enclosure does not support a required multipath function"},
  466. {0x06679800, 0, IPR_DEFAULT_LOG_LEVEL,
  467. "4121: Configuration error, required cable is missing"},
  468. {0x06679900, 0, IPR_DEFAULT_LOG_LEVEL,
  469. "4122: Cable is not plugged into the correct location on remote IOA"},
  470. {0x06679A00, 0, IPR_DEFAULT_LOG_LEVEL,
  471. "4123: Configuration error, invalid cable vital product data"},
  472. {0x06679B00, 0, IPR_DEFAULT_LOG_LEVEL,
  473. "4124: Configuration error, both cable ends are plugged into the same IOA"},
  474. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  475. "4070: Logically bad block written on device"},
  476. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  477. "9041: Array protection temporarily suspended"},
  478. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  479. "9042: Corrupt array parity detected on specified device"},
  480. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  481. "9030: Array no longer protected due to missing or failed disk unit"},
  482. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  483. "9071: Link operational transition"},
  484. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  485. "9072: Link not operational transition"},
  486. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  487. "9032: Array exposed but still protected"},
  488. {0x066B8300, 0, IPR_DEBUG_LOG_LEVEL,
  489. "70DD: Device forced failed by disrupt device command"},
  490. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  491. "4061: Multipath redundancy level got better"},
  492. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  493. "4060: Multipath redundancy level got worse"},
  494. {0x06808100, 0, IPR_DEBUG_LOG_LEVEL,
  495. "9083: Device raw mode enabled"},
  496. {0x06808200, 0, IPR_DEBUG_LOG_LEVEL,
  497. "9084: Device raw mode disabled"},
  498. {0x07270000, 0, 0,
  499. "Failure due to other device"},
  500. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  501. "9008: IOA does not support functions expected by devices"},
  502. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  503. "9010: Cache data associated with attached devices cannot be found"},
  504. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  505. "9011: Cache data belongs to devices other than those attached"},
  506. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  507. "9020: Array missing 2 or more devices with only 1 device present"},
  508. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  509. "9021: Array missing 2 or more devices with 2 or more devices present"},
  510. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  511. "9022: Exposed array is missing a required device"},
  512. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  513. "9023: Array member(s) not at required physical locations"},
  514. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  515. "9024: Array not functional due to present hardware configuration"},
  516. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  517. "9026: Array not functional due to present hardware configuration"},
  518. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  519. "9027: Array is missing a device and parity is out of sync"},
  520. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  521. "9028: Maximum number of arrays already exist"},
  522. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  523. "9050: Required cache data cannot be located for a disk unit"},
  524. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  525. "9052: Cache data exists for a device that has been modified"},
  526. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  527. "9054: IOA resources not available due to previous problems"},
  528. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  529. "9092: Disk unit requires initialization before use"},
  530. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  531. "9029: Incorrect hardware configuration change has been detected"},
  532. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  533. "9060: One or more disk pairs are missing from an array"},
  534. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  535. "9061: One or more disks are missing from an array"},
  536. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  537. "9062: One or more disks are missing from an array"},
  538. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  539. "9063: Maximum number of functional arrays has been exceeded"},
  540. {0x07279A00, 0, 0,
  541. "Data protect, other volume set problem"},
  542. {0x0B260000, 0, 0,
  543. "Aborted command, invalid descriptor"},
  544. {0x0B3F9000, 0, 0,
  545. "Target operating conditions have changed, dual adapter takeover"},
  546. {0x0B530200, 0, 0,
  547. "Aborted command, medium removal prevented"},
  548. {0x0B5A0000, 0, 0,
  549. "Command terminated by host"},
  550. {0x0B5B8000, 0, 0,
  551. "Aborted command, command terminated by host"}
  552. };
  553. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  554. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  555. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  556. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  557. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  558. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  559. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  560. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  561. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  562. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  563. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  564. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  565. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  566. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  567. };
  568. /*
  569. * Function Prototypes
  570. */
  571. static int ipr_reset_alert(struct ipr_cmnd *);
  572. static void ipr_process_ccn(struct ipr_cmnd *);
  573. static void ipr_process_error(struct ipr_cmnd *);
  574. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  575. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  576. enum ipr_shutdown_type);
  577. #ifdef CONFIG_SCSI_IPR_TRACE
  578. /**
  579. * ipr_trc_hook - Add a trace entry to the driver trace
  580. * @ipr_cmd: ipr command struct
  581. * @type: trace type
  582. * @add_data: additional data
  583. *
  584. * Return value:
  585. * none
  586. **/
  587. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  588. u8 type, u32 add_data)
  589. {
  590. struct ipr_trace_entry *trace_entry;
  591. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  592. unsigned int trace_index;
  593. trace_index = atomic_add_return(1, &ioa_cfg->trace_index) & IPR_TRACE_INDEX_MASK;
  594. trace_entry = &ioa_cfg->trace[trace_index];
  595. trace_entry->time = jiffies;
  596. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  597. trace_entry->type = type;
  598. if (ipr_cmd->ioa_cfg->sis64)
  599. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  600. else
  601. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  602. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  603. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  604. trace_entry->u.add_data = add_data;
  605. wmb();
  606. }
  607. #else
  608. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  609. #endif
  610. /**
  611. * ipr_lock_and_done - Acquire lock and complete command
  612. * @ipr_cmd: ipr command struct
  613. *
  614. * Return value:
  615. * none
  616. **/
  617. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  618. {
  619. unsigned long lock_flags;
  620. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  621. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  622. ipr_cmd->done(ipr_cmd);
  623. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  624. }
  625. /**
  626. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  627. * @ipr_cmd: ipr command struct
  628. *
  629. * Return value:
  630. * none
  631. **/
  632. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  633. {
  634. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  635. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  636. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  637. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  638. int hrrq_id;
  639. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  640. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  641. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  642. ioarcb->data_transfer_length = 0;
  643. ioarcb->read_data_transfer_length = 0;
  644. ioarcb->ioadl_len = 0;
  645. ioarcb->read_ioadl_len = 0;
  646. if (ipr_cmd->ioa_cfg->sis64) {
  647. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  648. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  649. ioasa64->u.gata.status = 0;
  650. } else {
  651. ioarcb->write_ioadl_addr =
  652. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  653. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  654. ioasa->u.gata.status = 0;
  655. }
  656. ioasa->hdr.ioasc = 0;
  657. ioasa->hdr.residual_data_len = 0;
  658. ipr_cmd->scsi_cmd = NULL;
  659. ipr_cmd->qc = NULL;
  660. ipr_cmd->sense_buffer[0] = 0;
  661. ipr_cmd->dma_use_sg = 0;
  662. }
  663. /**
  664. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  665. * @ipr_cmd: ipr command struct
  666. *
  667. * Return value:
  668. * none
  669. **/
  670. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  671. void (*fast_done) (struct ipr_cmnd *))
  672. {
  673. ipr_reinit_ipr_cmnd(ipr_cmd);
  674. ipr_cmd->u.scratch = 0;
  675. ipr_cmd->sibling = NULL;
  676. ipr_cmd->eh_comp = NULL;
  677. ipr_cmd->fast_done = fast_done;
  678. init_timer(&ipr_cmd->timer);
  679. }
  680. /**
  681. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  682. * @ioa_cfg: ioa config struct
  683. *
  684. * Return value:
  685. * pointer to ipr command struct
  686. **/
  687. static
  688. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  689. {
  690. struct ipr_cmnd *ipr_cmd = NULL;
  691. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  692. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  693. struct ipr_cmnd, queue);
  694. list_del(&ipr_cmd->queue);
  695. }
  696. return ipr_cmd;
  697. }
  698. /**
  699. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  700. * @ioa_cfg: ioa config struct
  701. *
  702. * Return value:
  703. * pointer to ipr command struct
  704. **/
  705. static
  706. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  707. {
  708. struct ipr_cmnd *ipr_cmd =
  709. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  710. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  711. return ipr_cmd;
  712. }
  713. /**
  714. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  715. * @ioa_cfg: ioa config struct
  716. * @clr_ints: interrupts to clear
  717. *
  718. * This function masks all interrupts on the adapter, then clears the
  719. * interrupts specified in the mask
  720. *
  721. * Return value:
  722. * none
  723. **/
  724. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  725. u32 clr_ints)
  726. {
  727. volatile u32 int_reg;
  728. int i;
  729. /* Stop new interrupts */
  730. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  731. spin_lock(&ioa_cfg->hrrq[i]._lock);
  732. ioa_cfg->hrrq[i].allow_interrupts = 0;
  733. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  734. }
  735. wmb();
  736. /* Set interrupt mask to stop all new interrupts */
  737. if (ioa_cfg->sis64)
  738. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  739. else
  740. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  741. /* Clear any pending interrupts */
  742. if (ioa_cfg->sis64)
  743. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  744. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  745. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  746. }
  747. /**
  748. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  749. * @ioa_cfg: ioa config struct
  750. *
  751. * Return value:
  752. * 0 on success / -EIO on failure
  753. **/
  754. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  755. {
  756. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  757. if (pcix_cmd_reg == 0)
  758. return 0;
  759. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  760. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  761. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  762. return -EIO;
  763. }
  764. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  765. return 0;
  766. }
  767. /**
  768. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  769. * @ioa_cfg: ioa config struct
  770. *
  771. * Return value:
  772. * 0 on success / -EIO on failure
  773. **/
  774. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  775. {
  776. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  777. if (pcix_cmd_reg) {
  778. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  779. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  780. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  781. return -EIO;
  782. }
  783. }
  784. return 0;
  785. }
  786. /**
  787. * ipr_sata_eh_done - done function for aborted SATA commands
  788. * @ipr_cmd: ipr command struct
  789. *
  790. * This function is invoked for ops generated to SATA
  791. * devices which are being aborted.
  792. *
  793. * Return value:
  794. * none
  795. **/
  796. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  797. {
  798. struct ata_queued_cmd *qc = ipr_cmd->qc;
  799. struct ipr_sata_port *sata_port = qc->ap->private_data;
  800. qc->err_mask |= AC_ERR_OTHER;
  801. sata_port->ioasa.status |= ATA_BUSY;
  802. ata_qc_complete(qc);
  803. if (ipr_cmd->eh_comp)
  804. complete(ipr_cmd->eh_comp);
  805. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  806. }
  807. /**
  808. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  809. * @ipr_cmd: ipr command struct
  810. *
  811. * This function is invoked by the interrupt handler for
  812. * ops generated by the SCSI mid-layer which are being aborted.
  813. *
  814. * Return value:
  815. * none
  816. **/
  817. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  818. {
  819. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  820. scsi_cmd->result |= (DID_ERROR << 16);
  821. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  822. scsi_cmd->scsi_done(scsi_cmd);
  823. if (ipr_cmd->eh_comp)
  824. complete(ipr_cmd->eh_comp);
  825. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  826. }
  827. /**
  828. * ipr_fail_all_ops - Fails all outstanding ops.
  829. * @ioa_cfg: ioa config struct
  830. *
  831. * This function fails all outstanding ops.
  832. *
  833. * Return value:
  834. * none
  835. **/
  836. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  837. {
  838. struct ipr_cmnd *ipr_cmd, *temp;
  839. struct ipr_hrr_queue *hrrq;
  840. ENTER;
  841. for_each_hrrq(hrrq, ioa_cfg) {
  842. spin_lock(&hrrq->_lock);
  843. list_for_each_entry_safe(ipr_cmd,
  844. temp, &hrrq->hrrq_pending_q, queue) {
  845. list_del(&ipr_cmd->queue);
  846. ipr_cmd->s.ioasa.hdr.ioasc =
  847. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  848. ipr_cmd->s.ioasa.hdr.ilid =
  849. cpu_to_be32(IPR_DRIVER_ILID);
  850. if (ipr_cmd->scsi_cmd)
  851. ipr_cmd->done = ipr_scsi_eh_done;
  852. else if (ipr_cmd->qc)
  853. ipr_cmd->done = ipr_sata_eh_done;
  854. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  855. IPR_IOASC_IOA_WAS_RESET);
  856. del_timer(&ipr_cmd->timer);
  857. ipr_cmd->done(ipr_cmd);
  858. }
  859. spin_unlock(&hrrq->_lock);
  860. }
  861. LEAVE;
  862. }
  863. /**
  864. * ipr_send_command - Send driver initiated requests.
  865. * @ipr_cmd: ipr command struct
  866. *
  867. * This function sends a command to the adapter using the correct write call.
  868. * In the case of sis64, calculate the ioarcb size required. Then or in the
  869. * appropriate bits.
  870. *
  871. * Return value:
  872. * none
  873. **/
  874. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  875. {
  876. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  877. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  878. if (ioa_cfg->sis64) {
  879. /* The default size is 256 bytes */
  880. send_dma_addr |= 0x1;
  881. /* If the number of ioadls * size of ioadl > 128 bytes,
  882. then use a 512 byte ioarcb */
  883. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  884. send_dma_addr |= 0x4;
  885. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  886. } else
  887. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  888. }
  889. /**
  890. * ipr_do_req - Send driver initiated requests.
  891. * @ipr_cmd: ipr command struct
  892. * @done: done function
  893. * @timeout_func: timeout function
  894. * @timeout: timeout value
  895. *
  896. * This function sends the specified command to the adapter with the
  897. * timeout given. The done function is invoked on command completion.
  898. *
  899. * Return value:
  900. * none
  901. **/
  902. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  903. void (*done) (struct ipr_cmnd *),
  904. void (*timeout_func) (struct ipr_cmnd *), u32 timeout)
  905. {
  906. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  907. ipr_cmd->done = done;
  908. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  909. ipr_cmd->timer.expires = jiffies + timeout;
  910. ipr_cmd->timer.function = (void (*)(unsigned long))timeout_func;
  911. add_timer(&ipr_cmd->timer);
  912. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  913. ipr_send_command(ipr_cmd);
  914. }
  915. /**
  916. * ipr_internal_cmd_done - Op done function for an internally generated op.
  917. * @ipr_cmd: ipr command struct
  918. *
  919. * This function is the op done function for an internally generated,
  920. * blocking op. It simply wakes the sleeping thread.
  921. *
  922. * Return value:
  923. * none
  924. **/
  925. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  926. {
  927. if (ipr_cmd->sibling)
  928. ipr_cmd->sibling = NULL;
  929. else
  930. complete(&ipr_cmd->completion);
  931. }
  932. /**
  933. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  934. * @ipr_cmd: ipr command struct
  935. * @dma_addr: dma address
  936. * @len: transfer length
  937. * @flags: ioadl flag value
  938. *
  939. * This function initializes an ioadl in the case where there is only a single
  940. * descriptor.
  941. *
  942. * Return value:
  943. * nothing
  944. **/
  945. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  946. u32 len, int flags)
  947. {
  948. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  949. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  950. ipr_cmd->dma_use_sg = 1;
  951. if (ipr_cmd->ioa_cfg->sis64) {
  952. ioadl64->flags = cpu_to_be32(flags);
  953. ioadl64->data_len = cpu_to_be32(len);
  954. ioadl64->address = cpu_to_be64(dma_addr);
  955. ipr_cmd->ioarcb.ioadl_len =
  956. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  957. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  958. } else {
  959. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  960. ioadl->address = cpu_to_be32(dma_addr);
  961. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  962. ipr_cmd->ioarcb.read_ioadl_len =
  963. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  964. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  965. } else {
  966. ipr_cmd->ioarcb.ioadl_len =
  967. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  968. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  969. }
  970. }
  971. }
  972. /**
  973. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  974. * @ipr_cmd: ipr command struct
  975. * @timeout_func: function to invoke if command times out
  976. * @timeout: timeout
  977. *
  978. * Return value:
  979. * none
  980. **/
  981. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  982. void (*timeout_func) (struct ipr_cmnd *ipr_cmd),
  983. u32 timeout)
  984. {
  985. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  986. init_completion(&ipr_cmd->completion);
  987. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  988. spin_unlock_irq(ioa_cfg->host->host_lock);
  989. wait_for_completion(&ipr_cmd->completion);
  990. spin_lock_irq(ioa_cfg->host->host_lock);
  991. }
  992. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  993. {
  994. unsigned int hrrq;
  995. if (ioa_cfg->hrrq_num == 1)
  996. hrrq = 0;
  997. else {
  998. hrrq = atomic_add_return(1, &ioa_cfg->hrrq_index);
  999. hrrq = (hrrq % (ioa_cfg->hrrq_num - 1)) + 1;
  1000. }
  1001. return hrrq;
  1002. }
  1003. /**
  1004. * ipr_send_hcam - Send an HCAM to the adapter.
  1005. * @ioa_cfg: ioa config struct
  1006. * @type: HCAM type
  1007. * @hostrcb: hostrcb struct
  1008. *
  1009. * This function will send a Host Controlled Async command to the adapter.
  1010. * If HCAMs are currently not allowed to be issued to the adapter, it will
  1011. * place the hostrcb on the free queue.
  1012. *
  1013. * Return value:
  1014. * none
  1015. **/
  1016. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  1017. struct ipr_hostrcb *hostrcb)
  1018. {
  1019. struct ipr_cmnd *ipr_cmd;
  1020. struct ipr_ioarcb *ioarcb;
  1021. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  1022. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  1023. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  1024. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  1025. ipr_cmd->u.hostrcb = hostrcb;
  1026. ioarcb = &ipr_cmd->ioarcb;
  1027. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  1028. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  1029. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  1030. ioarcb->cmd_pkt.cdb[1] = type;
  1031. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  1032. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  1033. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  1034. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  1035. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  1036. ipr_cmd->done = ipr_process_ccn;
  1037. else
  1038. ipr_cmd->done = ipr_process_error;
  1039. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  1040. ipr_send_command(ipr_cmd);
  1041. } else {
  1042. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  1043. }
  1044. }
  1045. /**
  1046. * ipr_update_ata_class - Update the ata class in the resource entry
  1047. * @res: resource entry struct
  1048. * @proto: cfgte device bus protocol value
  1049. *
  1050. * Return value:
  1051. * none
  1052. **/
  1053. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  1054. {
  1055. switch (proto) {
  1056. case IPR_PROTO_SATA:
  1057. case IPR_PROTO_SAS_STP:
  1058. res->ata_class = ATA_DEV_ATA;
  1059. break;
  1060. case IPR_PROTO_SATA_ATAPI:
  1061. case IPR_PROTO_SAS_STP_ATAPI:
  1062. res->ata_class = ATA_DEV_ATAPI;
  1063. break;
  1064. default:
  1065. res->ata_class = ATA_DEV_UNKNOWN;
  1066. break;
  1067. };
  1068. }
  1069. /**
  1070. * ipr_init_res_entry - Initialize a resource entry struct.
  1071. * @res: resource entry struct
  1072. * @cfgtew: config table entry wrapper struct
  1073. *
  1074. * Return value:
  1075. * none
  1076. **/
  1077. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1078. struct ipr_config_table_entry_wrapper *cfgtew)
  1079. {
  1080. int found = 0;
  1081. unsigned int proto;
  1082. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1083. struct ipr_resource_entry *gscsi_res = NULL;
  1084. res->needs_sync_complete = 0;
  1085. res->in_erp = 0;
  1086. res->add_to_ml = 0;
  1087. res->del_from_ml = 0;
  1088. res->resetting_device = 0;
  1089. res->reset_occurred = 0;
  1090. res->sdev = NULL;
  1091. res->sata_port = NULL;
  1092. if (ioa_cfg->sis64) {
  1093. proto = cfgtew->u.cfgte64->proto;
  1094. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1095. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1096. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1097. res->type = cfgtew->u.cfgte64->res_type;
  1098. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1099. sizeof(res->res_path));
  1100. res->bus = 0;
  1101. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1102. sizeof(res->dev_lun.scsi_lun));
  1103. res->lun = scsilun_to_int(&res->dev_lun);
  1104. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1105. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1106. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1107. found = 1;
  1108. res->target = gscsi_res->target;
  1109. break;
  1110. }
  1111. }
  1112. if (!found) {
  1113. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1114. ioa_cfg->max_devs_supported);
  1115. set_bit(res->target, ioa_cfg->target_ids);
  1116. }
  1117. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1118. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1119. res->target = 0;
  1120. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1121. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1122. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1123. ioa_cfg->max_devs_supported);
  1124. set_bit(res->target, ioa_cfg->array_ids);
  1125. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1126. res->bus = IPR_VSET_VIRTUAL_BUS;
  1127. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1128. ioa_cfg->max_devs_supported);
  1129. set_bit(res->target, ioa_cfg->vset_ids);
  1130. } else {
  1131. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1132. ioa_cfg->max_devs_supported);
  1133. set_bit(res->target, ioa_cfg->target_ids);
  1134. }
  1135. } else {
  1136. proto = cfgtew->u.cfgte->proto;
  1137. res->qmodel = IPR_QUEUEING_MODEL(res);
  1138. res->flags = cfgtew->u.cfgte->flags;
  1139. if (res->flags & IPR_IS_IOA_RESOURCE)
  1140. res->type = IPR_RES_TYPE_IOAFP;
  1141. else
  1142. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1143. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1144. res->target = cfgtew->u.cfgte->res_addr.target;
  1145. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1146. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1147. }
  1148. ipr_update_ata_class(res, proto);
  1149. }
  1150. /**
  1151. * ipr_is_same_device - Determine if two devices are the same.
  1152. * @res: resource entry struct
  1153. * @cfgtew: config table entry wrapper struct
  1154. *
  1155. * Return value:
  1156. * 1 if the devices are the same / 0 otherwise
  1157. **/
  1158. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1159. struct ipr_config_table_entry_wrapper *cfgtew)
  1160. {
  1161. if (res->ioa_cfg->sis64) {
  1162. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1163. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1164. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1165. sizeof(cfgtew->u.cfgte64->lun))) {
  1166. return 1;
  1167. }
  1168. } else {
  1169. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1170. res->target == cfgtew->u.cfgte->res_addr.target &&
  1171. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1172. return 1;
  1173. }
  1174. return 0;
  1175. }
  1176. /**
  1177. * __ipr_format_res_path - Format the resource path for printing.
  1178. * @res_path: resource path
  1179. * @buf: buffer
  1180. * @len: length of buffer provided
  1181. *
  1182. * Return value:
  1183. * pointer to buffer
  1184. **/
  1185. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1186. {
  1187. int i;
  1188. char *p = buffer;
  1189. *p = '\0';
  1190. p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
  1191. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1192. p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1193. return buffer;
  1194. }
  1195. /**
  1196. * ipr_format_res_path - Format the resource path for printing.
  1197. * @ioa_cfg: ioa config struct
  1198. * @res_path: resource path
  1199. * @buf: buffer
  1200. * @len: length of buffer provided
  1201. *
  1202. * Return value:
  1203. * pointer to buffer
  1204. **/
  1205. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1206. u8 *res_path, char *buffer, int len)
  1207. {
  1208. char *p = buffer;
  1209. *p = '\0';
  1210. p += snprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1211. __ipr_format_res_path(res_path, p, len - (buffer - p));
  1212. return buffer;
  1213. }
  1214. /**
  1215. * ipr_update_res_entry - Update the resource entry.
  1216. * @res: resource entry struct
  1217. * @cfgtew: config table entry wrapper struct
  1218. *
  1219. * Return value:
  1220. * none
  1221. **/
  1222. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1223. struct ipr_config_table_entry_wrapper *cfgtew)
  1224. {
  1225. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1226. unsigned int proto;
  1227. int new_path = 0;
  1228. if (res->ioa_cfg->sis64) {
  1229. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1230. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1231. res->type = cfgtew->u.cfgte64->res_type;
  1232. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1233. sizeof(struct ipr_std_inq_data));
  1234. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1235. proto = cfgtew->u.cfgte64->proto;
  1236. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1237. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1238. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1239. sizeof(res->dev_lun.scsi_lun));
  1240. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1241. sizeof(res->res_path))) {
  1242. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1243. sizeof(res->res_path));
  1244. new_path = 1;
  1245. }
  1246. if (res->sdev && new_path)
  1247. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1248. ipr_format_res_path(res->ioa_cfg,
  1249. res->res_path, buffer, sizeof(buffer)));
  1250. } else {
  1251. res->flags = cfgtew->u.cfgte->flags;
  1252. if (res->flags & IPR_IS_IOA_RESOURCE)
  1253. res->type = IPR_RES_TYPE_IOAFP;
  1254. else
  1255. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1256. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1257. sizeof(struct ipr_std_inq_data));
  1258. res->qmodel = IPR_QUEUEING_MODEL(res);
  1259. proto = cfgtew->u.cfgte->proto;
  1260. res->res_handle = cfgtew->u.cfgte->res_handle;
  1261. }
  1262. ipr_update_ata_class(res, proto);
  1263. }
  1264. /**
  1265. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1266. * for the resource.
  1267. * @res: resource entry struct
  1268. * @cfgtew: config table entry wrapper struct
  1269. *
  1270. * Return value:
  1271. * none
  1272. **/
  1273. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1274. {
  1275. struct ipr_resource_entry *gscsi_res = NULL;
  1276. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1277. if (!ioa_cfg->sis64)
  1278. return;
  1279. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1280. clear_bit(res->target, ioa_cfg->array_ids);
  1281. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1282. clear_bit(res->target, ioa_cfg->vset_ids);
  1283. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1284. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1285. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1286. return;
  1287. clear_bit(res->target, ioa_cfg->target_ids);
  1288. } else if (res->bus == 0)
  1289. clear_bit(res->target, ioa_cfg->target_ids);
  1290. }
  1291. /**
  1292. * ipr_handle_config_change - Handle a config change from the adapter
  1293. * @ioa_cfg: ioa config struct
  1294. * @hostrcb: hostrcb
  1295. *
  1296. * Return value:
  1297. * none
  1298. **/
  1299. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1300. struct ipr_hostrcb *hostrcb)
  1301. {
  1302. struct ipr_resource_entry *res = NULL;
  1303. struct ipr_config_table_entry_wrapper cfgtew;
  1304. __be32 cc_res_handle;
  1305. u32 is_ndn = 1;
  1306. if (ioa_cfg->sis64) {
  1307. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1308. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1309. } else {
  1310. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1311. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1312. }
  1313. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1314. if (res->res_handle == cc_res_handle) {
  1315. is_ndn = 0;
  1316. break;
  1317. }
  1318. }
  1319. if (is_ndn) {
  1320. if (list_empty(&ioa_cfg->free_res_q)) {
  1321. ipr_send_hcam(ioa_cfg,
  1322. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1323. hostrcb);
  1324. return;
  1325. }
  1326. res = list_entry(ioa_cfg->free_res_q.next,
  1327. struct ipr_resource_entry, queue);
  1328. list_del(&res->queue);
  1329. ipr_init_res_entry(res, &cfgtew);
  1330. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1331. }
  1332. ipr_update_res_entry(res, &cfgtew);
  1333. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1334. if (res->sdev) {
  1335. res->del_from_ml = 1;
  1336. res->res_handle = IPR_INVALID_RES_HANDLE;
  1337. schedule_work(&ioa_cfg->work_q);
  1338. } else {
  1339. ipr_clear_res_target(res);
  1340. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1341. }
  1342. } else if (!res->sdev || res->del_from_ml) {
  1343. res->add_to_ml = 1;
  1344. schedule_work(&ioa_cfg->work_q);
  1345. }
  1346. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1347. }
  1348. /**
  1349. * ipr_process_ccn - Op done function for a CCN.
  1350. * @ipr_cmd: ipr command struct
  1351. *
  1352. * This function is the op done function for a configuration
  1353. * change notification host controlled async from the adapter.
  1354. *
  1355. * Return value:
  1356. * none
  1357. **/
  1358. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1359. {
  1360. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1361. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1362. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1363. list_del_init(&hostrcb->queue);
  1364. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1365. if (ioasc) {
  1366. if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  1367. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST)
  1368. dev_err(&ioa_cfg->pdev->dev,
  1369. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1370. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1371. } else {
  1372. ipr_handle_config_change(ioa_cfg, hostrcb);
  1373. }
  1374. }
  1375. /**
  1376. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1377. * @i: index into buffer
  1378. * @buf: string to modify
  1379. *
  1380. * This function will strip all trailing whitespace, pad the end
  1381. * of the string with a single space, and NULL terminate the string.
  1382. *
  1383. * Return value:
  1384. * new length of string
  1385. **/
  1386. static int strip_and_pad_whitespace(int i, char *buf)
  1387. {
  1388. while (i && buf[i] == ' ')
  1389. i--;
  1390. buf[i+1] = ' ';
  1391. buf[i+2] = '\0';
  1392. return i + 2;
  1393. }
  1394. /**
  1395. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1396. * @prefix: string to print at start of printk
  1397. * @hostrcb: hostrcb pointer
  1398. * @vpd: vendor/product id/sn struct
  1399. *
  1400. * Return value:
  1401. * none
  1402. **/
  1403. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1404. struct ipr_vpd *vpd)
  1405. {
  1406. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1407. int i = 0;
  1408. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1409. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1410. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1411. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1412. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1413. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1414. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n", prefix, buffer);
  1415. }
  1416. /**
  1417. * ipr_log_vpd - Log the passed VPD to the error log.
  1418. * @vpd: vendor/product id/sn struct
  1419. *
  1420. * Return value:
  1421. * none
  1422. **/
  1423. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1424. {
  1425. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1426. + IPR_SERIAL_NUM_LEN];
  1427. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1428. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1429. IPR_PROD_ID_LEN);
  1430. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1431. ipr_err("Vendor/Product ID: %s\n", buffer);
  1432. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1433. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1434. ipr_err(" Serial Number: %s\n", buffer);
  1435. }
  1436. /**
  1437. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1438. * @prefix: string to print at start of printk
  1439. * @hostrcb: hostrcb pointer
  1440. * @vpd: vendor/product id/sn/wwn struct
  1441. *
  1442. * Return value:
  1443. * none
  1444. **/
  1445. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1446. struct ipr_ext_vpd *vpd)
  1447. {
  1448. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1449. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1450. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1451. }
  1452. /**
  1453. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1454. * @vpd: vendor/product id/sn/wwn struct
  1455. *
  1456. * Return value:
  1457. * none
  1458. **/
  1459. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1460. {
  1461. ipr_log_vpd(&vpd->vpd);
  1462. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1463. be32_to_cpu(vpd->wwid[1]));
  1464. }
  1465. /**
  1466. * ipr_log_enhanced_cache_error - Log a cache error.
  1467. * @ioa_cfg: ioa config struct
  1468. * @hostrcb: hostrcb struct
  1469. *
  1470. * Return value:
  1471. * none
  1472. **/
  1473. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1474. struct ipr_hostrcb *hostrcb)
  1475. {
  1476. struct ipr_hostrcb_type_12_error *error;
  1477. if (ioa_cfg->sis64)
  1478. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1479. else
  1480. error = &hostrcb->hcam.u.error.u.type_12_error;
  1481. ipr_err("-----Current Configuration-----\n");
  1482. ipr_err("Cache Directory Card Information:\n");
  1483. ipr_log_ext_vpd(&error->ioa_vpd);
  1484. ipr_err("Adapter Card Information:\n");
  1485. ipr_log_ext_vpd(&error->cfc_vpd);
  1486. ipr_err("-----Expected Configuration-----\n");
  1487. ipr_err("Cache Directory Card Information:\n");
  1488. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1489. ipr_err("Adapter Card Information:\n");
  1490. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1491. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1492. be32_to_cpu(error->ioa_data[0]),
  1493. be32_to_cpu(error->ioa_data[1]),
  1494. be32_to_cpu(error->ioa_data[2]));
  1495. }
  1496. /**
  1497. * ipr_log_cache_error - Log a cache error.
  1498. * @ioa_cfg: ioa config struct
  1499. * @hostrcb: hostrcb struct
  1500. *
  1501. * Return value:
  1502. * none
  1503. **/
  1504. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1505. struct ipr_hostrcb *hostrcb)
  1506. {
  1507. struct ipr_hostrcb_type_02_error *error =
  1508. &hostrcb->hcam.u.error.u.type_02_error;
  1509. ipr_err("-----Current Configuration-----\n");
  1510. ipr_err("Cache Directory Card Information:\n");
  1511. ipr_log_vpd(&error->ioa_vpd);
  1512. ipr_err("Adapter Card Information:\n");
  1513. ipr_log_vpd(&error->cfc_vpd);
  1514. ipr_err("-----Expected Configuration-----\n");
  1515. ipr_err("Cache Directory Card Information:\n");
  1516. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1517. ipr_err("Adapter Card Information:\n");
  1518. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1519. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1520. be32_to_cpu(error->ioa_data[0]),
  1521. be32_to_cpu(error->ioa_data[1]),
  1522. be32_to_cpu(error->ioa_data[2]));
  1523. }
  1524. /**
  1525. * ipr_log_enhanced_config_error - Log a configuration error.
  1526. * @ioa_cfg: ioa config struct
  1527. * @hostrcb: hostrcb struct
  1528. *
  1529. * Return value:
  1530. * none
  1531. **/
  1532. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1533. struct ipr_hostrcb *hostrcb)
  1534. {
  1535. int errors_logged, i;
  1536. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1537. struct ipr_hostrcb_type_13_error *error;
  1538. error = &hostrcb->hcam.u.error.u.type_13_error;
  1539. errors_logged = be32_to_cpu(error->errors_logged);
  1540. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1541. be32_to_cpu(error->errors_detected), errors_logged);
  1542. dev_entry = error->dev;
  1543. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1544. ipr_err_separator;
  1545. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1546. ipr_log_ext_vpd(&dev_entry->vpd);
  1547. ipr_err("-----New Device Information-----\n");
  1548. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1549. ipr_err("Cache Directory Card Information:\n");
  1550. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1551. ipr_err("Adapter Card Information:\n");
  1552. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1553. }
  1554. }
  1555. /**
  1556. * ipr_log_sis64_config_error - Log a device error.
  1557. * @ioa_cfg: ioa config struct
  1558. * @hostrcb: hostrcb struct
  1559. *
  1560. * Return value:
  1561. * none
  1562. **/
  1563. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1564. struct ipr_hostrcb *hostrcb)
  1565. {
  1566. int errors_logged, i;
  1567. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1568. struct ipr_hostrcb_type_23_error *error;
  1569. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1570. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1571. errors_logged = be32_to_cpu(error->errors_logged);
  1572. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1573. be32_to_cpu(error->errors_detected), errors_logged);
  1574. dev_entry = error->dev;
  1575. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1576. ipr_err_separator;
  1577. ipr_err("Device %d : %s", i + 1,
  1578. __ipr_format_res_path(dev_entry->res_path,
  1579. buffer, sizeof(buffer)));
  1580. ipr_log_ext_vpd(&dev_entry->vpd);
  1581. ipr_err("-----New Device Information-----\n");
  1582. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1583. ipr_err("Cache Directory Card Information:\n");
  1584. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1585. ipr_err("Adapter Card Information:\n");
  1586. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1587. }
  1588. }
  1589. /**
  1590. * ipr_log_config_error - Log a configuration error.
  1591. * @ioa_cfg: ioa config struct
  1592. * @hostrcb: hostrcb struct
  1593. *
  1594. * Return value:
  1595. * none
  1596. **/
  1597. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1598. struct ipr_hostrcb *hostrcb)
  1599. {
  1600. int errors_logged, i;
  1601. struct ipr_hostrcb_device_data_entry *dev_entry;
  1602. struct ipr_hostrcb_type_03_error *error;
  1603. error = &hostrcb->hcam.u.error.u.type_03_error;
  1604. errors_logged = be32_to_cpu(error->errors_logged);
  1605. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1606. be32_to_cpu(error->errors_detected), errors_logged);
  1607. dev_entry = error->dev;
  1608. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1609. ipr_err_separator;
  1610. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1611. ipr_log_vpd(&dev_entry->vpd);
  1612. ipr_err("-----New Device Information-----\n");
  1613. ipr_log_vpd(&dev_entry->new_vpd);
  1614. ipr_err("Cache Directory Card Information:\n");
  1615. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1616. ipr_err("Adapter Card Information:\n");
  1617. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1618. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1619. be32_to_cpu(dev_entry->ioa_data[0]),
  1620. be32_to_cpu(dev_entry->ioa_data[1]),
  1621. be32_to_cpu(dev_entry->ioa_data[2]),
  1622. be32_to_cpu(dev_entry->ioa_data[3]),
  1623. be32_to_cpu(dev_entry->ioa_data[4]));
  1624. }
  1625. }
  1626. /**
  1627. * ipr_log_enhanced_array_error - Log an array configuration error.
  1628. * @ioa_cfg: ioa config struct
  1629. * @hostrcb: hostrcb struct
  1630. *
  1631. * Return value:
  1632. * none
  1633. **/
  1634. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1635. struct ipr_hostrcb *hostrcb)
  1636. {
  1637. int i, num_entries;
  1638. struct ipr_hostrcb_type_14_error *error;
  1639. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1640. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1641. error = &hostrcb->hcam.u.error.u.type_14_error;
  1642. ipr_err_separator;
  1643. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1644. error->protection_level,
  1645. ioa_cfg->host->host_no,
  1646. error->last_func_vset_res_addr.bus,
  1647. error->last_func_vset_res_addr.target,
  1648. error->last_func_vset_res_addr.lun);
  1649. ipr_err_separator;
  1650. array_entry = error->array_member;
  1651. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1652. ARRAY_SIZE(error->array_member));
  1653. for (i = 0; i < num_entries; i++, array_entry++) {
  1654. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1655. continue;
  1656. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1657. ipr_err("Exposed Array Member %d:\n", i);
  1658. else
  1659. ipr_err("Array Member %d:\n", i);
  1660. ipr_log_ext_vpd(&array_entry->vpd);
  1661. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1662. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1663. "Expected Location");
  1664. ipr_err_separator;
  1665. }
  1666. }
  1667. /**
  1668. * ipr_log_array_error - Log an array configuration error.
  1669. * @ioa_cfg: ioa config struct
  1670. * @hostrcb: hostrcb struct
  1671. *
  1672. * Return value:
  1673. * none
  1674. **/
  1675. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1676. struct ipr_hostrcb *hostrcb)
  1677. {
  1678. int i;
  1679. struct ipr_hostrcb_type_04_error *error;
  1680. struct ipr_hostrcb_array_data_entry *array_entry;
  1681. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1682. error = &hostrcb->hcam.u.error.u.type_04_error;
  1683. ipr_err_separator;
  1684. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1685. error->protection_level,
  1686. ioa_cfg->host->host_no,
  1687. error->last_func_vset_res_addr.bus,
  1688. error->last_func_vset_res_addr.target,
  1689. error->last_func_vset_res_addr.lun);
  1690. ipr_err_separator;
  1691. array_entry = error->array_member;
  1692. for (i = 0; i < 18; i++) {
  1693. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1694. continue;
  1695. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1696. ipr_err("Exposed Array Member %d:\n", i);
  1697. else
  1698. ipr_err("Array Member %d:\n", i);
  1699. ipr_log_vpd(&array_entry->vpd);
  1700. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1701. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1702. "Expected Location");
  1703. ipr_err_separator;
  1704. if (i == 9)
  1705. array_entry = error->array_member2;
  1706. else
  1707. array_entry++;
  1708. }
  1709. }
  1710. /**
  1711. * ipr_log_hex_data - Log additional hex IOA error data.
  1712. * @ioa_cfg: ioa config struct
  1713. * @data: IOA error data
  1714. * @len: data length
  1715. *
  1716. * Return value:
  1717. * none
  1718. **/
  1719. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, __be32 *data, int len)
  1720. {
  1721. int i;
  1722. if (len == 0)
  1723. return;
  1724. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1725. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1726. for (i = 0; i < len / 4; i += 4) {
  1727. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1728. be32_to_cpu(data[i]),
  1729. be32_to_cpu(data[i+1]),
  1730. be32_to_cpu(data[i+2]),
  1731. be32_to_cpu(data[i+3]));
  1732. }
  1733. }
  1734. /**
  1735. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1736. * @ioa_cfg: ioa config struct
  1737. * @hostrcb: hostrcb struct
  1738. *
  1739. * Return value:
  1740. * none
  1741. **/
  1742. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1743. struct ipr_hostrcb *hostrcb)
  1744. {
  1745. struct ipr_hostrcb_type_17_error *error;
  1746. if (ioa_cfg->sis64)
  1747. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1748. else
  1749. error = &hostrcb->hcam.u.error.u.type_17_error;
  1750. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1751. strim(error->failure_reason);
  1752. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1753. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1754. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1755. ipr_log_hex_data(ioa_cfg, error->data,
  1756. be32_to_cpu(hostrcb->hcam.length) -
  1757. (offsetof(struct ipr_hostrcb_error, u) +
  1758. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1759. }
  1760. /**
  1761. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1762. * @ioa_cfg: ioa config struct
  1763. * @hostrcb: hostrcb struct
  1764. *
  1765. * Return value:
  1766. * none
  1767. **/
  1768. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1769. struct ipr_hostrcb *hostrcb)
  1770. {
  1771. struct ipr_hostrcb_type_07_error *error;
  1772. error = &hostrcb->hcam.u.error.u.type_07_error;
  1773. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1774. strim(error->failure_reason);
  1775. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1776. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1777. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1778. ipr_log_hex_data(ioa_cfg, error->data,
  1779. be32_to_cpu(hostrcb->hcam.length) -
  1780. (offsetof(struct ipr_hostrcb_error, u) +
  1781. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1782. }
  1783. static const struct {
  1784. u8 active;
  1785. char *desc;
  1786. } path_active_desc[] = {
  1787. { IPR_PATH_NO_INFO, "Path" },
  1788. { IPR_PATH_ACTIVE, "Active path" },
  1789. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1790. };
  1791. static const struct {
  1792. u8 state;
  1793. char *desc;
  1794. } path_state_desc[] = {
  1795. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1796. { IPR_PATH_HEALTHY, "is healthy" },
  1797. { IPR_PATH_DEGRADED, "is degraded" },
  1798. { IPR_PATH_FAILED, "is failed" }
  1799. };
  1800. /**
  1801. * ipr_log_fabric_path - Log a fabric path error
  1802. * @hostrcb: hostrcb struct
  1803. * @fabric: fabric descriptor
  1804. *
  1805. * Return value:
  1806. * none
  1807. **/
  1808. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1809. struct ipr_hostrcb_fabric_desc *fabric)
  1810. {
  1811. int i, j;
  1812. u8 path_state = fabric->path_state;
  1813. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1814. u8 state = path_state & IPR_PATH_STATE_MASK;
  1815. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1816. if (path_active_desc[i].active != active)
  1817. continue;
  1818. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1819. if (path_state_desc[j].state != state)
  1820. continue;
  1821. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1822. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1823. path_active_desc[i].desc, path_state_desc[j].desc,
  1824. fabric->ioa_port);
  1825. } else if (fabric->cascaded_expander == 0xff) {
  1826. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1827. path_active_desc[i].desc, path_state_desc[j].desc,
  1828. fabric->ioa_port, fabric->phy);
  1829. } else if (fabric->phy == 0xff) {
  1830. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1831. path_active_desc[i].desc, path_state_desc[j].desc,
  1832. fabric->ioa_port, fabric->cascaded_expander);
  1833. } else {
  1834. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1835. path_active_desc[i].desc, path_state_desc[j].desc,
  1836. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1837. }
  1838. return;
  1839. }
  1840. }
  1841. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1842. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1843. }
  1844. /**
  1845. * ipr_log64_fabric_path - Log a fabric path error
  1846. * @hostrcb: hostrcb struct
  1847. * @fabric: fabric descriptor
  1848. *
  1849. * Return value:
  1850. * none
  1851. **/
  1852. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1853. struct ipr_hostrcb64_fabric_desc *fabric)
  1854. {
  1855. int i, j;
  1856. u8 path_state = fabric->path_state;
  1857. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1858. u8 state = path_state & IPR_PATH_STATE_MASK;
  1859. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1860. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1861. if (path_active_desc[i].active != active)
  1862. continue;
  1863. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1864. if (path_state_desc[j].state != state)
  1865. continue;
  1866. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1867. path_active_desc[i].desc, path_state_desc[j].desc,
  1868. ipr_format_res_path(hostrcb->ioa_cfg,
  1869. fabric->res_path,
  1870. buffer, sizeof(buffer)));
  1871. return;
  1872. }
  1873. }
  1874. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1875. ipr_format_res_path(hostrcb->ioa_cfg, fabric->res_path,
  1876. buffer, sizeof(buffer)));
  1877. }
  1878. static const struct {
  1879. u8 type;
  1880. char *desc;
  1881. } path_type_desc[] = {
  1882. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1883. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1884. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1885. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1886. };
  1887. static const struct {
  1888. u8 status;
  1889. char *desc;
  1890. } path_status_desc[] = {
  1891. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1892. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1893. { IPR_PATH_CFG_FAILED, "Failed" },
  1894. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1895. { IPR_PATH_NOT_DETECTED, "Missing" },
  1896. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1897. };
  1898. static const char *link_rate[] = {
  1899. "unknown",
  1900. "disabled",
  1901. "phy reset problem",
  1902. "spinup hold",
  1903. "port selector",
  1904. "unknown",
  1905. "unknown",
  1906. "unknown",
  1907. "1.5Gbps",
  1908. "3.0Gbps",
  1909. "unknown",
  1910. "unknown",
  1911. "unknown",
  1912. "unknown",
  1913. "unknown",
  1914. "unknown"
  1915. };
  1916. /**
  1917. * ipr_log_path_elem - Log a fabric path element.
  1918. * @hostrcb: hostrcb struct
  1919. * @cfg: fabric path element struct
  1920. *
  1921. * Return value:
  1922. * none
  1923. **/
  1924. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1925. struct ipr_hostrcb_config_element *cfg)
  1926. {
  1927. int i, j;
  1928. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1929. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1930. if (type == IPR_PATH_CFG_NOT_EXIST)
  1931. return;
  1932. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1933. if (path_type_desc[i].type != type)
  1934. continue;
  1935. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1936. if (path_status_desc[j].status != status)
  1937. continue;
  1938. if (type == IPR_PATH_CFG_IOA_PORT) {
  1939. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1940. path_status_desc[j].desc, path_type_desc[i].desc,
  1941. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1942. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1943. } else {
  1944. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1945. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1946. path_status_desc[j].desc, path_type_desc[i].desc,
  1947. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1948. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1949. } else if (cfg->cascaded_expander == 0xff) {
  1950. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1951. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1952. path_type_desc[i].desc, cfg->phy,
  1953. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1954. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1955. } else if (cfg->phy == 0xff) {
  1956. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1957. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1958. path_type_desc[i].desc, cfg->cascaded_expander,
  1959. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1960. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1961. } else {
  1962. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1963. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1964. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  1965. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1966. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1967. }
  1968. }
  1969. return;
  1970. }
  1971. }
  1972. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  1973. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  1974. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1975. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1976. }
  1977. /**
  1978. * ipr_log64_path_elem - Log a fabric path element.
  1979. * @hostrcb: hostrcb struct
  1980. * @cfg: fabric path element struct
  1981. *
  1982. * Return value:
  1983. * none
  1984. **/
  1985. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  1986. struct ipr_hostrcb64_config_element *cfg)
  1987. {
  1988. int i, j;
  1989. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  1990. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1991. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1992. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1993. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  1994. return;
  1995. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1996. if (path_type_desc[i].type != type)
  1997. continue;
  1998. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1999. if (path_status_desc[j].status != status)
  2000. continue;
  2001. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  2002. path_status_desc[j].desc, path_type_desc[i].desc,
  2003. ipr_format_res_path(hostrcb->ioa_cfg,
  2004. cfg->res_path, buffer, sizeof(buffer)),
  2005. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2006. be32_to_cpu(cfg->wwid[0]),
  2007. be32_to_cpu(cfg->wwid[1]));
  2008. return;
  2009. }
  2010. }
  2011. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  2012. "WWN=%08X%08X\n", cfg->type_status,
  2013. ipr_format_res_path(hostrcb->ioa_cfg,
  2014. cfg->res_path, buffer, sizeof(buffer)),
  2015. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2016. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  2017. }
  2018. /**
  2019. * ipr_log_fabric_error - Log a fabric error.
  2020. * @ioa_cfg: ioa config struct
  2021. * @hostrcb: hostrcb struct
  2022. *
  2023. * Return value:
  2024. * none
  2025. **/
  2026. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2027. struct ipr_hostrcb *hostrcb)
  2028. {
  2029. struct ipr_hostrcb_type_20_error *error;
  2030. struct ipr_hostrcb_fabric_desc *fabric;
  2031. struct ipr_hostrcb_config_element *cfg;
  2032. int i, add_len;
  2033. error = &hostrcb->hcam.u.error.u.type_20_error;
  2034. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2035. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2036. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2037. (offsetof(struct ipr_hostrcb_error, u) +
  2038. offsetof(struct ipr_hostrcb_type_20_error, desc));
  2039. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2040. ipr_log_fabric_path(hostrcb, fabric);
  2041. for_each_fabric_cfg(fabric, cfg)
  2042. ipr_log_path_elem(hostrcb, cfg);
  2043. add_len -= be16_to_cpu(fabric->length);
  2044. fabric = (struct ipr_hostrcb_fabric_desc *)
  2045. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2046. }
  2047. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  2048. }
  2049. /**
  2050. * ipr_log_sis64_array_error - Log a sis64 array error.
  2051. * @ioa_cfg: ioa config struct
  2052. * @hostrcb: hostrcb struct
  2053. *
  2054. * Return value:
  2055. * none
  2056. **/
  2057. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  2058. struct ipr_hostrcb *hostrcb)
  2059. {
  2060. int i, num_entries;
  2061. struct ipr_hostrcb_type_24_error *error;
  2062. struct ipr_hostrcb64_array_data_entry *array_entry;
  2063. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2064. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  2065. error = &hostrcb->hcam.u.error64.u.type_24_error;
  2066. ipr_err_separator;
  2067. ipr_err("RAID %s Array Configuration: %s\n",
  2068. error->protection_level,
  2069. ipr_format_res_path(ioa_cfg, error->last_res_path,
  2070. buffer, sizeof(buffer)));
  2071. ipr_err_separator;
  2072. array_entry = error->array_member;
  2073. num_entries = min_t(u32, error->num_entries,
  2074. ARRAY_SIZE(error->array_member));
  2075. for (i = 0; i < num_entries; i++, array_entry++) {
  2076. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  2077. continue;
  2078. if (error->exposed_mode_adn == i)
  2079. ipr_err("Exposed Array Member %d:\n", i);
  2080. else
  2081. ipr_err("Array Member %d:\n", i);
  2082. ipr_err("Array Member %d:\n", i);
  2083. ipr_log_ext_vpd(&array_entry->vpd);
  2084. ipr_err("Current Location: %s\n",
  2085. ipr_format_res_path(ioa_cfg, array_entry->res_path,
  2086. buffer, sizeof(buffer)));
  2087. ipr_err("Expected Location: %s\n",
  2088. ipr_format_res_path(ioa_cfg,
  2089. array_entry->expected_res_path,
  2090. buffer, sizeof(buffer)));
  2091. ipr_err_separator;
  2092. }
  2093. }
  2094. /**
  2095. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  2096. * @ioa_cfg: ioa config struct
  2097. * @hostrcb: hostrcb struct
  2098. *
  2099. * Return value:
  2100. * none
  2101. **/
  2102. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2103. struct ipr_hostrcb *hostrcb)
  2104. {
  2105. struct ipr_hostrcb_type_30_error *error;
  2106. struct ipr_hostrcb64_fabric_desc *fabric;
  2107. struct ipr_hostrcb64_config_element *cfg;
  2108. int i, add_len;
  2109. error = &hostrcb->hcam.u.error64.u.type_30_error;
  2110. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2111. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2112. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2113. (offsetof(struct ipr_hostrcb64_error, u) +
  2114. offsetof(struct ipr_hostrcb_type_30_error, desc));
  2115. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2116. ipr_log64_fabric_path(hostrcb, fabric);
  2117. for_each_fabric_cfg(fabric, cfg)
  2118. ipr_log64_path_elem(hostrcb, cfg);
  2119. add_len -= be16_to_cpu(fabric->length);
  2120. fabric = (struct ipr_hostrcb64_fabric_desc *)
  2121. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2122. }
  2123. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  2124. }
  2125. /**
  2126. * ipr_log_generic_error - Log an adapter error.
  2127. * @ioa_cfg: ioa config struct
  2128. * @hostrcb: hostrcb struct
  2129. *
  2130. * Return value:
  2131. * none
  2132. **/
  2133. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  2134. struct ipr_hostrcb *hostrcb)
  2135. {
  2136. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  2137. be32_to_cpu(hostrcb->hcam.length));
  2138. }
  2139. /**
  2140. * ipr_log_sis64_device_error - Log a cache error.
  2141. * @ioa_cfg: ioa config struct
  2142. * @hostrcb: hostrcb struct
  2143. *
  2144. * Return value:
  2145. * none
  2146. **/
  2147. static void ipr_log_sis64_device_error(struct ipr_ioa_cfg *ioa_cfg,
  2148. struct ipr_hostrcb *hostrcb)
  2149. {
  2150. struct ipr_hostrcb_type_21_error *error;
  2151. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2152. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2153. ipr_err("-----Failing Device Information-----\n");
  2154. ipr_err("World Wide Unique ID: %08X%08X%08X%08X\n",
  2155. be32_to_cpu(error->wwn[0]), be32_to_cpu(error->wwn[1]),
  2156. be32_to_cpu(error->wwn[2]), be32_to_cpu(error->wwn[3]));
  2157. ipr_err("Device Resource Path: %s\n",
  2158. __ipr_format_res_path(error->res_path,
  2159. buffer, sizeof(buffer)));
  2160. error->primary_problem_desc[sizeof(error->primary_problem_desc) - 1] = '\0';
  2161. error->second_problem_desc[sizeof(error->second_problem_desc) - 1] = '\0';
  2162. ipr_err("Primary Problem Description: %s\n", error->primary_problem_desc);
  2163. ipr_err("Secondary Problem Description: %s\n", error->second_problem_desc);
  2164. ipr_err("SCSI Sense Data:\n");
  2165. ipr_log_hex_data(ioa_cfg, error->sense_data, sizeof(error->sense_data));
  2166. ipr_err("SCSI Command Descriptor Block: \n");
  2167. ipr_log_hex_data(ioa_cfg, error->cdb, sizeof(error->cdb));
  2168. ipr_err("Additional IOA Data:\n");
  2169. ipr_log_hex_data(ioa_cfg, error->ioa_data, be32_to_cpu(error->length_of_error));
  2170. }
  2171. /**
  2172. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  2173. * @ioasc: IOASC
  2174. *
  2175. * This function will return the index of into the ipr_error_table
  2176. * for the specified IOASC. If the IOASC is not in the table,
  2177. * 0 will be returned, which points to the entry used for unknown errors.
  2178. *
  2179. * Return value:
  2180. * index into the ipr_error_table
  2181. **/
  2182. static u32 ipr_get_error(u32 ioasc)
  2183. {
  2184. int i;
  2185. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2186. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2187. return i;
  2188. return 0;
  2189. }
  2190. /**
  2191. * ipr_handle_log_data - Log an adapter error.
  2192. * @ioa_cfg: ioa config struct
  2193. * @hostrcb: hostrcb struct
  2194. *
  2195. * This function logs an adapter error to the system.
  2196. *
  2197. * Return value:
  2198. * none
  2199. **/
  2200. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2201. struct ipr_hostrcb *hostrcb)
  2202. {
  2203. u32 ioasc;
  2204. int error_index;
  2205. struct ipr_hostrcb_type_21_error *error;
  2206. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2207. return;
  2208. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2209. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2210. if (ioa_cfg->sis64)
  2211. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2212. else
  2213. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2214. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2215. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2216. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2217. scsi_report_bus_reset(ioa_cfg->host,
  2218. hostrcb->hcam.u.error.fd_res_addr.bus);
  2219. }
  2220. error_index = ipr_get_error(ioasc);
  2221. if (!ipr_error_table[error_index].log_hcam)
  2222. return;
  2223. if (ioasc == IPR_IOASC_HW_CMD_FAILED &&
  2224. hostrcb->hcam.overlay_id == IPR_HOST_RCB_OVERLAY_ID_21) {
  2225. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2226. if (((be32_to_cpu(error->sense_data[0]) & 0x0000ff00) >> 8) == ILLEGAL_REQUEST &&
  2227. ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  2228. return;
  2229. }
  2230. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2231. /* Set indication we have logged an error */
  2232. ioa_cfg->errors_logged++;
  2233. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2234. return;
  2235. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2236. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2237. switch (hostrcb->hcam.overlay_id) {
  2238. case IPR_HOST_RCB_OVERLAY_ID_2:
  2239. ipr_log_cache_error(ioa_cfg, hostrcb);
  2240. break;
  2241. case IPR_HOST_RCB_OVERLAY_ID_3:
  2242. ipr_log_config_error(ioa_cfg, hostrcb);
  2243. break;
  2244. case IPR_HOST_RCB_OVERLAY_ID_4:
  2245. case IPR_HOST_RCB_OVERLAY_ID_6:
  2246. ipr_log_array_error(ioa_cfg, hostrcb);
  2247. break;
  2248. case IPR_HOST_RCB_OVERLAY_ID_7:
  2249. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2250. break;
  2251. case IPR_HOST_RCB_OVERLAY_ID_12:
  2252. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2253. break;
  2254. case IPR_HOST_RCB_OVERLAY_ID_13:
  2255. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2256. break;
  2257. case IPR_HOST_RCB_OVERLAY_ID_14:
  2258. case IPR_HOST_RCB_OVERLAY_ID_16:
  2259. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2260. break;
  2261. case IPR_HOST_RCB_OVERLAY_ID_17:
  2262. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2263. break;
  2264. case IPR_HOST_RCB_OVERLAY_ID_20:
  2265. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2266. break;
  2267. case IPR_HOST_RCB_OVERLAY_ID_21:
  2268. ipr_log_sis64_device_error(ioa_cfg, hostrcb);
  2269. break;
  2270. case IPR_HOST_RCB_OVERLAY_ID_23:
  2271. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2272. break;
  2273. case IPR_HOST_RCB_OVERLAY_ID_24:
  2274. case IPR_HOST_RCB_OVERLAY_ID_26:
  2275. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2276. break;
  2277. case IPR_HOST_RCB_OVERLAY_ID_30:
  2278. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2279. break;
  2280. case IPR_HOST_RCB_OVERLAY_ID_1:
  2281. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2282. default:
  2283. ipr_log_generic_error(ioa_cfg, hostrcb);
  2284. break;
  2285. }
  2286. }
  2287. static struct ipr_hostrcb *ipr_get_free_hostrcb(struct ipr_ioa_cfg *ioa)
  2288. {
  2289. struct ipr_hostrcb *hostrcb;
  2290. hostrcb = list_first_entry_or_null(&ioa->hostrcb_free_q,
  2291. struct ipr_hostrcb, queue);
  2292. if (unlikely(!hostrcb)) {
  2293. dev_info(&ioa->pdev->dev, "Reclaiming async error buffers.");
  2294. hostrcb = list_first_entry_or_null(&ioa->hostrcb_report_q,
  2295. struct ipr_hostrcb, queue);
  2296. }
  2297. list_del_init(&hostrcb->queue);
  2298. return hostrcb;
  2299. }
  2300. /**
  2301. * ipr_process_error - Op done function for an adapter error log.
  2302. * @ipr_cmd: ipr command struct
  2303. *
  2304. * This function is the op done function for an error log host
  2305. * controlled async from the adapter. It will log the error and
  2306. * send the HCAM back to the adapter.
  2307. *
  2308. * Return value:
  2309. * none
  2310. **/
  2311. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2312. {
  2313. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2314. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2315. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2316. u32 fd_ioasc;
  2317. if (ioa_cfg->sis64)
  2318. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2319. else
  2320. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2321. list_del_init(&hostrcb->queue);
  2322. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  2323. if (!ioasc) {
  2324. ipr_handle_log_data(ioa_cfg, hostrcb);
  2325. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2326. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2327. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  2328. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST) {
  2329. dev_err(&ioa_cfg->pdev->dev,
  2330. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2331. }
  2332. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_report_q);
  2333. schedule_work(&ioa_cfg->work_q);
  2334. hostrcb = ipr_get_free_hostrcb(ioa_cfg);
  2335. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2336. }
  2337. /**
  2338. * ipr_timeout - An internally generated op has timed out.
  2339. * @ipr_cmd: ipr command struct
  2340. *
  2341. * This function blocks host requests and initiates an
  2342. * adapter reset.
  2343. *
  2344. * Return value:
  2345. * none
  2346. **/
  2347. static void ipr_timeout(struct ipr_cmnd *ipr_cmd)
  2348. {
  2349. unsigned long lock_flags = 0;
  2350. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2351. ENTER;
  2352. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2353. ioa_cfg->errors_logged++;
  2354. dev_err(&ioa_cfg->pdev->dev,
  2355. "Adapter being reset due to command timeout.\n");
  2356. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2357. ioa_cfg->sdt_state = GET_DUMP;
  2358. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2359. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2360. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2361. LEAVE;
  2362. }
  2363. /**
  2364. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2365. * @ipr_cmd: ipr command struct
  2366. *
  2367. * This function blocks host requests and initiates an
  2368. * adapter reset.
  2369. *
  2370. * Return value:
  2371. * none
  2372. **/
  2373. static void ipr_oper_timeout(struct ipr_cmnd *ipr_cmd)
  2374. {
  2375. unsigned long lock_flags = 0;
  2376. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2377. ENTER;
  2378. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2379. ioa_cfg->errors_logged++;
  2380. dev_err(&ioa_cfg->pdev->dev,
  2381. "Adapter timed out transitioning to operational.\n");
  2382. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2383. ioa_cfg->sdt_state = GET_DUMP;
  2384. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2385. if (ipr_fastfail)
  2386. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2387. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2388. }
  2389. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2390. LEAVE;
  2391. }
  2392. /**
  2393. * ipr_find_ses_entry - Find matching SES in SES table
  2394. * @res: resource entry struct of SES
  2395. *
  2396. * Return value:
  2397. * pointer to SES table entry / NULL on failure
  2398. **/
  2399. static const struct ipr_ses_table_entry *
  2400. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2401. {
  2402. int i, j, matches;
  2403. struct ipr_std_inq_vpids *vpids;
  2404. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2405. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2406. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2407. if (ste->compare_product_id_byte[j] == 'X') {
  2408. vpids = &res->std_inq_data.vpids;
  2409. if (vpids->product_id[j] == ste->product_id[j])
  2410. matches++;
  2411. else
  2412. break;
  2413. } else
  2414. matches++;
  2415. }
  2416. if (matches == IPR_PROD_ID_LEN)
  2417. return ste;
  2418. }
  2419. return NULL;
  2420. }
  2421. /**
  2422. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2423. * @ioa_cfg: ioa config struct
  2424. * @bus: SCSI bus
  2425. * @bus_width: bus width
  2426. *
  2427. * Return value:
  2428. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2429. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2430. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2431. * max 160MHz = max 320MB/sec).
  2432. **/
  2433. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2434. {
  2435. struct ipr_resource_entry *res;
  2436. const struct ipr_ses_table_entry *ste;
  2437. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2438. /* Loop through each config table entry in the config table buffer */
  2439. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2440. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2441. continue;
  2442. if (bus != res->bus)
  2443. continue;
  2444. if (!(ste = ipr_find_ses_entry(res)))
  2445. continue;
  2446. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2447. }
  2448. return max_xfer_rate;
  2449. }
  2450. /**
  2451. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2452. * @ioa_cfg: ioa config struct
  2453. * @max_delay: max delay in micro-seconds to wait
  2454. *
  2455. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2456. *
  2457. * Return value:
  2458. * 0 on success / other on failure
  2459. **/
  2460. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2461. {
  2462. volatile u32 pcii_reg;
  2463. int delay = 1;
  2464. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2465. while (delay < max_delay) {
  2466. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2467. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2468. return 0;
  2469. /* udelay cannot be used if delay is more than a few milliseconds */
  2470. if ((delay / 1000) > MAX_UDELAY_MS)
  2471. mdelay(delay / 1000);
  2472. else
  2473. udelay(delay);
  2474. delay += delay;
  2475. }
  2476. return -EIO;
  2477. }
  2478. /**
  2479. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2480. * @ioa_cfg: ioa config struct
  2481. * @start_addr: adapter address to dump
  2482. * @dest: destination kernel buffer
  2483. * @length_in_words: length to dump in 4 byte words
  2484. *
  2485. * Return value:
  2486. * 0 on success
  2487. **/
  2488. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2489. u32 start_addr,
  2490. __be32 *dest, u32 length_in_words)
  2491. {
  2492. int i;
  2493. for (i = 0; i < length_in_words; i++) {
  2494. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2495. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2496. dest++;
  2497. }
  2498. return 0;
  2499. }
  2500. /**
  2501. * ipr_get_ldump_data_section - Dump IOA memory
  2502. * @ioa_cfg: ioa config struct
  2503. * @start_addr: adapter address to dump
  2504. * @dest: destination kernel buffer
  2505. * @length_in_words: length to dump in 4 byte words
  2506. *
  2507. * Return value:
  2508. * 0 on success / -EIO on failure
  2509. **/
  2510. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2511. u32 start_addr,
  2512. __be32 *dest, u32 length_in_words)
  2513. {
  2514. volatile u32 temp_pcii_reg;
  2515. int i, delay = 0;
  2516. if (ioa_cfg->sis64)
  2517. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2518. dest, length_in_words);
  2519. /* Write IOA interrupt reg starting LDUMP state */
  2520. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2521. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2522. /* Wait for IO debug acknowledge */
  2523. if (ipr_wait_iodbg_ack(ioa_cfg,
  2524. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2525. dev_err(&ioa_cfg->pdev->dev,
  2526. "IOA dump long data transfer timeout\n");
  2527. return -EIO;
  2528. }
  2529. /* Signal LDUMP interlocked - clear IO debug ack */
  2530. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2531. ioa_cfg->regs.clr_interrupt_reg);
  2532. /* Write Mailbox with starting address */
  2533. writel(start_addr, ioa_cfg->ioa_mailbox);
  2534. /* Signal address valid - clear IOA Reset alert */
  2535. writel(IPR_UPROCI_RESET_ALERT,
  2536. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2537. for (i = 0; i < length_in_words; i++) {
  2538. /* Wait for IO debug acknowledge */
  2539. if (ipr_wait_iodbg_ack(ioa_cfg,
  2540. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2541. dev_err(&ioa_cfg->pdev->dev,
  2542. "IOA dump short data transfer timeout\n");
  2543. return -EIO;
  2544. }
  2545. /* Read data from mailbox and increment destination pointer */
  2546. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2547. dest++;
  2548. /* For all but the last word of data, signal data received */
  2549. if (i < (length_in_words - 1)) {
  2550. /* Signal dump data received - Clear IO debug Ack */
  2551. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2552. ioa_cfg->regs.clr_interrupt_reg);
  2553. }
  2554. }
  2555. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2556. writel(IPR_UPROCI_RESET_ALERT,
  2557. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2558. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2559. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2560. /* Signal dump data received - Clear IO debug Ack */
  2561. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2562. ioa_cfg->regs.clr_interrupt_reg);
  2563. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2564. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2565. temp_pcii_reg =
  2566. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2567. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2568. return 0;
  2569. udelay(10);
  2570. delay += 10;
  2571. }
  2572. return 0;
  2573. }
  2574. #ifdef CONFIG_SCSI_IPR_DUMP
  2575. /**
  2576. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2577. * @ioa_cfg: ioa config struct
  2578. * @pci_address: adapter address
  2579. * @length: length of data to copy
  2580. *
  2581. * Copy data from PCI adapter to kernel buffer.
  2582. * Note: length MUST be a 4 byte multiple
  2583. * Return value:
  2584. * 0 on success / other on failure
  2585. **/
  2586. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2587. unsigned long pci_address, u32 length)
  2588. {
  2589. int bytes_copied = 0;
  2590. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2591. __be32 *page;
  2592. unsigned long lock_flags = 0;
  2593. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2594. if (ioa_cfg->sis64)
  2595. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2596. else
  2597. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2598. while (bytes_copied < length &&
  2599. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2600. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2601. ioa_dump->page_offset == 0) {
  2602. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2603. if (!page) {
  2604. ipr_trace;
  2605. return bytes_copied;
  2606. }
  2607. ioa_dump->page_offset = 0;
  2608. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2609. ioa_dump->next_page_index++;
  2610. } else
  2611. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2612. rem_len = length - bytes_copied;
  2613. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2614. cur_len = min(rem_len, rem_page_len);
  2615. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2616. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2617. rc = -EIO;
  2618. } else {
  2619. rc = ipr_get_ldump_data_section(ioa_cfg,
  2620. pci_address + bytes_copied,
  2621. &page[ioa_dump->page_offset / 4],
  2622. (cur_len / sizeof(u32)));
  2623. }
  2624. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2625. if (!rc) {
  2626. ioa_dump->page_offset += cur_len;
  2627. bytes_copied += cur_len;
  2628. } else {
  2629. ipr_trace;
  2630. break;
  2631. }
  2632. schedule();
  2633. }
  2634. return bytes_copied;
  2635. }
  2636. /**
  2637. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2638. * @hdr: dump entry header struct
  2639. *
  2640. * Return value:
  2641. * nothing
  2642. **/
  2643. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2644. {
  2645. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2646. hdr->num_elems = 1;
  2647. hdr->offset = sizeof(*hdr);
  2648. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2649. }
  2650. /**
  2651. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2652. * @ioa_cfg: ioa config struct
  2653. * @driver_dump: driver dump struct
  2654. *
  2655. * Return value:
  2656. * nothing
  2657. **/
  2658. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2659. struct ipr_driver_dump *driver_dump)
  2660. {
  2661. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2662. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2663. driver_dump->ioa_type_entry.hdr.len =
  2664. sizeof(struct ipr_dump_ioa_type_entry) -
  2665. sizeof(struct ipr_dump_entry_header);
  2666. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2667. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2668. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2669. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2670. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2671. ucode_vpd->minor_release[1];
  2672. driver_dump->hdr.num_entries++;
  2673. }
  2674. /**
  2675. * ipr_dump_version_data - Fill in the driver version in the dump.
  2676. * @ioa_cfg: ioa config struct
  2677. * @driver_dump: driver dump struct
  2678. *
  2679. * Return value:
  2680. * nothing
  2681. **/
  2682. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2683. struct ipr_driver_dump *driver_dump)
  2684. {
  2685. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2686. driver_dump->version_entry.hdr.len =
  2687. sizeof(struct ipr_dump_version_entry) -
  2688. sizeof(struct ipr_dump_entry_header);
  2689. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2690. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2691. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2692. driver_dump->hdr.num_entries++;
  2693. }
  2694. /**
  2695. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2696. * @ioa_cfg: ioa config struct
  2697. * @driver_dump: driver dump struct
  2698. *
  2699. * Return value:
  2700. * nothing
  2701. **/
  2702. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2703. struct ipr_driver_dump *driver_dump)
  2704. {
  2705. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2706. driver_dump->trace_entry.hdr.len =
  2707. sizeof(struct ipr_dump_trace_entry) -
  2708. sizeof(struct ipr_dump_entry_header);
  2709. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2710. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2711. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2712. driver_dump->hdr.num_entries++;
  2713. }
  2714. /**
  2715. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2716. * @ioa_cfg: ioa config struct
  2717. * @driver_dump: driver dump struct
  2718. *
  2719. * Return value:
  2720. * nothing
  2721. **/
  2722. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2723. struct ipr_driver_dump *driver_dump)
  2724. {
  2725. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2726. driver_dump->location_entry.hdr.len =
  2727. sizeof(struct ipr_dump_location_entry) -
  2728. sizeof(struct ipr_dump_entry_header);
  2729. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2730. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2731. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2732. driver_dump->hdr.num_entries++;
  2733. }
  2734. /**
  2735. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2736. * @ioa_cfg: ioa config struct
  2737. * @dump: dump struct
  2738. *
  2739. * Return value:
  2740. * nothing
  2741. **/
  2742. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2743. {
  2744. unsigned long start_addr, sdt_word;
  2745. unsigned long lock_flags = 0;
  2746. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2747. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2748. u32 num_entries, max_num_entries, start_off, end_off;
  2749. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2750. struct ipr_sdt *sdt;
  2751. int valid = 1;
  2752. int i;
  2753. ENTER;
  2754. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2755. if (ioa_cfg->sdt_state != READ_DUMP) {
  2756. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2757. return;
  2758. }
  2759. if (ioa_cfg->sis64) {
  2760. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2761. ssleep(IPR_DUMP_DELAY_SECONDS);
  2762. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2763. }
  2764. start_addr = readl(ioa_cfg->ioa_mailbox);
  2765. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2766. dev_err(&ioa_cfg->pdev->dev,
  2767. "Invalid dump table format: %lx\n", start_addr);
  2768. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2769. return;
  2770. }
  2771. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2772. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2773. /* Initialize the overall dump header */
  2774. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2775. driver_dump->hdr.num_entries = 1;
  2776. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2777. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2778. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2779. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2780. ipr_dump_version_data(ioa_cfg, driver_dump);
  2781. ipr_dump_location_data(ioa_cfg, driver_dump);
  2782. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2783. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2784. /* Update dump_header */
  2785. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2786. /* IOA Dump entry */
  2787. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2788. ioa_dump->hdr.len = 0;
  2789. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2790. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2791. /* First entries in sdt are actually a list of dump addresses and
  2792. lengths to gather the real dump data. sdt represents the pointer
  2793. to the ioa generated dump table. Dump data will be extracted based
  2794. on entries in this table */
  2795. sdt = &ioa_dump->sdt;
  2796. if (ioa_cfg->sis64) {
  2797. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2798. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2799. } else {
  2800. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2801. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2802. }
  2803. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2804. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2805. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2806. bytes_to_copy / sizeof(__be32));
  2807. /* Smart Dump table is ready to use and the first entry is valid */
  2808. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2809. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2810. dev_err(&ioa_cfg->pdev->dev,
  2811. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2812. rc, be32_to_cpu(sdt->hdr.state));
  2813. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2814. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2815. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2816. return;
  2817. }
  2818. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2819. if (num_entries > max_num_entries)
  2820. num_entries = max_num_entries;
  2821. /* Update dump length to the actual data to be copied */
  2822. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2823. if (ioa_cfg->sis64)
  2824. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2825. else
  2826. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2827. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2828. for (i = 0; i < num_entries; i++) {
  2829. if (ioa_dump->hdr.len > max_dump_size) {
  2830. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2831. break;
  2832. }
  2833. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2834. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2835. if (ioa_cfg->sis64)
  2836. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2837. else {
  2838. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2839. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2840. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2841. bytes_to_copy = end_off - start_off;
  2842. else
  2843. valid = 0;
  2844. }
  2845. if (valid) {
  2846. if (bytes_to_copy > max_dump_size) {
  2847. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2848. continue;
  2849. }
  2850. /* Copy data from adapter to driver buffers */
  2851. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2852. bytes_to_copy);
  2853. ioa_dump->hdr.len += bytes_copied;
  2854. if (bytes_copied != bytes_to_copy) {
  2855. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2856. break;
  2857. }
  2858. }
  2859. }
  2860. }
  2861. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2862. /* Update dump_header */
  2863. driver_dump->hdr.len += ioa_dump->hdr.len;
  2864. wmb();
  2865. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2866. LEAVE;
  2867. }
  2868. #else
  2869. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
  2870. #endif
  2871. /**
  2872. * ipr_release_dump - Free adapter dump memory
  2873. * @kref: kref struct
  2874. *
  2875. * Return value:
  2876. * nothing
  2877. **/
  2878. static void ipr_release_dump(struct kref *kref)
  2879. {
  2880. struct ipr_dump *dump = container_of(kref, struct ipr_dump, kref);
  2881. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2882. unsigned long lock_flags = 0;
  2883. int i;
  2884. ENTER;
  2885. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2886. ioa_cfg->dump = NULL;
  2887. ioa_cfg->sdt_state = INACTIVE;
  2888. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2889. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2890. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2891. vfree(dump->ioa_dump.ioa_data);
  2892. kfree(dump);
  2893. LEAVE;
  2894. }
  2895. /**
  2896. * ipr_worker_thread - Worker thread
  2897. * @work: ioa config struct
  2898. *
  2899. * Called at task level from a work thread. This function takes care
  2900. * of adding and removing device from the mid-layer as configuration
  2901. * changes are detected by the adapter.
  2902. *
  2903. * Return value:
  2904. * nothing
  2905. **/
  2906. static void ipr_worker_thread(struct work_struct *work)
  2907. {
  2908. unsigned long lock_flags;
  2909. struct ipr_resource_entry *res;
  2910. struct scsi_device *sdev;
  2911. struct ipr_dump *dump;
  2912. struct ipr_ioa_cfg *ioa_cfg =
  2913. container_of(work, struct ipr_ioa_cfg, work_q);
  2914. u8 bus, target, lun;
  2915. int did_work;
  2916. ENTER;
  2917. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2918. if (ioa_cfg->sdt_state == READ_DUMP) {
  2919. dump = ioa_cfg->dump;
  2920. if (!dump) {
  2921. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2922. return;
  2923. }
  2924. kref_get(&dump->kref);
  2925. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2926. ipr_get_ioa_dump(ioa_cfg, dump);
  2927. kref_put(&dump->kref, ipr_release_dump);
  2928. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2929. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  2930. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2931. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2932. return;
  2933. }
  2934. if (!ioa_cfg->scan_enabled) {
  2935. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2936. return;
  2937. }
  2938. restart:
  2939. do {
  2940. did_work = 0;
  2941. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  2942. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2943. return;
  2944. }
  2945. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2946. if (res->del_from_ml && res->sdev) {
  2947. did_work = 1;
  2948. sdev = res->sdev;
  2949. if (!scsi_device_get(sdev)) {
  2950. if (!res->add_to_ml)
  2951. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2952. else
  2953. res->del_from_ml = 0;
  2954. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2955. scsi_remove_device(sdev);
  2956. scsi_device_put(sdev);
  2957. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2958. }
  2959. break;
  2960. }
  2961. }
  2962. } while (did_work);
  2963. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2964. if (res->add_to_ml) {
  2965. bus = res->bus;
  2966. target = res->target;
  2967. lun = res->lun;
  2968. res->add_to_ml = 0;
  2969. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2970. scsi_add_device(ioa_cfg->host, bus, target, lun);
  2971. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2972. goto restart;
  2973. }
  2974. }
  2975. ioa_cfg->scan_done = 1;
  2976. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2977. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  2978. LEAVE;
  2979. }
  2980. #ifdef CONFIG_SCSI_IPR_TRACE
  2981. /**
  2982. * ipr_read_trace - Dump the adapter trace
  2983. * @filp: open sysfs file
  2984. * @kobj: kobject struct
  2985. * @bin_attr: bin_attribute struct
  2986. * @buf: buffer
  2987. * @off: offset
  2988. * @count: buffer size
  2989. *
  2990. * Return value:
  2991. * number of bytes printed to buffer
  2992. **/
  2993. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  2994. struct bin_attribute *bin_attr,
  2995. char *buf, loff_t off, size_t count)
  2996. {
  2997. struct device *dev = container_of(kobj, struct device, kobj);
  2998. struct Scsi_Host *shost = class_to_shost(dev);
  2999. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3000. unsigned long lock_flags = 0;
  3001. ssize_t ret;
  3002. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3003. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  3004. IPR_TRACE_SIZE);
  3005. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3006. return ret;
  3007. }
  3008. static struct bin_attribute ipr_trace_attr = {
  3009. .attr = {
  3010. .name = "trace",
  3011. .mode = S_IRUGO,
  3012. },
  3013. .size = 0,
  3014. .read = ipr_read_trace,
  3015. };
  3016. #endif
  3017. /**
  3018. * ipr_show_fw_version - Show the firmware version
  3019. * @dev: class device struct
  3020. * @buf: buffer
  3021. *
  3022. * Return value:
  3023. * number of bytes printed to buffer
  3024. **/
  3025. static ssize_t ipr_show_fw_version(struct device *dev,
  3026. struct device_attribute *attr, char *buf)
  3027. {
  3028. struct Scsi_Host *shost = class_to_shost(dev);
  3029. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3030. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  3031. unsigned long lock_flags = 0;
  3032. int len;
  3033. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3034. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  3035. ucode_vpd->major_release, ucode_vpd->card_type,
  3036. ucode_vpd->minor_release[0],
  3037. ucode_vpd->minor_release[1]);
  3038. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3039. return len;
  3040. }
  3041. static struct device_attribute ipr_fw_version_attr = {
  3042. .attr = {
  3043. .name = "fw_version",
  3044. .mode = S_IRUGO,
  3045. },
  3046. .show = ipr_show_fw_version,
  3047. };
  3048. /**
  3049. * ipr_show_log_level - Show the adapter's error logging level
  3050. * @dev: class device struct
  3051. * @buf: buffer
  3052. *
  3053. * Return value:
  3054. * number of bytes printed to buffer
  3055. **/
  3056. static ssize_t ipr_show_log_level(struct device *dev,
  3057. struct device_attribute *attr, char *buf)
  3058. {
  3059. struct Scsi_Host *shost = class_to_shost(dev);
  3060. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3061. unsigned long lock_flags = 0;
  3062. int len;
  3063. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3064. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  3065. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3066. return len;
  3067. }
  3068. /**
  3069. * ipr_store_log_level - Change the adapter's error logging level
  3070. * @dev: class device struct
  3071. * @buf: buffer
  3072. *
  3073. * Return value:
  3074. * number of bytes printed to buffer
  3075. **/
  3076. static ssize_t ipr_store_log_level(struct device *dev,
  3077. struct device_attribute *attr,
  3078. const char *buf, size_t count)
  3079. {
  3080. struct Scsi_Host *shost = class_to_shost(dev);
  3081. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3082. unsigned long lock_flags = 0;
  3083. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3084. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  3085. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3086. return strlen(buf);
  3087. }
  3088. static struct device_attribute ipr_log_level_attr = {
  3089. .attr = {
  3090. .name = "log_level",
  3091. .mode = S_IRUGO | S_IWUSR,
  3092. },
  3093. .show = ipr_show_log_level,
  3094. .store = ipr_store_log_level
  3095. };
  3096. /**
  3097. * ipr_store_diagnostics - IOA Diagnostics interface
  3098. * @dev: device struct
  3099. * @buf: buffer
  3100. * @count: buffer size
  3101. *
  3102. * This function will reset the adapter and wait a reasonable
  3103. * amount of time for any errors that the adapter might log.
  3104. *
  3105. * Return value:
  3106. * count on success / other on failure
  3107. **/
  3108. static ssize_t ipr_store_diagnostics(struct device *dev,
  3109. struct device_attribute *attr,
  3110. const char *buf, size_t count)
  3111. {
  3112. struct Scsi_Host *shost = class_to_shost(dev);
  3113. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3114. unsigned long lock_flags = 0;
  3115. int rc = count;
  3116. if (!capable(CAP_SYS_ADMIN))
  3117. return -EACCES;
  3118. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3119. while (ioa_cfg->in_reset_reload) {
  3120. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3121. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3122. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3123. }
  3124. ioa_cfg->errors_logged = 0;
  3125. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3126. if (ioa_cfg->in_reset_reload) {
  3127. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3128. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3129. /* Wait for a second for any errors to be logged */
  3130. msleep(1000);
  3131. } else {
  3132. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3133. return -EIO;
  3134. }
  3135. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3136. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  3137. rc = -EIO;
  3138. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3139. return rc;
  3140. }
  3141. static struct device_attribute ipr_diagnostics_attr = {
  3142. .attr = {
  3143. .name = "run_diagnostics",
  3144. .mode = S_IWUSR,
  3145. },
  3146. .store = ipr_store_diagnostics
  3147. };
  3148. /**
  3149. * ipr_show_adapter_state - Show the adapter's state
  3150. * @class_dev: device struct
  3151. * @buf: buffer
  3152. *
  3153. * Return value:
  3154. * number of bytes printed to buffer
  3155. **/
  3156. static ssize_t ipr_show_adapter_state(struct device *dev,
  3157. struct device_attribute *attr, char *buf)
  3158. {
  3159. struct Scsi_Host *shost = class_to_shost(dev);
  3160. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3161. unsigned long lock_flags = 0;
  3162. int len;
  3163. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3164. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  3165. len = snprintf(buf, PAGE_SIZE, "offline\n");
  3166. else
  3167. len = snprintf(buf, PAGE_SIZE, "online\n");
  3168. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3169. return len;
  3170. }
  3171. /**
  3172. * ipr_store_adapter_state - Change adapter state
  3173. * @dev: device struct
  3174. * @buf: buffer
  3175. * @count: buffer size
  3176. *
  3177. * This function will change the adapter's state.
  3178. *
  3179. * Return value:
  3180. * count on success / other on failure
  3181. **/
  3182. static ssize_t ipr_store_adapter_state(struct device *dev,
  3183. struct device_attribute *attr,
  3184. const char *buf, size_t count)
  3185. {
  3186. struct Scsi_Host *shost = class_to_shost(dev);
  3187. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3188. unsigned long lock_flags;
  3189. int result = count, i;
  3190. if (!capable(CAP_SYS_ADMIN))
  3191. return -EACCES;
  3192. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3193. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead &&
  3194. !strncmp(buf, "online", 6)) {
  3195. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  3196. spin_lock(&ioa_cfg->hrrq[i]._lock);
  3197. ioa_cfg->hrrq[i].ioa_is_dead = 0;
  3198. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  3199. }
  3200. wmb();
  3201. ioa_cfg->reset_retries = 0;
  3202. ioa_cfg->in_ioa_bringdown = 0;
  3203. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3204. }
  3205. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3206. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3207. return result;
  3208. }
  3209. static struct device_attribute ipr_ioa_state_attr = {
  3210. .attr = {
  3211. .name = "online_state",
  3212. .mode = S_IRUGO | S_IWUSR,
  3213. },
  3214. .show = ipr_show_adapter_state,
  3215. .store = ipr_store_adapter_state
  3216. };
  3217. /**
  3218. * ipr_store_reset_adapter - Reset the adapter
  3219. * @dev: device struct
  3220. * @buf: buffer
  3221. * @count: buffer size
  3222. *
  3223. * This function will reset the adapter.
  3224. *
  3225. * Return value:
  3226. * count on success / other on failure
  3227. **/
  3228. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3229. struct device_attribute *attr,
  3230. const char *buf, size_t count)
  3231. {
  3232. struct Scsi_Host *shost = class_to_shost(dev);
  3233. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3234. unsigned long lock_flags;
  3235. int result = count;
  3236. if (!capable(CAP_SYS_ADMIN))
  3237. return -EACCES;
  3238. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3239. if (!ioa_cfg->in_reset_reload)
  3240. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3241. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3242. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3243. return result;
  3244. }
  3245. static struct device_attribute ipr_ioa_reset_attr = {
  3246. .attr = {
  3247. .name = "reset_host",
  3248. .mode = S_IWUSR,
  3249. },
  3250. .store = ipr_store_reset_adapter
  3251. };
  3252. static int ipr_iopoll(struct irq_poll *iop, int budget);
  3253. /**
  3254. * ipr_show_iopoll_weight - Show ipr polling mode
  3255. * @dev: class device struct
  3256. * @buf: buffer
  3257. *
  3258. * Return value:
  3259. * number of bytes printed to buffer
  3260. **/
  3261. static ssize_t ipr_show_iopoll_weight(struct device *dev,
  3262. struct device_attribute *attr, char *buf)
  3263. {
  3264. struct Scsi_Host *shost = class_to_shost(dev);
  3265. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3266. unsigned long lock_flags = 0;
  3267. int len;
  3268. spin_lock_irqsave(shost->host_lock, lock_flags);
  3269. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->iopoll_weight);
  3270. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3271. return len;
  3272. }
  3273. /**
  3274. * ipr_store_iopoll_weight - Change the adapter's polling mode
  3275. * @dev: class device struct
  3276. * @buf: buffer
  3277. *
  3278. * Return value:
  3279. * number of bytes printed to buffer
  3280. **/
  3281. static ssize_t ipr_store_iopoll_weight(struct device *dev,
  3282. struct device_attribute *attr,
  3283. const char *buf, size_t count)
  3284. {
  3285. struct Scsi_Host *shost = class_to_shost(dev);
  3286. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3287. unsigned long user_iopoll_weight;
  3288. unsigned long lock_flags = 0;
  3289. int i;
  3290. if (!ioa_cfg->sis64) {
  3291. dev_info(&ioa_cfg->pdev->dev, "irq_poll not supported on this adapter\n");
  3292. return -EINVAL;
  3293. }
  3294. if (kstrtoul(buf, 10, &user_iopoll_weight))
  3295. return -EINVAL;
  3296. if (user_iopoll_weight > 256) {
  3297. dev_info(&ioa_cfg->pdev->dev, "Invalid irq_poll weight. It must be less than 256\n");
  3298. return -EINVAL;
  3299. }
  3300. if (user_iopoll_weight == ioa_cfg->iopoll_weight) {
  3301. dev_info(&ioa_cfg->pdev->dev, "Current irq_poll weight has the same weight\n");
  3302. return strlen(buf);
  3303. }
  3304. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3305. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  3306. irq_poll_disable(&ioa_cfg->hrrq[i].iopoll);
  3307. }
  3308. spin_lock_irqsave(shost->host_lock, lock_flags);
  3309. ioa_cfg->iopoll_weight = user_iopoll_weight;
  3310. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3311. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  3312. irq_poll_init(&ioa_cfg->hrrq[i].iopoll,
  3313. ioa_cfg->iopoll_weight, ipr_iopoll);
  3314. }
  3315. }
  3316. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3317. return strlen(buf);
  3318. }
  3319. static struct device_attribute ipr_iopoll_weight_attr = {
  3320. .attr = {
  3321. .name = "iopoll_weight",
  3322. .mode = S_IRUGO | S_IWUSR,
  3323. },
  3324. .show = ipr_show_iopoll_weight,
  3325. .store = ipr_store_iopoll_weight
  3326. };
  3327. /**
  3328. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3329. * @buf_len: buffer length
  3330. *
  3331. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3332. * list to use for microcode download
  3333. *
  3334. * Return value:
  3335. * pointer to sglist / NULL on failure
  3336. **/
  3337. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3338. {
  3339. int sg_size, order, bsize_elem, num_elem, i, j;
  3340. struct ipr_sglist *sglist;
  3341. struct scatterlist *scatterlist;
  3342. struct page *page;
  3343. /* Get the minimum size per scatter/gather element */
  3344. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3345. /* Get the actual size per element */
  3346. order = get_order(sg_size);
  3347. /* Determine the actual number of bytes per element */
  3348. bsize_elem = PAGE_SIZE * (1 << order);
  3349. /* Determine the actual number of sg entries needed */
  3350. if (buf_len % bsize_elem)
  3351. num_elem = (buf_len / bsize_elem) + 1;
  3352. else
  3353. num_elem = buf_len / bsize_elem;
  3354. /* Allocate a scatter/gather list for the DMA */
  3355. sglist = kzalloc(sizeof(struct ipr_sglist) +
  3356. (sizeof(struct scatterlist) * (num_elem - 1)),
  3357. GFP_KERNEL);
  3358. if (sglist == NULL) {
  3359. ipr_trace;
  3360. return NULL;
  3361. }
  3362. scatterlist = sglist->scatterlist;
  3363. sg_init_table(scatterlist, num_elem);
  3364. sglist->order = order;
  3365. sglist->num_sg = num_elem;
  3366. /* Allocate a bunch of sg elements */
  3367. for (i = 0; i < num_elem; i++) {
  3368. page = alloc_pages(GFP_KERNEL, order);
  3369. if (!page) {
  3370. ipr_trace;
  3371. /* Free up what we already allocated */
  3372. for (j = i - 1; j >= 0; j--)
  3373. __free_pages(sg_page(&scatterlist[j]), order);
  3374. kfree(sglist);
  3375. return NULL;
  3376. }
  3377. sg_set_page(&scatterlist[i], page, 0, 0);
  3378. }
  3379. return sglist;
  3380. }
  3381. /**
  3382. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3383. * @p_dnld: scatter/gather list pointer
  3384. *
  3385. * Free a DMA'able ucode download buffer previously allocated with
  3386. * ipr_alloc_ucode_buffer
  3387. *
  3388. * Return value:
  3389. * nothing
  3390. **/
  3391. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3392. {
  3393. int i;
  3394. for (i = 0; i < sglist->num_sg; i++)
  3395. __free_pages(sg_page(&sglist->scatterlist[i]), sglist->order);
  3396. kfree(sglist);
  3397. }
  3398. /**
  3399. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3400. * @sglist: scatter/gather list pointer
  3401. * @buffer: buffer pointer
  3402. * @len: buffer length
  3403. *
  3404. * Copy a microcode image from a user buffer into a buffer allocated by
  3405. * ipr_alloc_ucode_buffer
  3406. *
  3407. * Return value:
  3408. * 0 on success / other on failure
  3409. **/
  3410. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3411. u8 *buffer, u32 len)
  3412. {
  3413. int bsize_elem, i, result = 0;
  3414. struct scatterlist *scatterlist;
  3415. void *kaddr;
  3416. /* Determine the actual number of bytes per element */
  3417. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3418. scatterlist = sglist->scatterlist;
  3419. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  3420. struct page *page = sg_page(&scatterlist[i]);
  3421. kaddr = kmap(page);
  3422. memcpy(kaddr, buffer, bsize_elem);
  3423. kunmap(page);
  3424. scatterlist[i].length = bsize_elem;
  3425. if (result != 0) {
  3426. ipr_trace;
  3427. return result;
  3428. }
  3429. }
  3430. if (len % bsize_elem) {
  3431. struct page *page = sg_page(&scatterlist[i]);
  3432. kaddr = kmap(page);
  3433. memcpy(kaddr, buffer, len % bsize_elem);
  3434. kunmap(page);
  3435. scatterlist[i].length = len % bsize_elem;
  3436. }
  3437. sglist->buffer_len = len;
  3438. return result;
  3439. }
  3440. /**
  3441. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3442. * @ipr_cmd: ipr command struct
  3443. * @sglist: scatter/gather list
  3444. *
  3445. * Builds a microcode download IOA data list (IOADL).
  3446. *
  3447. **/
  3448. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3449. struct ipr_sglist *sglist)
  3450. {
  3451. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3452. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3453. struct scatterlist *scatterlist = sglist->scatterlist;
  3454. int i;
  3455. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3456. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3457. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3458. ioarcb->ioadl_len =
  3459. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3460. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3461. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3462. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(&scatterlist[i]));
  3463. ioadl64[i].address = cpu_to_be64(sg_dma_address(&scatterlist[i]));
  3464. }
  3465. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3466. }
  3467. /**
  3468. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3469. * @ipr_cmd: ipr command struct
  3470. * @sglist: scatter/gather list
  3471. *
  3472. * Builds a microcode download IOA data list (IOADL).
  3473. *
  3474. **/
  3475. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3476. struct ipr_sglist *sglist)
  3477. {
  3478. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3479. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3480. struct scatterlist *scatterlist = sglist->scatterlist;
  3481. int i;
  3482. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3483. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3484. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3485. ioarcb->ioadl_len =
  3486. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3487. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3488. ioadl[i].flags_and_data_len =
  3489. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(&scatterlist[i]));
  3490. ioadl[i].address =
  3491. cpu_to_be32(sg_dma_address(&scatterlist[i]));
  3492. }
  3493. ioadl[i-1].flags_and_data_len |=
  3494. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3495. }
  3496. /**
  3497. * ipr_update_ioa_ucode - Update IOA's microcode
  3498. * @ioa_cfg: ioa config struct
  3499. * @sglist: scatter/gather list
  3500. *
  3501. * Initiate an adapter reset to update the IOA's microcode
  3502. *
  3503. * Return value:
  3504. * 0 on success / -EIO on failure
  3505. **/
  3506. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3507. struct ipr_sglist *sglist)
  3508. {
  3509. unsigned long lock_flags;
  3510. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3511. while (ioa_cfg->in_reset_reload) {
  3512. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3513. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3514. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3515. }
  3516. if (ioa_cfg->ucode_sglist) {
  3517. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3518. dev_err(&ioa_cfg->pdev->dev,
  3519. "Microcode download already in progress\n");
  3520. return -EIO;
  3521. }
  3522. sglist->num_dma_sg = dma_map_sg(&ioa_cfg->pdev->dev,
  3523. sglist->scatterlist, sglist->num_sg,
  3524. DMA_TO_DEVICE);
  3525. if (!sglist->num_dma_sg) {
  3526. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3527. dev_err(&ioa_cfg->pdev->dev,
  3528. "Failed to map microcode download buffer!\n");
  3529. return -EIO;
  3530. }
  3531. ioa_cfg->ucode_sglist = sglist;
  3532. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3533. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3534. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3535. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3536. ioa_cfg->ucode_sglist = NULL;
  3537. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3538. return 0;
  3539. }
  3540. /**
  3541. * ipr_store_update_fw - Update the firmware on the adapter
  3542. * @class_dev: device struct
  3543. * @buf: buffer
  3544. * @count: buffer size
  3545. *
  3546. * This function will update the firmware on the adapter.
  3547. *
  3548. * Return value:
  3549. * count on success / other on failure
  3550. **/
  3551. static ssize_t ipr_store_update_fw(struct device *dev,
  3552. struct device_attribute *attr,
  3553. const char *buf, size_t count)
  3554. {
  3555. struct Scsi_Host *shost = class_to_shost(dev);
  3556. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3557. struct ipr_ucode_image_header *image_hdr;
  3558. const struct firmware *fw_entry;
  3559. struct ipr_sglist *sglist;
  3560. char fname[100];
  3561. char *src;
  3562. char *endline;
  3563. int result, dnld_size;
  3564. if (!capable(CAP_SYS_ADMIN))
  3565. return -EACCES;
  3566. snprintf(fname, sizeof(fname), "%s", buf);
  3567. endline = strchr(fname, '\n');
  3568. if (endline)
  3569. *endline = '\0';
  3570. if (request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev)) {
  3571. dev_err(&ioa_cfg->pdev->dev, "Firmware file %s not found\n", fname);
  3572. return -EIO;
  3573. }
  3574. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3575. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3576. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3577. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3578. if (!sglist) {
  3579. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3580. release_firmware(fw_entry);
  3581. return -ENOMEM;
  3582. }
  3583. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3584. if (result) {
  3585. dev_err(&ioa_cfg->pdev->dev,
  3586. "Microcode buffer copy to DMA buffer failed\n");
  3587. goto out;
  3588. }
  3589. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3590. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3591. if (!result)
  3592. result = count;
  3593. out:
  3594. ipr_free_ucode_buffer(sglist);
  3595. release_firmware(fw_entry);
  3596. return result;
  3597. }
  3598. static struct device_attribute ipr_update_fw_attr = {
  3599. .attr = {
  3600. .name = "update_fw",
  3601. .mode = S_IWUSR,
  3602. },
  3603. .store = ipr_store_update_fw
  3604. };
  3605. /**
  3606. * ipr_show_fw_type - Show the adapter's firmware type.
  3607. * @dev: class device struct
  3608. * @buf: buffer
  3609. *
  3610. * Return value:
  3611. * number of bytes printed to buffer
  3612. **/
  3613. static ssize_t ipr_show_fw_type(struct device *dev,
  3614. struct device_attribute *attr, char *buf)
  3615. {
  3616. struct Scsi_Host *shost = class_to_shost(dev);
  3617. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3618. unsigned long lock_flags = 0;
  3619. int len;
  3620. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3621. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3622. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3623. return len;
  3624. }
  3625. static struct device_attribute ipr_ioa_fw_type_attr = {
  3626. .attr = {
  3627. .name = "fw_type",
  3628. .mode = S_IRUGO,
  3629. },
  3630. .show = ipr_show_fw_type
  3631. };
  3632. static ssize_t ipr_read_async_err_log(struct file *filep, struct kobject *kobj,
  3633. struct bin_attribute *bin_attr, char *buf,
  3634. loff_t off, size_t count)
  3635. {
  3636. struct device *cdev = container_of(kobj, struct device, kobj);
  3637. struct Scsi_Host *shost = class_to_shost(cdev);
  3638. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3639. struct ipr_hostrcb *hostrcb;
  3640. unsigned long lock_flags = 0;
  3641. int ret;
  3642. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3643. hostrcb = list_first_entry_or_null(&ioa_cfg->hostrcb_report_q,
  3644. struct ipr_hostrcb, queue);
  3645. if (!hostrcb) {
  3646. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3647. return 0;
  3648. }
  3649. ret = memory_read_from_buffer(buf, count, &off, &hostrcb->hcam,
  3650. sizeof(hostrcb->hcam));
  3651. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3652. return ret;
  3653. }
  3654. static ssize_t ipr_next_async_err_log(struct file *filep, struct kobject *kobj,
  3655. struct bin_attribute *bin_attr, char *buf,
  3656. loff_t off, size_t count)
  3657. {
  3658. struct device *cdev = container_of(kobj, struct device, kobj);
  3659. struct Scsi_Host *shost = class_to_shost(cdev);
  3660. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3661. struct ipr_hostrcb *hostrcb;
  3662. unsigned long lock_flags = 0;
  3663. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3664. hostrcb = list_first_entry_or_null(&ioa_cfg->hostrcb_report_q,
  3665. struct ipr_hostrcb, queue);
  3666. if (!hostrcb) {
  3667. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3668. return count;
  3669. }
  3670. /* Reclaim hostrcb before exit */
  3671. list_move_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  3672. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3673. return count;
  3674. }
  3675. static struct bin_attribute ipr_ioa_async_err_log = {
  3676. .attr = {
  3677. .name = "async_err_log",
  3678. .mode = S_IRUGO | S_IWUSR,
  3679. },
  3680. .size = 0,
  3681. .read = ipr_read_async_err_log,
  3682. .write = ipr_next_async_err_log
  3683. };
  3684. static struct device_attribute *ipr_ioa_attrs[] = {
  3685. &ipr_fw_version_attr,
  3686. &ipr_log_level_attr,
  3687. &ipr_diagnostics_attr,
  3688. &ipr_ioa_state_attr,
  3689. &ipr_ioa_reset_attr,
  3690. &ipr_update_fw_attr,
  3691. &ipr_ioa_fw_type_attr,
  3692. &ipr_iopoll_weight_attr,
  3693. NULL,
  3694. };
  3695. #ifdef CONFIG_SCSI_IPR_DUMP
  3696. /**
  3697. * ipr_read_dump - Dump the adapter
  3698. * @filp: open sysfs file
  3699. * @kobj: kobject struct
  3700. * @bin_attr: bin_attribute struct
  3701. * @buf: buffer
  3702. * @off: offset
  3703. * @count: buffer size
  3704. *
  3705. * Return value:
  3706. * number of bytes printed to buffer
  3707. **/
  3708. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3709. struct bin_attribute *bin_attr,
  3710. char *buf, loff_t off, size_t count)
  3711. {
  3712. struct device *cdev = container_of(kobj, struct device, kobj);
  3713. struct Scsi_Host *shost = class_to_shost(cdev);
  3714. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3715. struct ipr_dump *dump;
  3716. unsigned long lock_flags = 0;
  3717. char *src;
  3718. int len, sdt_end;
  3719. size_t rc = count;
  3720. if (!capable(CAP_SYS_ADMIN))
  3721. return -EACCES;
  3722. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3723. dump = ioa_cfg->dump;
  3724. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3725. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3726. return 0;
  3727. }
  3728. kref_get(&dump->kref);
  3729. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3730. if (off > dump->driver_dump.hdr.len) {
  3731. kref_put(&dump->kref, ipr_release_dump);
  3732. return 0;
  3733. }
  3734. if (off + count > dump->driver_dump.hdr.len) {
  3735. count = dump->driver_dump.hdr.len - off;
  3736. rc = count;
  3737. }
  3738. if (count && off < sizeof(dump->driver_dump)) {
  3739. if (off + count > sizeof(dump->driver_dump))
  3740. len = sizeof(dump->driver_dump) - off;
  3741. else
  3742. len = count;
  3743. src = (u8 *)&dump->driver_dump + off;
  3744. memcpy(buf, src, len);
  3745. buf += len;
  3746. off += len;
  3747. count -= len;
  3748. }
  3749. off -= sizeof(dump->driver_dump);
  3750. if (ioa_cfg->sis64)
  3751. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3752. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3753. sizeof(struct ipr_sdt_entry));
  3754. else
  3755. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3756. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3757. if (count && off < sdt_end) {
  3758. if (off + count > sdt_end)
  3759. len = sdt_end - off;
  3760. else
  3761. len = count;
  3762. src = (u8 *)&dump->ioa_dump + off;
  3763. memcpy(buf, src, len);
  3764. buf += len;
  3765. off += len;
  3766. count -= len;
  3767. }
  3768. off -= sdt_end;
  3769. while (count) {
  3770. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3771. len = PAGE_ALIGN(off) - off;
  3772. else
  3773. len = count;
  3774. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3775. src += off & ~PAGE_MASK;
  3776. memcpy(buf, src, len);
  3777. buf += len;
  3778. off += len;
  3779. count -= len;
  3780. }
  3781. kref_put(&dump->kref, ipr_release_dump);
  3782. return rc;
  3783. }
  3784. /**
  3785. * ipr_alloc_dump - Prepare for adapter dump
  3786. * @ioa_cfg: ioa config struct
  3787. *
  3788. * Return value:
  3789. * 0 on success / other on failure
  3790. **/
  3791. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3792. {
  3793. struct ipr_dump *dump;
  3794. __be32 **ioa_data;
  3795. unsigned long lock_flags = 0;
  3796. dump = kzalloc(sizeof(struct ipr_dump), GFP_KERNEL);
  3797. if (!dump) {
  3798. ipr_err("Dump memory allocation failed\n");
  3799. return -ENOMEM;
  3800. }
  3801. if (ioa_cfg->sis64)
  3802. ioa_data = vmalloc(IPR_FMT3_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3803. else
  3804. ioa_data = vmalloc(IPR_FMT2_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3805. if (!ioa_data) {
  3806. ipr_err("Dump memory allocation failed\n");
  3807. kfree(dump);
  3808. return -ENOMEM;
  3809. }
  3810. dump->ioa_dump.ioa_data = ioa_data;
  3811. kref_init(&dump->kref);
  3812. dump->ioa_cfg = ioa_cfg;
  3813. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3814. if (INACTIVE != ioa_cfg->sdt_state) {
  3815. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3816. vfree(dump->ioa_dump.ioa_data);
  3817. kfree(dump);
  3818. return 0;
  3819. }
  3820. ioa_cfg->dump = dump;
  3821. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3822. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead && !ioa_cfg->dump_taken) {
  3823. ioa_cfg->dump_taken = 1;
  3824. schedule_work(&ioa_cfg->work_q);
  3825. }
  3826. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3827. return 0;
  3828. }
  3829. /**
  3830. * ipr_free_dump - Free adapter dump memory
  3831. * @ioa_cfg: ioa config struct
  3832. *
  3833. * Return value:
  3834. * 0 on success / other on failure
  3835. **/
  3836. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3837. {
  3838. struct ipr_dump *dump;
  3839. unsigned long lock_flags = 0;
  3840. ENTER;
  3841. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3842. dump = ioa_cfg->dump;
  3843. if (!dump) {
  3844. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3845. return 0;
  3846. }
  3847. ioa_cfg->dump = NULL;
  3848. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3849. kref_put(&dump->kref, ipr_release_dump);
  3850. LEAVE;
  3851. return 0;
  3852. }
  3853. /**
  3854. * ipr_write_dump - Setup dump state of adapter
  3855. * @filp: open sysfs file
  3856. * @kobj: kobject struct
  3857. * @bin_attr: bin_attribute struct
  3858. * @buf: buffer
  3859. * @off: offset
  3860. * @count: buffer size
  3861. *
  3862. * Return value:
  3863. * number of bytes printed to buffer
  3864. **/
  3865. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3866. struct bin_attribute *bin_attr,
  3867. char *buf, loff_t off, size_t count)
  3868. {
  3869. struct device *cdev = container_of(kobj, struct device, kobj);
  3870. struct Scsi_Host *shost = class_to_shost(cdev);
  3871. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3872. int rc;
  3873. if (!capable(CAP_SYS_ADMIN))
  3874. return -EACCES;
  3875. if (buf[0] == '1')
  3876. rc = ipr_alloc_dump(ioa_cfg);
  3877. else if (buf[0] == '0')
  3878. rc = ipr_free_dump(ioa_cfg);
  3879. else
  3880. return -EINVAL;
  3881. if (rc)
  3882. return rc;
  3883. else
  3884. return count;
  3885. }
  3886. static struct bin_attribute ipr_dump_attr = {
  3887. .attr = {
  3888. .name = "dump",
  3889. .mode = S_IRUSR | S_IWUSR,
  3890. },
  3891. .size = 0,
  3892. .read = ipr_read_dump,
  3893. .write = ipr_write_dump
  3894. };
  3895. #else
  3896. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3897. #endif
  3898. /**
  3899. * ipr_change_queue_depth - Change the device's queue depth
  3900. * @sdev: scsi device struct
  3901. * @qdepth: depth to set
  3902. * @reason: calling context
  3903. *
  3904. * Return value:
  3905. * actual depth set
  3906. **/
  3907. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth)
  3908. {
  3909. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3910. struct ipr_resource_entry *res;
  3911. unsigned long lock_flags = 0;
  3912. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3913. res = (struct ipr_resource_entry *)sdev->hostdata;
  3914. if (res && ipr_is_gata(res) && qdepth > IPR_MAX_CMD_PER_ATA_LUN)
  3915. qdepth = IPR_MAX_CMD_PER_ATA_LUN;
  3916. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3917. scsi_change_queue_depth(sdev, qdepth);
  3918. return sdev->queue_depth;
  3919. }
  3920. /**
  3921. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3922. * @dev: device struct
  3923. * @attr: device attribute structure
  3924. * @buf: buffer
  3925. *
  3926. * Return value:
  3927. * number of bytes printed to buffer
  3928. **/
  3929. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3930. {
  3931. struct scsi_device *sdev = to_scsi_device(dev);
  3932. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3933. struct ipr_resource_entry *res;
  3934. unsigned long lock_flags = 0;
  3935. ssize_t len = -ENXIO;
  3936. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3937. res = (struct ipr_resource_entry *)sdev->hostdata;
  3938. if (res)
  3939. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3940. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3941. return len;
  3942. }
  3943. static struct device_attribute ipr_adapter_handle_attr = {
  3944. .attr = {
  3945. .name = "adapter_handle",
  3946. .mode = S_IRUSR,
  3947. },
  3948. .show = ipr_show_adapter_handle
  3949. };
  3950. /**
  3951. * ipr_show_resource_path - Show the resource path or the resource address for
  3952. * this device.
  3953. * @dev: device struct
  3954. * @attr: device attribute structure
  3955. * @buf: buffer
  3956. *
  3957. * Return value:
  3958. * number of bytes printed to buffer
  3959. **/
  3960. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  3961. {
  3962. struct scsi_device *sdev = to_scsi_device(dev);
  3963. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3964. struct ipr_resource_entry *res;
  3965. unsigned long lock_flags = 0;
  3966. ssize_t len = -ENXIO;
  3967. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3968. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3969. res = (struct ipr_resource_entry *)sdev->hostdata;
  3970. if (res && ioa_cfg->sis64)
  3971. len = snprintf(buf, PAGE_SIZE, "%s\n",
  3972. __ipr_format_res_path(res->res_path, buffer,
  3973. sizeof(buffer)));
  3974. else if (res)
  3975. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  3976. res->bus, res->target, res->lun);
  3977. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3978. return len;
  3979. }
  3980. static struct device_attribute ipr_resource_path_attr = {
  3981. .attr = {
  3982. .name = "resource_path",
  3983. .mode = S_IRUGO,
  3984. },
  3985. .show = ipr_show_resource_path
  3986. };
  3987. /**
  3988. * ipr_show_device_id - Show the device_id for this device.
  3989. * @dev: device struct
  3990. * @attr: device attribute structure
  3991. * @buf: buffer
  3992. *
  3993. * Return value:
  3994. * number of bytes printed to buffer
  3995. **/
  3996. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  3997. {
  3998. struct scsi_device *sdev = to_scsi_device(dev);
  3999. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4000. struct ipr_resource_entry *res;
  4001. unsigned long lock_flags = 0;
  4002. ssize_t len = -ENXIO;
  4003. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4004. res = (struct ipr_resource_entry *)sdev->hostdata;
  4005. if (res && ioa_cfg->sis64)
  4006. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", be64_to_cpu(res->dev_id));
  4007. else if (res)
  4008. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  4009. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4010. return len;
  4011. }
  4012. static struct device_attribute ipr_device_id_attr = {
  4013. .attr = {
  4014. .name = "device_id",
  4015. .mode = S_IRUGO,
  4016. },
  4017. .show = ipr_show_device_id
  4018. };
  4019. /**
  4020. * ipr_show_resource_type - Show the resource type for this device.
  4021. * @dev: device struct
  4022. * @attr: device attribute structure
  4023. * @buf: buffer
  4024. *
  4025. * Return value:
  4026. * number of bytes printed to buffer
  4027. **/
  4028. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  4029. {
  4030. struct scsi_device *sdev = to_scsi_device(dev);
  4031. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4032. struct ipr_resource_entry *res;
  4033. unsigned long lock_flags = 0;
  4034. ssize_t len = -ENXIO;
  4035. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4036. res = (struct ipr_resource_entry *)sdev->hostdata;
  4037. if (res)
  4038. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  4039. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4040. return len;
  4041. }
  4042. static struct device_attribute ipr_resource_type_attr = {
  4043. .attr = {
  4044. .name = "resource_type",
  4045. .mode = S_IRUGO,
  4046. },
  4047. .show = ipr_show_resource_type
  4048. };
  4049. /**
  4050. * ipr_show_raw_mode - Show the adapter's raw mode
  4051. * @dev: class device struct
  4052. * @buf: buffer
  4053. *
  4054. * Return value:
  4055. * number of bytes printed to buffer
  4056. **/
  4057. static ssize_t ipr_show_raw_mode(struct device *dev,
  4058. struct device_attribute *attr, char *buf)
  4059. {
  4060. struct scsi_device *sdev = to_scsi_device(dev);
  4061. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4062. struct ipr_resource_entry *res;
  4063. unsigned long lock_flags = 0;
  4064. ssize_t len;
  4065. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4066. res = (struct ipr_resource_entry *)sdev->hostdata;
  4067. if (res)
  4068. len = snprintf(buf, PAGE_SIZE, "%d\n", res->raw_mode);
  4069. else
  4070. len = -ENXIO;
  4071. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4072. return len;
  4073. }
  4074. /**
  4075. * ipr_store_raw_mode - Change the adapter's raw mode
  4076. * @dev: class device struct
  4077. * @buf: buffer
  4078. *
  4079. * Return value:
  4080. * number of bytes printed to buffer
  4081. **/
  4082. static ssize_t ipr_store_raw_mode(struct device *dev,
  4083. struct device_attribute *attr,
  4084. const char *buf, size_t count)
  4085. {
  4086. struct scsi_device *sdev = to_scsi_device(dev);
  4087. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4088. struct ipr_resource_entry *res;
  4089. unsigned long lock_flags = 0;
  4090. ssize_t len;
  4091. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4092. res = (struct ipr_resource_entry *)sdev->hostdata;
  4093. if (res) {
  4094. if (ipr_is_af_dasd_device(res)) {
  4095. res->raw_mode = simple_strtoul(buf, NULL, 10);
  4096. len = strlen(buf);
  4097. if (res->sdev)
  4098. sdev_printk(KERN_INFO, res->sdev, "raw mode is %s\n",
  4099. res->raw_mode ? "enabled" : "disabled");
  4100. } else
  4101. len = -EINVAL;
  4102. } else
  4103. len = -ENXIO;
  4104. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4105. return len;
  4106. }
  4107. static struct device_attribute ipr_raw_mode_attr = {
  4108. .attr = {
  4109. .name = "raw_mode",
  4110. .mode = S_IRUGO | S_IWUSR,
  4111. },
  4112. .show = ipr_show_raw_mode,
  4113. .store = ipr_store_raw_mode
  4114. };
  4115. static struct device_attribute *ipr_dev_attrs[] = {
  4116. &ipr_adapter_handle_attr,
  4117. &ipr_resource_path_attr,
  4118. &ipr_device_id_attr,
  4119. &ipr_resource_type_attr,
  4120. &ipr_raw_mode_attr,
  4121. NULL,
  4122. };
  4123. /**
  4124. * ipr_biosparam - Return the HSC mapping
  4125. * @sdev: scsi device struct
  4126. * @block_device: block device pointer
  4127. * @capacity: capacity of the device
  4128. * @parm: Array containing returned HSC values.
  4129. *
  4130. * This function generates the HSC parms that fdisk uses.
  4131. * We want to make sure we return something that places partitions
  4132. * on 4k boundaries for best performance with the IOA.
  4133. *
  4134. * Return value:
  4135. * 0 on success
  4136. **/
  4137. static int ipr_biosparam(struct scsi_device *sdev,
  4138. struct block_device *block_device,
  4139. sector_t capacity, int *parm)
  4140. {
  4141. int heads, sectors;
  4142. sector_t cylinders;
  4143. heads = 128;
  4144. sectors = 32;
  4145. cylinders = capacity;
  4146. sector_div(cylinders, (128 * 32));
  4147. /* return result */
  4148. parm[0] = heads;
  4149. parm[1] = sectors;
  4150. parm[2] = cylinders;
  4151. return 0;
  4152. }
  4153. /**
  4154. * ipr_find_starget - Find target based on bus/target.
  4155. * @starget: scsi target struct
  4156. *
  4157. * Return value:
  4158. * resource entry pointer if found / NULL if not found
  4159. **/
  4160. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  4161. {
  4162. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4163. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4164. struct ipr_resource_entry *res;
  4165. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4166. if ((res->bus == starget->channel) &&
  4167. (res->target == starget->id)) {
  4168. return res;
  4169. }
  4170. }
  4171. return NULL;
  4172. }
  4173. static struct ata_port_info sata_port_info;
  4174. /**
  4175. * ipr_target_alloc - Prepare for commands to a SCSI target
  4176. * @starget: scsi target struct
  4177. *
  4178. * If the device is a SATA device, this function allocates an
  4179. * ATA port with libata, else it does nothing.
  4180. *
  4181. * Return value:
  4182. * 0 on success / non-0 on failure
  4183. **/
  4184. static int ipr_target_alloc(struct scsi_target *starget)
  4185. {
  4186. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4187. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4188. struct ipr_sata_port *sata_port;
  4189. struct ata_port *ap;
  4190. struct ipr_resource_entry *res;
  4191. unsigned long lock_flags;
  4192. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4193. res = ipr_find_starget(starget);
  4194. starget->hostdata = NULL;
  4195. if (res && ipr_is_gata(res)) {
  4196. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4197. sata_port = kzalloc(sizeof(*sata_port), GFP_KERNEL);
  4198. if (!sata_port)
  4199. return -ENOMEM;
  4200. ap = ata_sas_port_alloc(&ioa_cfg->ata_host, &sata_port_info, shost);
  4201. if (ap) {
  4202. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4203. sata_port->ioa_cfg = ioa_cfg;
  4204. sata_port->ap = ap;
  4205. sata_port->res = res;
  4206. res->sata_port = sata_port;
  4207. ap->private_data = sata_port;
  4208. starget->hostdata = sata_port;
  4209. } else {
  4210. kfree(sata_port);
  4211. return -ENOMEM;
  4212. }
  4213. }
  4214. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4215. return 0;
  4216. }
  4217. /**
  4218. * ipr_target_destroy - Destroy a SCSI target
  4219. * @starget: scsi target struct
  4220. *
  4221. * If the device was a SATA device, this function frees the libata
  4222. * ATA port, else it does nothing.
  4223. *
  4224. **/
  4225. static void ipr_target_destroy(struct scsi_target *starget)
  4226. {
  4227. struct ipr_sata_port *sata_port = starget->hostdata;
  4228. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4229. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4230. if (ioa_cfg->sis64) {
  4231. if (!ipr_find_starget(starget)) {
  4232. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  4233. clear_bit(starget->id, ioa_cfg->array_ids);
  4234. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  4235. clear_bit(starget->id, ioa_cfg->vset_ids);
  4236. else if (starget->channel == 0)
  4237. clear_bit(starget->id, ioa_cfg->target_ids);
  4238. }
  4239. }
  4240. if (sata_port) {
  4241. starget->hostdata = NULL;
  4242. ata_sas_port_destroy(sata_port->ap);
  4243. kfree(sata_port);
  4244. }
  4245. }
  4246. /**
  4247. * ipr_find_sdev - Find device based on bus/target/lun.
  4248. * @sdev: scsi device struct
  4249. *
  4250. * Return value:
  4251. * resource entry pointer if found / NULL if not found
  4252. **/
  4253. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  4254. {
  4255. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4256. struct ipr_resource_entry *res;
  4257. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4258. if ((res->bus == sdev->channel) &&
  4259. (res->target == sdev->id) &&
  4260. (res->lun == sdev->lun))
  4261. return res;
  4262. }
  4263. return NULL;
  4264. }
  4265. /**
  4266. * ipr_slave_destroy - Unconfigure a SCSI device
  4267. * @sdev: scsi device struct
  4268. *
  4269. * Return value:
  4270. * nothing
  4271. **/
  4272. static void ipr_slave_destroy(struct scsi_device *sdev)
  4273. {
  4274. struct ipr_resource_entry *res;
  4275. struct ipr_ioa_cfg *ioa_cfg;
  4276. unsigned long lock_flags = 0;
  4277. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4278. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4279. res = (struct ipr_resource_entry *) sdev->hostdata;
  4280. if (res) {
  4281. if (res->sata_port)
  4282. res->sata_port->ap->link.device[0].class = ATA_DEV_NONE;
  4283. sdev->hostdata = NULL;
  4284. res->sdev = NULL;
  4285. res->sata_port = NULL;
  4286. }
  4287. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4288. }
  4289. /**
  4290. * ipr_slave_configure - Configure a SCSI device
  4291. * @sdev: scsi device struct
  4292. *
  4293. * This function configures the specified scsi device.
  4294. *
  4295. * Return value:
  4296. * 0 on success
  4297. **/
  4298. static int ipr_slave_configure(struct scsi_device *sdev)
  4299. {
  4300. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4301. struct ipr_resource_entry *res;
  4302. struct ata_port *ap = NULL;
  4303. unsigned long lock_flags = 0;
  4304. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4305. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4306. res = sdev->hostdata;
  4307. if (res) {
  4308. if (ipr_is_af_dasd_device(res))
  4309. sdev->type = TYPE_RAID;
  4310. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  4311. sdev->scsi_level = 4;
  4312. sdev->no_uld_attach = 1;
  4313. }
  4314. if (ipr_is_vset_device(res)) {
  4315. sdev->scsi_level = SCSI_SPC_3;
  4316. blk_queue_rq_timeout(sdev->request_queue,
  4317. IPR_VSET_RW_TIMEOUT);
  4318. blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS);
  4319. }
  4320. if (ipr_is_gata(res) && res->sata_port)
  4321. ap = res->sata_port->ap;
  4322. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4323. if (ap) {
  4324. scsi_change_queue_depth(sdev, IPR_MAX_CMD_PER_ATA_LUN);
  4325. ata_sas_slave_configure(sdev, ap);
  4326. }
  4327. if (ioa_cfg->sis64)
  4328. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  4329. ipr_format_res_path(ioa_cfg,
  4330. res->res_path, buffer, sizeof(buffer)));
  4331. return 0;
  4332. }
  4333. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4334. return 0;
  4335. }
  4336. /**
  4337. * ipr_ata_slave_alloc - Prepare for commands to a SATA device
  4338. * @sdev: scsi device struct
  4339. *
  4340. * This function initializes an ATA port so that future commands
  4341. * sent through queuecommand will work.
  4342. *
  4343. * Return value:
  4344. * 0 on success
  4345. **/
  4346. static int ipr_ata_slave_alloc(struct scsi_device *sdev)
  4347. {
  4348. struct ipr_sata_port *sata_port = NULL;
  4349. int rc = -ENXIO;
  4350. ENTER;
  4351. if (sdev->sdev_target)
  4352. sata_port = sdev->sdev_target->hostdata;
  4353. if (sata_port) {
  4354. rc = ata_sas_port_init(sata_port->ap);
  4355. if (rc == 0)
  4356. rc = ata_sas_sync_probe(sata_port->ap);
  4357. }
  4358. if (rc)
  4359. ipr_slave_destroy(sdev);
  4360. LEAVE;
  4361. return rc;
  4362. }
  4363. /**
  4364. * ipr_slave_alloc - Prepare for commands to a device.
  4365. * @sdev: scsi device struct
  4366. *
  4367. * This function saves a pointer to the resource entry
  4368. * in the scsi device struct if the device exists. We
  4369. * can then use this pointer in ipr_queuecommand when
  4370. * handling new commands.
  4371. *
  4372. * Return value:
  4373. * 0 on success / -ENXIO if device does not exist
  4374. **/
  4375. static int ipr_slave_alloc(struct scsi_device *sdev)
  4376. {
  4377. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4378. struct ipr_resource_entry *res;
  4379. unsigned long lock_flags;
  4380. int rc = -ENXIO;
  4381. sdev->hostdata = NULL;
  4382. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4383. res = ipr_find_sdev(sdev);
  4384. if (res) {
  4385. res->sdev = sdev;
  4386. res->add_to_ml = 0;
  4387. res->in_erp = 0;
  4388. sdev->hostdata = res;
  4389. if (!ipr_is_naca_model(res))
  4390. res->needs_sync_complete = 1;
  4391. rc = 0;
  4392. if (ipr_is_gata(res)) {
  4393. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4394. return ipr_ata_slave_alloc(sdev);
  4395. }
  4396. }
  4397. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4398. return rc;
  4399. }
  4400. /**
  4401. * ipr_match_lun - Match function for specified LUN
  4402. * @ipr_cmd: ipr command struct
  4403. * @device: device to match (sdev)
  4404. *
  4405. * Returns:
  4406. * 1 if command matches sdev / 0 if command does not match sdev
  4407. **/
  4408. static int ipr_match_lun(struct ipr_cmnd *ipr_cmd, void *device)
  4409. {
  4410. if (ipr_cmd->scsi_cmd && ipr_cmd->scsi_cmd->device == device)
  4411. return 1;
  4412. return 0;
  4413. }
  4414. /**
  4415. * ipr_wait_for_ops - Wait for matching commands to complete
  4416. * @ipr_cmd: ipr command struct
  4417. * @device: device to match (sdev)
  4418. * @match: match function to use
  4419. *
  4420. * Returns:
  4421. * SUCCESS / FAILED
  4422. **/
  4423. static int ipr_wait_for_ops(struct ipr_ioa_cfg *ioa_cfg, void *device,
  4424. int (*match)(struct ipr_cmnd *, void *))
  4425. {
  4426. struct ipr_cmnd *ipr_cmd;
  4427. int wait;
  4428. unsigned long flags;
  4429. struct ipr_hrr_queue *hrrq;
  4430. signed long timeout = IPR_ABORT_TASK_TIMEOUT;
  4431. DECLARE_COMPLETION_ONSTACK(comp);
  4432. ENTER;
  4433. do {
  4434. wait = 0;
  4435. for_each_hrrq(hrrq, ioa_cfg) {
  4436. spin_lock_irqsave(hrrq->lock, flags);
  4437. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4438. if (match(ipr_cmd, device)) {
  4439. ipr_cmd->eh_comp = &comp;
  4440. wait++;
  4441. }
  4442. }
  4443. spin_unlock_irqrestore(hrrq->lock, flags);
  4444. }
  4445. if (wait) {
  4446. timeout = wait_for_completion_timeout(&comp, timeout);
  4447. if (!timeout) {
  4448. wait = 0;
  4449. for_each_hrrq(hrrq, ioa_cfg) {
  4450. spin_lock_irqsave(hrrq->lock, flags);
  4451. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4452. if (match(ipr_cmd, device)) {
  4453. ipr_cmd->eh_comp = NULL;
  4454. wait++;
  4455. }
  4456. }
  4457. spin_unlock_irqrestore(hrrq->lock, flags);
  4458. }
  4459. if (wait)
  4460. dev_err(&ioa_cfg->pdev->dev, "Timed out waiting for aborted commands\n");
  4461. LEAVE;
  4462. return wait ? FAILED : SUCCESS;
  4463. }
  4464. }
  4465. } while (wait);
  4466. LEAVE;
  4467. return SUCCESS;
  4468. }
  4469. static int ipr_eh_host_reset(struct scsi_cmnd *cmd)
  4470. {
  4471. struct ipr_ioa_cfg *ioa_cfg;
  4472. unsigned long lock_flags = 0;
  4473. int rc = SUCCESS;
  4474. ENTER;
  4475. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4476. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4477. if (!ioa_cfg->in_reset_reload && !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4478. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4479. dev_err(&ioa_cfg->pdev->dev,
  4480. "Adapter being reset as a result of error recovery.\n");
  4481. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4482. ioa_cfg->sdt_state = GET_DUMP;
  4483. }
  4484. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4485. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4486. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4487. /* If we got hit with a host reset while we were already resetting
  4488. the adapter for some reason, and the reset failed. */
  4489. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4490. ipr_trace;
  4491. rc = FAILED;
  4492. }
  4493. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4494. LEAVE;
  4495. return rc;
  4496. }
  4497. /**
  4498. * ipr_device_reset - Reset the device
  4499. * @ioa_cfg: ioa config struct
  4500. * @res: resource entry struct
  4501. *
  4502. * This function issues a device reset to the affected device.
  4503. * If the device is a SCSI device, a LUN reset will be sent
  4504. * to the device first. If that does not work, a target reset
  4505. * will be sent. If the device is a SATA device, a PHY reset will
  4506. * be sent.
  4507. *
  4508. * Return value:
  4509. * 0 on success / non-zero on failure
  4510. **/
  4511. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4512. struct ipr_resource_entry *res)
  4513. {
  4514. struct ipr_cmnd *ipr_cmd;
  4515. struct ipr_ioarcb *ioarcb;
  4516. struct ipr_cmd_pkt *cmd_pkt;
  4517. struct ipr_ioarcb_ata_regs *regs;
  4518. u32 ioasc;
  4519. ENTER;
  4520. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4521. ioarcb = &ipr_cmd->ioarcb;
  4522. cmd_pkt = &ioarcb->cmd_pkt;
  4523. if (ipr_cmd->ioa_cfg->sis64) {
  4524. regs = &ipr_cmd->i.ata_ioadl.regs;
  4525. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4526. } else
  4527. regs = &ioarcb->u.add_data.u.regs;
  4528. ioarcb->res_handle = res->res_handle;
  4529. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4530. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4531. if (ipr_is_gata(res)) {
  4532. cmd_pkt->cdb[2] = IPR_ATA_PHY_RESET;
  4533. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(regs->flags));
  4534. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  4535. }
  4536. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4537. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4538. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4539. if (ipr_is_gata(res) && res->sata_port && ioasc != IPR_IOASC_IOA_WAS_RESET) {
  4540. if (ipr_cmd->ioa_cfg->sis64)
  4541. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  4542. sizeof(struct ipr_ioasa_gata));
  4543. else
  4544. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  4545. sizeof(struct ipr_ioasa_gata));
  4546. }
  4547. LEAVE;
  4548. return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0;
  4549. }
  4550. /**
  4551. * ipr_sata_reset - Reset the SATA port
  4552. * @link: SATA link to reset
  4553. * @classes: class of the attached device
  4554. *
  4555. * This function issues a SATA phy reset to the affected ATA link.
  4556. *
  4557. * Return value:
  4558. * 0 on success / non-zero on failure
  4559. **/
  4560. static int ipr_sata_reset(struct ata_link *link, unsigned int *classes,
  4561. unsigned long deadline)
  4562. {
  4563. struct ipr_sata_port *sata_port = link->ap->private_data;
  4564. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  4565. struct ipr_resource_entry *res;
  4566. unsigned long lock_flags = 0;
  4567. int rc = -ENXIO;
  4568. ENTER;
  4569. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4570. while (ioa_cfg->in_reset_reload) {
  4571. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4572. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4573. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4574. }
  4575. res = sata_port->res;
  4576. if (res) {
  4577. rc = ipr_device_reset(ioa_cfg, res);
  4578. *classes = res->ata_class;
  4579. }
  4580. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4581. LEAVE;
  4582. return rc;
  4583. }
  4584. /**
  4585. * ipr_eh_dev_reset - Reset the device
  4586. * @scsi_cmd: scsi command struct
  4587. *
  4588. * This function issues a device reset to the affected device.
  4589. * A LUN reset will be sent to the device first. If that does
  4590. * not work, a target reset will be sent.
  4591. *
  4592. * Return value:
  4593. * SUCCESS / FAILED
  4594. **/
  4595. static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd)
  4596. {
  4597. struct ipr_cmnd *ipr_cmd;
  4598. struct ipr_ioa_cfg *ioa_cfg;
  4599. struct ipr_resource_entry *res;
  4600. struct ata_port *ap;
  4601. int rc = 0;
  4602. struct ipr_hrr_queue *hrrq;
  4603. ENTER;
  4604. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4605. res = scsi_cmd->device->hostdata;
  4606. if (!res)
  4607. return FAILED;
  4608. /*
  4609. * If we are currently going through reset/reload, return failed. This will force the
  4610. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4611. * reset to complete
  4612. */
  4613. if (ioa_cfg->in_reset_reload)
  4614. return FAILED;
  4615. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4616. return FAILED;
  4617. for_each_hrrq(hrrq, ioa_cfg) {
  4618. spin_lock(&hrrq->_lock);
  4619. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4620. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4621. if (ipr_cmd->scsi_cmd)
  4622. ipr_cmd->done = ipr_scsi_eh_done;
  4623. if (ipr_cmd->qc)
  4624. ipr_cmd->done = ipr_sata_eh_done;
  4625. if (ipr_cmd->qc &&
  4626. !(ipr_cmd->qc->flags & ATA_QCFLAG_FAILED)) {
  4627. ipr_cmd->qc->err_mask |= AC_ERR_TIMEOUT;
  4628. ipr_cmd->qc->flags |= ATA_QCFLAG_FAILED;
  4629. }
  4630. }
  4631. }
  4632. spin_unlock(&hrrq->_lock);
  4633. }
  4634. res->resetting_device = 1;
  4635. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4636. if (ipr_is_gata(res) && res->sata_port) {
  4637. ap = res->sata_port->ap;
  4638. spin_unlock_irq(scsi_cmd->device->host->host_lock);
  4639. ata_std_error_handler(ap);
  4640. spin_lock_irq(scsi_cmd->device->host->host_lock);
  4641. for_each_hrrq(hrrq, ioa_cfg) {
  4642. spin_lock(&hrrq->_lock);
  4643. list_for_each_entry(ipr_cmd,
  4644. &hrrq->hrrq_pending_q, queue) {
  4645. if (ipr_cmd->ioarcb.res_handle ==
  4646. res->res_handle) {
  4647. rc = -EIO;
  4648. break;
  4649. }
  4650. }
  4651. spin_unlock(&hrrq->_lock);
  4652. }
  4653. } else
  4654. rc = ipr_device_reset(ioa_cfg, res);
  4655. res->resetting_device = 0;
  4656. res->reset_occurred = 1;
  4657. LEAVE;
  4658. return rc ? FAILED : SUCCESS;
  4659. }
  4660. static int ipr_eh_dev_reset(struct scsi_cmnd *cmd)
  4661. {
  4662. int rc;
  4663. struct ipr_ioa_cfg *ioa_cfg;
  4664. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4665. spin_lock_irq(cmd->device->host->host_lock);
  4666. rc = __ipr_eh_dev_reset(cmd);
  4667. spin_unlock_irq(cmd->device->host->host_lock);
  4668. if (rc == SUCCESS)
  4669. rc = ipr_wait_for_ops(ioa_cfg, cmd->device, ipr_match_lun);
  4670. return rc;
  4671. }
  4672. /**
  4673. * ipr_bus_reset_done - Op done function for bus reset.
  4674. * @ipr_cmd: ipr command struct
  4675. *
  4676. * This function is the op done function for a bus reset
  4677. *
  4678. * Return value:
  4679. * none
  4680. **/
  4681. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4682. {
  4683. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4684. struct ipr_resource_entry *res;
  4685. ENTER;
  4686. if (!ioa_cfg->sis64)
  4687. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4688. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4689. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4690. break;
  4691. }
  4692. }
  4693. /*
  4694. * If abort has not completed, indicate the reset has, else call the
  4695. * abort's done function to wake the sleeping eh thread
  4696. */
  4697. if (ipr_cmd->sibling->sibling)
  4698. ipr_cmd->sibling->sibling = NULL;
  4699. else
  4700. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4701. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4702. LEAVE;
  4703. }
  4704. /**
  4705. * ipr_abort_timeout - An abort task has timed out
  4706. * @ipr_cmd: ipr command struct
  4707. *
  4708. * This function handles when an abort task times out. If this
  4709. * happens we issue a bus reset since we have resources tied
  4710. * up that must be freed before returning to the midlayer.
  4711. *
  4712. * Return value:
  4713. * none
  4714. **/
  4715. static void ipr_abort_timeout(struct ipr_cmnd *ipr_cmd)
  4716. {
  4717. struct ipr_cmnd *reset_cmd;
  4718. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4719. struct ipr_cmd_pkt *cmd_pkt;
  4720. unsigned long lock_flags = 0;
  4721. ENTER;
  4722. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4723. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4724. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4725. return;
  4726. }
  4727. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4728. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4729. ipr_cmd->sibling = reset_cmd;
  4730. reset_cmd->sibling = ipr_cmd;
  4731. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4732. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4733. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4734. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4735. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4736. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4737. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4738. LEAVE;
  4739. }
  4740. /**
  4741. * ipr_cancel_op - Cancel specified op
  4742. * @scsi_cmd: scsi command struct
  4743. *
  4744. * This function cancels specified op.
  4745. *
  4746. * Return value:
  4747. * SUCCESS / FAILED
  4748. **/
  4749. static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
  4750. {
  4751. struct ipr_cmnd *ipr_cmd;
  4752. struct ipr_ioa_cfg *ioa_cfg;
  4753. struct ipr_resource_entry *res;
  4754. struct ipr_cmd_pkt *cmd_pkt;
  4755. u32 ioasc, int_reg;
  4756. int op_found = 0;
  4757. struct ipr_hrr_queue *hrrq;
  4758. ENTER;
  4759. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4760. res = scsi_cmd->device->hostdata;
  4761. /* If we are currently going through reset/reload, return failed.
  4762. * This will force the mid-layer to call ipr_eh_host_reset,
  4763. * which will then go to sleep and wait for the reset to complete
  4764. */
  4765. if (ioa_cfg->in_reset_reload ||
  4766. ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4767. return FAILED;
  4768. if (!res)
  4769. return FAILED;
  4770. /*
  4771. * If we are aborting a timed out op, chances are that the timeout was caused
  4772. * by a still not detected EEH error. In such cases, reading a register will
  4773. * trigger the EEH recovery infrastructure.
  4774. */
  4775. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4776. if (!ipr_is_gscsi(res))
  4777. return FAILED;
  4778. for_each_hrrq(hrrq, ioa_cfg) {
  4779. spin_lock(&hrrq->_lock);
  4780. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4781. if (ipr_cmd->scsi_cmd == scsi_cmd) {
  4782. ipr_cmd->done = ipr_scsi_eh_done;
  4783. op_found = 1;
  4784. break;
  4785. }
  4786. }
  4787. spin_unlock(&hrrq->_lock);
  4788. }
  4789. if (!op_found)
  4790. return SUCCESS;
  4791. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4792. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4793. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4794. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4795. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4796. ipr_cmd->u.sdev = scsi_cmd->device;
  4797. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4798. scsi_cmd->cmnd[0]);
  4799. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4800. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4801. /*
  4802. * If the abort task timed out and we sent a bus reset, we will get
  4803. * one the following responses to the abort
  4804. */
  4805. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4806. ioasc = 0;
  4807. ipr_trace;
  4808. }
  4809. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4810. if (!ipr_is_naca_model(res))
  4811. res->needs_sync_complete = 1;
  4812. LEAVE;
  4813. return IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  4814. }
  4815. /**
  4816. * ipr_eh_abort - Abort a single op
  4817. * @scsi_cmd: scsi command struct
  4818. *
  4819. * Return value:
  4820. * 0 if scan in progress / 1 if scan is complete
  4821. **/
  4822. static int ipr_scan_finished(struct Scsi_Host *shost, unsigned long elapsed_time)
  4823. {
  4824. unsigned long lock_flags;
  4825. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4826. int rc = 0;
  4827. spin_lock_irqsave(shost->host_lock, lock_flags);
  4828. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead || ioa_cfg->scan_done)
  4829. rc = 1;
  4830. if ((elapsed_time/HZ) > (ioa_cfg->transop_timeout * 2))
  4831. rc = 1;
  4832. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  4833. return rc;
  4834. }
  4835. /**
  4836. * ipr_eh_host_reset - Reset the host adapter
  4837. * @scsi_cmd: scsi command struct
  4838. *
  4839. * Return value:
  4840. * SUCCESS / FAILED
  4841. **/
  4842. static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd)
  4843. {
  4844. unsigned long flags;
  4845. int rc;
  4846. struct ipr_ioa_cfg *ioa_cfg;
  4847. ENTER;
  4848. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4849. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4850. rc = ipr_cancel_op(scsi_cmd);
  4851. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4852. if (rc == SUCCESS)
  4853. rc = ipr_wait_for_ops(ioa_cfg, scsi_cmd->device, ipr_match_lun);
  4854. LEAVE;
  4855. return rc;
  4856. }
  4857. /**
  4858. * ipr_handle_other_interrupt - Handle "other" interrupts
  4859. * @ioa_cfg: ioa config struct
  4860. * @int_reg: interrupt register
  4861. *
  4862. * Return value:
  4863. * IRQ_NONE / IRQ_HANDLED
  4864. **/
  4865. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4866. u32 int_reg)
  4867. {
  4868. irqreturn_t rc = IRQ_HANDLED;
  4869. u32 int_mask_reg;
  4870. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4871. int_reg &= ~int_mask_reg;
  4872. /* If an interrupt on the adapter did not occur, ignore it.
  4873. * Or in the case of SIS 64, check for a stage change interrupt.
  4874. */
  4875. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4876. if (ioa_cfg->sis64) {
  4877. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4878. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4879. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4880. /* clear stage change */
  4881. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4882. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4883. list_del(&ioa_cfg->reset_cmd->queue);
  4884. del_timer(&ioa_cfg->reset_cmd->timer);
  4885. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4886. return IRQ_HANDLED;
  4887. }
  4888. }
  4889. return IRQ_NONE;
  4890. }
  4891. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4892. /* Mask the interrupt */
  4893. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4894. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4895. list_del(&ioa_cfg->reset_cmd->queue);
  4896. del_timer(&ioa_cfg->reset_cmd->timer);
  4897. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4898. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  4899. if (ioa_cfg->clear_isr) {
  4900. if (ipr_debug && printk_ratelimit())
  4901. dev_err(&ioa_cfg->pdev->dev,
  4902. "Spurious interrupt detected. 0x%08X\n", int_reg);
  4903. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4904. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4905. return IRQ_NONE;
  4906. }
  4907. } else {
  4908. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  4909. ioa_cfg->ioa_unit_checked = 1;
  4910. else if (int_reg & IPR_PCII_NO_HOST_RRQ)
  4911. dev_err(&ioa_cfg->pdev->dev,
  4912. "No Host RRQ. 0x%08X\n", int_reg);
  4913. else
  4914. dev_err(&ioa_cfg->pdev->dev,
  4915. "Permanent IOA failure. 0x%08X\n", int_reg);
  4916. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4917. ioa_cfg->sdt_state = GET_DUMP;
  4918. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  4919. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4920. }
  4921. return rc;
  4922. }
  4923. /**
  4924. * ipr_isr_eh - Interrupt service routine error handler
  4925. * @ioa_cfg: ioa config struct
  4926. * @msg: message to log
  4927. *
  4928. * Return value:
  4929. * none
  4930. **/
  4931. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg, u16 number)
  4932. {
  4933. ioa_cfg->errors_logged++;
  4934. dev_err(&ioa_cfg->pdev->dev, "%s %d\n", msg, number);
  4935. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4936. ioa_cfg->sdt_state = GET_DUMP;
  4937. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4938. }
  4939. static int ipr_process_hrrq(struct ipr_hrr_queue *hrr_queue, int budget,
  4940. struct list_head *doneq)
  4941. {
  4942. u32 ioasc;
  4943. u16 cmd_index;
  4944. struct ipr_cmnd *ipr_cmd;
  4945. struct ipr_ioa_cfg *ioa_cfg = hrr_queue->ioa_cfg;
  4946. int num_hrrq = 0;
  4947. /* If interrupts are disabled, ignore the interrupt */
  4948. if (!hrr_queue->allow_interrupts)
  4949. return 0;
  4950. while ((be32_to_cpu(*hrr_queue->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4951. hrr_queue->toggle_bit) {
  4952. cmd_index = (be32_to_cpu(*hrr_queue->hrrq_curr) &
  4953. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >>
  4954. IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4955. if (unlikely(cmd_index > hrr_queue->max_cmd_id ||
  4956. cmd_index < hrr_queue->min_cmd_id)) {
  4957. ipr_isr_eh(ioa_cfg,
  4958. "Invalid response handle from IOA: ",
  4959. cmd_index);
  4960. break;
  4961. }
  4962. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4963. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4964. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4965. list_move_tail(&ipr_cmd->queue, doneq);
  4966. if (hrr_queue->hrrq_curr < hrr_queue->hrrq_end) {
  4967. hrr_queue->hrrq_curr++;
  4968. } else {
  4969. hrr_queue->hrrq_curr = hrr_queue->hrrq_start;
  4970. hrr_queue->toggle_bit ^= 1u;
  4971. }
  4972. num_hrrq++;
  4973. if (budget > 0 && num_hrrq >= budget)
  4974. break;
  4975. }
  4976. return num_hrrq;
  4977. }
  4978. static int ipr_iopoll(struct irq_poll *iop, int budget)
  4979. {
  4980. struct ipr_ioa_cfg *ioa_cfg;
  4981. struct ipr_hrr_queue *hrrq;
  4982. struct ipr_cmnd *ipr_cmd, *temp;
  4983. unsigned long hrrq_flags;
  4984. int completed_ops;
  4985. LIST_HEAD(doneq);
  4986. hrrq = container_of(iop, struct ipr_hrr_queue, iopoll);
  4987. ioa_cfg = hrrq->ioa_cfg;
  4988. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4989. completed_ops = ipr_process_hrrq(hrrq, budget, &doneq);
  4990. if (completed_ops < budget)
  4991. irq_poll_complete(iop);
  4992. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4993. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4994. list_del(&ipr_cmd->queue);
  4995. del_timer(&ipr_cmd->timer);
  4996. ipr_cmd->fast_done(ipr_cmd);
  4997. }
  4998. return completed_ops;
  4999. }
  5000. /**
  5001. * ipr_isr - Interrupt service routine
  5002. * @irq: irq number
  5003. * @devp: pointer to ioa config struct
  5004. *
  5005. * Return value:
  5006. * IRQ_NONE / IRQ_HANDLED
  5007. **/
  5008. static irqreturn_t ipr_isr(int irq, void *devp)
  5009. {
  5010. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  5011. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  5012. unsigned long hrrq_flags = 0;
  5013. u32 int_reg = 0;
  5014. int num_hrrq = 0;
  5015. int irq_none = 0;
  5016. struct ipr_cmnd *ipr_cmd, *temp;
  5017. irqreturn_t rc = IRQ_NONE;
  5018. LIST_HEAD(doneq);
  5019. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5020. /* If interrupts are disabled, ignore the interrupt */
  5021. if (!hrrq->allow_interrupts) {
  5022. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5023. return IRQ_NONE;
  5024. }
  5025. while (1) {
  5026. if (ipr_process_hrrq(hrrq, -1, &doneq)) {
  5027. rc = IRQ_HANDLED;
  5028. if (!ioa_cfg->clear_isr)
  5029. break;
  5030. /* Clear the PCI interrupt */
  5031. num_hrrq = 0;
  5032. do {
  5033. writel(IPR_PCII_HRRQ_UPDATED,
  5034. ioa_cfg->regs.clr_interrupt_reg32);
  5035. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  5036. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  5037. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  5038. } else if (rc == IRQ_NONE && irq_none == 0) {
  5039. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  5040. irq_none++;
  5041. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  5042. int_reg & IPR_PCII_HRRQ_UPDATED) {
  5043. ipr_isr_eh(ioa_cfg,
  5044. "Error clearing HRRQ: ", num_hrrq);
  5045. rc = IRQ_HANDLED;
  5046. break;
  5047. } else
  5048. break;
  5049. }
  5050. if (unlikely(rc == IRQ_NONE))
  5051. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  5052. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5053. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  5054. list_del(&ipr_cmd->queue);
  5055. del_timer(&ipr_cmd->timer);
  5056. ipr_cmd->fast_done(ipr_cmd);
  5057. }
  5058. return rc;
  5059. }
  5060. /**
  5061. * ipr_isr_mhrrq - Interrupt service routine
  5062. * @irq: irq number
  5063. * @devp: pointer to ioa config struct
  5064. *
  5065. * Return value:
  5066. * IRQ_NONE / IRQ_HANDLED
  5067. **/
  5068. static irqreturn_t ipr_isr_mhrrq(int irq, void *devp)
  5069. {
  5070. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  5071. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  5072. unsigned long hrrq_flags = 0;
  5073. struct ipr_cmnd *ipr_cmd, *temp;
  5074. irqreturn_t rc = IRQ_NONE;
  5075. LIST_HEAD(doneq);
  5076. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5077. /* If interrupts are disabled, ignore the interrupt */
  5078. if (!hrrq->allow_interrupts) {
  5079. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5080. return IRQ_NONE;
  5081. }
  5082. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  5083. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  5084. hrrq->toggle_bit) {
  5085. irq_poll_sched(&hrrq->iopoll);
  5086. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5087. return IRQ_HANDLED;
  5088. }
  5089. } else {
  5090. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  5091. hrrq->toggle_bit)
  5092. if (ipr_process_hrrq(hrrq, -1, &doneq))
  5093. rc = IRQ_HANDLED;
  5094. }
  5095. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5096. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  5097. list_del(&ipr_cmd->queue);
  5098. del_timer(&ipr_cmd->timer);
  5099. ipr_cmd->fast_done(ipr_cmd);
  5100. }
  5101. return rc;
  5102. }
  5103. /**
  5104. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  5105. * @ioa_cfg: ioa config struct
  5106. * @ipr_cmd: ipr command struct
  5107. *
  5108. * Return value:
  5109. * 0 on success / -1 on failure
  5110. **/
  5111. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  5112. struct ipr_cmnd *ipr_cmd)
  5113. {
  5114. int i, nseg;
  5115. struct scatterlist *sg;
  5116. u32 length;
  5117. u32 ioadl_flags = 0;
  5118. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5119. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5120. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  5121. length = scsi_bufflen(scsi_cmd);
  5122. if (!length)
  5123. return 0;
  5124. nseg = scsi_dma_map(scsi_cmd);
  5125. if (nseg < 0) {
  5126. if (printk_ratelimit())
  5127. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  5128. return -1;
  5129. }
  5130. ipr_cmd->dma_use_sg = nseg;
  5131. ioarcb->data_transfer_length = cpu_to_be32(length);
  5132. ioarcb->ioadl_len =
  5133. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5134. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  5135. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5136. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5137. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  5138. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5139. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  5140. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  5141. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  5142. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  5143. }
  5144. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5145. return 0;
  5146. }
  5147. /**
  5148. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  5149. * @ioa_cfg: ioa config struct
  5150. * @ipr_cmd: ipr command struct
  5151. *
  5152. * Return value:
  5153. * 0 on success / -1 on failure
  5154. **/
  5155. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  5156. struct ipr_cmnd *ipr_cmd)
  5157. {
  5158. int i, nseg;
  5159. struct scatterlist *sg;
  5160. u32 length;
  5161. u32 ioadl_flags = 0;
  5162. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5163. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5164. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5165. length = scsi_bufflen(scsi_cmd);
  5166. if (!length)
  5167. return 0;
  5168. nseg = scsi_dma_map(scsi_cmd);
  5169. if (nseg < 0) {
  5170. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  5171. return -1;
  5172. }
  5173. ipr_cmd->dma_use_sg = nseg;
  5174. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  5175. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5176. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5177. ioarcb->data_transfer_length = cpu_to_be32(length);
  5178. ioarcb->ioadl_len =
  5179. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5180. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  5181. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5182. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  5183. ioarcb->read_ioadl_len =
  5184. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5185. }
  5186. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  5187. ioadl = ioarcb->u.add_data.u.ioadl;
  5188. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  5189. offsetof(struct ipr_ioarcb, u.add_data));
  5190. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5191. }
  5192. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  5193. ioadl[i].flags_and_data_len =
  5194. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5195. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  5196. }
  5197. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5198. return 0;
  5199. }
  5200. /**
  5201. * ipr_erp_done - Process completion of ERP for a device
  5202. * @ipr_cmd: ipr command struct
  5203. *
  5204. * This function copies the sense buffer into the scsi_cmd
  5205. * struct and pushes the scsi_done function.
  5206. *
  5207. * Return value:
  5208. * nothing
  5209. **/
  5210. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  5211. {
  5212. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5213. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5214. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5215. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5216. scsi_cmd->result |= (DID_ERROR << 16);
  5217. scmd_printk(KERN_ERR, scsi_cmd,
  5218. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  5219. } else {
  5220. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  5221. SCSI_SENSE_BUFFERSIZE);
  5222. }
  5223. if (res) {
  5224. if (!ipr_is_naca_model(res))
  5225. res->needs_sync_complete = 1;
  5226. res->in_erp = 0;
  5227. }
  5228. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5229. scsi_cmd->scsi_done(scsi_cmd);
  5230. if (ipr_cmd->eh_comp)
  5231. complete(ipr_cmd->eh_comp);
  5232. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5233. }
  5234. /**
  5235. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  5236. * @ipr_cmd: ipr command struct
  5237. *
  5238. * Return value:
  5239. * none
  5240. **/
  5241. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  5242. {
  5243. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5244. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5245. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5246. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  5247. ioarcb->data_transfer_length = 0;
  5248. ioarcb->read_data_transfer_length = 0;
  5249. ioarcb->ioadl_len = 0;
  5250. ioarcb->read_ioadl_len = 0;
  5251. ioasa->hdr.ioasc = 0;
  5252. ioasa->hdr.residual_data_len = 0;
  5253. if (ipr_cmd->ioa_cfg->sis64)
  5254. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5255. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  5256. else {
  5257. ioarcb->write_ioadl_addr =
  5258. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  5259. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5260. }
  5261. }
  5262. /**
  5263. * ipr_erp_request_sense - Send request sense to a device
  5264. * @ipr_cmd: ipr command struct
  5265. *
  5266. * This function sends a request sense to a device as a result
  5267. * of a check condition.
  5268. *
  5269. * Return value:
  5270. * nothing
  5271. **/
  5272. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  5273. {
  5274. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5275. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5276. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5277. ipr_erp_done(ipr_cmd);
  5278. return;
  5279. }
  5280. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5281. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  5282. cmd_pkt->cdb[0] = REQUEST_SENSE;
  5283. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  5284. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  5285. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5286. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  5287. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  5288. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  5289. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  5290. IPR_REQUEST_SENSE_TIMEOUT * 2);
  5291. }
  5292. /**
  5293. * ipr_erp_cancel_all - Send cancel all to a device
  5294. * @ipr_cmd: ipr command struct
  5295. *
  5296. * This function sends a cancel all to a device to clear the
  5297. * queue. If we are running TCQ on the device, QERR is set to 1,
  5298. * which means all outstanding ops have been dropped on the floor.
  5299. * Cancel all will return them to us.
  5300. *
  5301. * Return value:
  5302. * nothing
  5303. **/
  5304. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  5305. {
  5306. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5307. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5308. struct ipr_cmd_pkt *cmd_pkt;
  5309. res->in_erp = 1;
  5310. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5311. if (!scsi_cmd->device->simple_tags) {
  5312. ipr_erp_request_sense(ipr_cmd);
  5313. return;
  5314. }
  5315. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5316. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  5317. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  5318. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  5319. IPR_CANCEL_ALL_TIMEOUT);
  5320. }
  5321. /**
  5322. * ipr_dump_ioasa - Dump contents of IOASA
  5323. * @ioa_cfg: ioa config struct
  5324. * @ipr_cmd: ipr command struct
  5325. * @res: resource entry struct
  5326. *
  5327. * This function is invoked by the interrupt handler when ops
  5328. * fail. It will log the IOASA if appropriate. Only called
  5329. * for GPDD ops.
  5330. *
  5331. * Return value:
  5332. * none
  5333. **/
  5334. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  5335. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  5336. {
  5337. int i;
  5338. u16 data_len;
  5339. u32 ioasc, fd_ioasc;
  5340. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5341. __be32 *ioasa_data = (__be32 *)ioasa;
  5342. int error_index;
  5343. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  5344. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  5345. if (0 == ioasc)
  5346. return;
  5347. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  5348. return;
  5349. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  5350. error_index = ipr_get_error(fd_ioasc);
  5351. else
  5352. error_index = ipr_get_error(ioasc);
  5353. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  5354. /* Don't log an error if the IOA already logged one */
  5355. if (ioasa->hdr.ilid != 0)
  5356. return;
  5357. if (!ipr_is_gscsi(res))
  5358. return;
  5359. if (ipr_error_table[error_index].log_ioasa == 0)
  5360. return;
  5361. }
  5362. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  5363. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  5364. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  5365. data_len = sizeof(struct ipr_ioasa64);
  5366. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  5367. data_len = sizeof(struct ipr_ioasa);
  5368. ipr_err("IOASA Dump:\n");
  5369. for (i = 0; i < data_len / 4; i += 4) {
  5370. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  5371. be32_to_cpu(ioasa_data[i]),
  5372. be32_to_cpu(ioasa_data[i+1]),
  5373. be32_to_cpu(ioasa_data[i+2]),
  5374. be32_to_cpu(ioasa_data[i+3]));
  5375. }
  5376. }
  5377. /**
  5378. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  5379. * @ioasa: IOASA
  5380. * @sense_buf: sense data buffer
  5381. *
  5382. * Return value:
  5383. * none
  5384. **/
  5385. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  5386. {
  5387. u32 failing_lba;
  5388. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  5389. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  5390. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5391. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  5392. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  5393. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  5394. return;
  5395. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  5396. if (ipr_is_vset_device(res) &&
  5397. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  5398. ioasa->u.vset.failing_lba_hi != 0) {
  5399. sense_buf[0] = 0x72;
  5400. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  5401. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  5402. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  5403. sense_buf[7] = 12;
  5404. sense_buf[8] = 0;
  5405. sense_buf[9] = 0x0A;
  5406. sense_buf[10] = 0x80;
  5407. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  5408. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  5409. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  5410. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  5411. sense_buf[15] = failing_lba & 0x000000ff;
  5412. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5413. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  5414. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  5415. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  5416. sense_buf[19] = failing_lba & 0x000000ff;
  5417. } else {
  5418. sense_buf[0] = 0x70;
  5419. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  5420. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  5421. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  5422. /* Illegal request */
  5423. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  5424. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  5425. sense_buf[7] = 10; /* additional length */
  5426. /* IOARCB was in error */
  5427. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  5428. sense_buf[15] = 0xC0;
  5429. else /* Parameter data was invalid */
  5430. sense_buf[15] = 0x80;
  5431. sense_buf[16] =
  5432. ((IPR_FIELD_POINTER_MASK &
  5433. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  5434. sense_buf[17] =
  5435. (IPR_FIELD_POINTER_MASK &
  5436. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  5437. } else {
  5438. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  5439. if (ipr_is_vset_device(res))
  5440. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5441. else
  5442. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  5443. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  5444. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  5445. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  5446. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  5447. sense_buf[6] = failing_lba & 0x000000ff;
  5448. }
  5449. sense_buf[7] = 6; /* additional length */
  5450. }
  5451. }
  5452. }
  5453. /**
  5454. * ipr_get_autosense - Copy autosense data to sense buffer
  5455. * @ipr_cmd: ipr command struct
  5456. *
  5457. * This function copies the autosense buffer to the buffer
  5458. * in the scsi_cmd, if there is autosense available.
  5459. *
  5460. * Return value:
  5461. * 1 if autosense was available / 0 if not
  5462. **/
  5463. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  5464. {
  5465. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5466. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  5467. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  5468. return 0;
  5469. if (ipr_cmd->ioa_cfg->sis64)
  5470. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  5471. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  5472. SCSI_SENSE_BUFFERSIZE));
  5473. else
  5474. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  5475. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  5476. SCSI_SENSE_BUFFERSIZE));
  5477. return 1;
  5478. }
  5479. /**
  5480. * ipr_erp_start - Process an error response for a SCSI op
  5481. * @ioa_cfg: ioa config struct
  5482. * @ipr_cmd: ipr command struct
  5483. *
  5484. * This function determines whether or not to initiate ERP
  5485. * on the affected device.
  5486. *
  5487. * Return value:
  5488. * nothing
  5489. **/
  5490. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  5491. struct ipr_cmnd *ipr_cmd)
  5492. {
  5493. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5494. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5495. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5496. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  5497. if (!res) {
  5498. ipr_scsi_eh_done(ipr_cmd);
  5499. return;
  5500. }
  5501. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  5502. ipr_gen_sense(ipr_cmd);
  5503. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5504. switch (masked_ioasc) {
  5505. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  5506. if (ipr_is_naca_model(res))
  5507. scsi_cmd->result |= (DID_ABORT << 16);
  5508. else
  5509. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5510. break;
  5511. case IPR_IOASC_IR_RESOURCE_HANDLE:
  5512. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  5513. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5514. break;
  5515. case IPR_IOASC_HW_SEL_TIMEOUT:
  5516. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5517. if (!ipr_is_naca_model(res))
  5518. res->needs_sync_complete = 1;
  5519. break;
  5520. case IPR_IOASC_SYNC_REQUIRED:
  5521. if (!res->in_erp)
  5522. res->needs_sync_complete = 1;
  5523. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5524. break;
  5525. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  5526. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  5527. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  5528. break;
  5529. case IPR_IOASC_BUS_WAS_RESET:
  5530. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  5531. /*
  5532. * Report the bus reset and ask for a retry. The device
  5533. * will give CC/UA the next command.
  5534. */
  5535. if (!res->resetting_device)
  5536. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  5537. scsi_cmd->result |= (DID_ERROR << 16);
  5538. if (!ipr_is_naca_model(res))
  5539. res->needs_sync_complete = 1;
  5540. break;
  5541. case IPR_IOASC_HW_DEV_BUS_STATUS:
  5542. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  5543. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  5544. if (!ipr_get_autosense(ipr_cmd)) {
  5545. if (!ipr_is_naca_model(res)) {
  5546. ipr_erp_cancel_all(ipr_cmd);
  5547. return;
  5548. }
  5549. }
  5550. }
  5551. if (!ipr_is_naca_model(res))
  5552. res->needs_sync_complete = 1;
  5553. break;
  5554. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5555. break;
  5556. case IPR_IOASC_IR_NON_OPTIMIZED:
  5557. if (res->raw_mode) {
  5558. res->raw_mode = 0;
  5559. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5560. } else
  5561. scsi_cmd->result |= (DID_ERROR << 16);
  5562. break;
  5563. default:
  5564. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5565. scsi_cmd->result |= (DID_ERROR << 16);
  5566. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5567. res->needs_sync_complete = 1;
  5568. break;
  5569. }
  5570. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5571. scsi_cmd->scsi_done(scsi_cmd);
  5572. if (ipr_cmd->eh_comp)
  5573. complete(ipr_cmd->eh_comp);
  5574. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5575. }
  5576. /**
  5577. * ipr_scsi_done - mid-layer done function
  5578. * @ipr_cmd: ipr command struct
  5579. *
  5580. * This function is invoked by the interrupt handler for
  5581. * ops generated by the SCSI mid-layer
  5582. *
  5583. * Return value:
  5584. * none
  5585. **/
  5586. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5587. {
  5588. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5589. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5590. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5591. unsigned long lock_flags;
  5592. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5593. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5594. scsi_dma_unmap(scsi_cmd);
  5595. spin_lock_irqsave(ipr_cmd->hrrq->lock, lock_flags);
  5596. scsi_cmd->scsi_done(scsi_cmd);
  5597. if (ipr_cmd->eh_comp)
  5598. complete(ipr_cmd->eh_comp);
  5599. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5600. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, lock_flags);
  5601. } else {
  5602. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5603. spin_lock(&ipr_cmd->hrrq->_lock);
  5604. ipr_erp_start(ioa_cfg, ipr_cmd);
  5605. spin_unlock(&ipr_cmd->hrrq->_lock);
  5606. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5607. }
  5608. }
  5609. /**
  5610. * ipr_queuecommand - Queue a mid-layer request
  5611. * @shost: scsi host struct
  5612. * @scsi_cmd: scsi command struct
  5613. *
  5614. * This function queues a request generated by the mid-layer.
  5615. *
  5616. * Return value:
  5617. * 0 on success
  5618. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5619. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5620. **/
  5621. static int ipr_queuecommand(struct Scsi_Host *shost,
  5622. struct scsi_cmnd *scsi_cmd)
  5623. {
  5624. struct ipr_ioa_cfg *ioa_cfg;
  5625. struct ipr_resource_entry *res;
  5626. struct ipr_ioarcb *ioarcb;
  5627. struct ipr_cmnd *ipr_cmd;
  5628. unsigned long hrrq_flags, lock_flags;
  5629. int rc;
  5630. struct ipr_hrr_queue *hrrq;
  5631. int hrrq_id;
  5632. ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  5633. scsi_cmd->result = (DID_OK << 16);
  5634. res = scsi_cmd->device->hostdata;
  5635. if (ipr_is_gata(res) && res->sata_port) {
  5636. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5637. rc = ata_sas_queuecmd(scsi_cmd, res->sata_port->ap);
  5638. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5639. return rc;
  5640. }
  5641. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5642. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5643. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5644. /*
  5645. * We are currently blocking all devices due to a host reset
  5646. * We have told the host to stop giving us new requests, but
  5647. * ERP ops don't count. FIXME
  5648. */
  5649. if (unlikely(!hrrq->allow_cmds && !hrrq->ioa_is_dead && !hrrq->removing_ioa)) {
  5650. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5651. return SCSI_MLQUEUE_HOST_BUSY;
  5652. }
  5653. /*
  5654. * FIXME - Create scsi_set_host_offline interface
  5655. * and the ioa_is_dead check can be removed
  5656. */
  5657. if (unlikely(hrrq->ioa_is_dead || hrrq->removing_ioa || !res)) {
  5658. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5659. goto err_nodev;
  5660. }
  5661. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5662. if (ipr_cmd == NULL) {
  5663. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5664. return SCSI_MLQUEUE_HOST_BUSY;
  5665. }
  5666. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5667. ipr_init_ipr_cmnd(ipr_cmd, ipr_scsi_done);
  5668. ioarcb = &ipr_cmd->ioarcb;
  5669. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5670. ipr_cmd->scsi_cmd = scsi_cmd;
  5671. ipr_cmd->done = ipr_scsi_eh_done;
  5672. if (ipr_is_gscsi(res)) {
  5673. if (scsi_cmd->underflow == 0)
  5674. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5675. if (res->reset_occurred) {
  5676. res->reset_occurred = 0;
  5677. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5678. }
  5679. }
  5680. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5681. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5682. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5683. if (scsi_cmd->flags & SCMD_TAGGED)
  5684. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_SIMPLE_TASK;
  5685. else
  5686. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_UNTAGGED_TASK;
  5687. }
  5688. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5689. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
  5690. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5691. }
  5692. if (res->raw_mode && ipr_is_af_dasd_device(res)) {
  5693. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_PIPE;
  5694. if (scsi_cmd->underflow == 0)
  5695. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5696. }
  5697. if (ioa_cfg->sis64)
  5698. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5699. else
  5700. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5701. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5702. if (unlikely(rc || (!hrrq->allow_cmds && !hrrq->ioa_is_dead))) {
  5703. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5704. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5705. if (!rc)
  5706. scsi_dma_unmap(scsi_cmd);
  5707. return SCSI_MLQUEUE_HOST_BUSY;
  5708. }
  5709. if (unlikely(hrrq->ioa_is_dead)) {
  5710. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5711. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5712. scsi_dma_unmap(scsi_cmd);
  5713. goto err_nodev;
  5714. }
  5715. ioarcb->res_handle = res->res_handle;
  5716. if (res->needs_sync_complete) {
  5717. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5718. res->needs_sync_complete = 0;
  5719. }
  5720. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_pending_q);
  5721. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5722. ipr_send_command(ipr_cmd);
  5723. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5724. return 0;
  5725. err_nodev:
  5726. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5727. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5728. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5729. scsi_cmd->scsi_done(scsi_cmd);
  5730. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5731. return 0;
  5732. }
  5733. /**
  5734. * ipr_ioctl - IOCTL handler
  5735. * @sdev: scsi device struct
  5736. * @cmd: IOCTL cmd
  5737. * @arg: IOCTL arg
  5738. *
  5739. * Return value:
  5740. * 0 on success / other on failure
  5741. **/
  5742. static int ipr_ioctl(struct scsi_device *sdev, int cmd, void __user *arg)
  5743. {
  5744. struct ipr_resource_entry *res;
  5745. res = (struct ipr_resource_entry *)sdev->hostdata;
  5746. if (res && ipr_is_gata(res)) {
  5747. if (cmd == HDIO_GET_IDENTITY)
  5748. return -ENOTTY;
  5749. return ata_sas_scsi_ioctl(res->sata_port->ap, sdev, cmd, arg);
  5750. }
  5751. return -EINVAL;
  5752. }
  5753. /**
  5754. * ipr_info - Get information about the card/driver
  5755. * @scsi_host: scsi host struct
  5756. *
  5757. * Return value:
  5758. * pointer to buffer with description string
  5759. **/
  5760. static const char *ipr_ioa_info(struct Scsi_Host *host)
  5761. {
  5762. static char buffer[512];
  5763. struct ipr_ioa_cfg *ioa_cfg;
  5764. unsigned long lock_flags = 0;
  5765. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5766. spin_lock_irqsave(host->host_lock, lock_flags);
  5767. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5768. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5769. return buffer;
  5770. }
  5771. static struct scsi_host_template driver_template = {
  5772. .module = THIS_MODULE,
  5773. .name = "IPR",
  5774. .info = ipr_ioa_info,
  5775. .ioctl = ipr_ioctl,
  5776. .queuecommand = ipr_queuecommand,
  5777. .eh_abort_handler = ipr_eh_abort,
  5778. .eh_device_reset_handler = ipr_eh_dev_reset,
  5779. .eh_host_reset_handler = ipr_eh_host_reset,
  5780. .slave_alloc = ipr_slave_alloc,
  5781. .slave_configure = ipr_slave_configure,
  5782. .slave_destroy = ipr_slave_destroy,
  5783. .scan_finished = ipr_scan_finished,
  5784. .target_alloc = ipr_target_alloc,
  5785. .target_destroy = ipr_target_destroy,
  5786. .change_queue_depth = ipr_change_queue_depth,
  5787. .bios_param = ipr_biosparam,
  5788. .can_queue = IPR_MAX_COMMANDS,
  5789. .this_id = -1,
  5790. .sg_tablesize = IPR_MAX_SGLIST,
  5791. .max_sectors = IPR_IOA_MAX_SECTORS,
  5792. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5793. .use_clustering = ENABLE_CLUSTERING,
  5794. .shost_attrs = ipr_ioa_attrs,
  5795. .sdev_attrs = ipr_dev_attrs,
  5796. .proc_name = IPR_NAME,
  5797. };
  5798. /**
  5799. * ipr_ata_phy_reset - libata phy_reset handler
  5800. * @ap: ata port to reset
  5801. *
  5802. **/
  5803. static void ipr_ata_phy_reset(struct ata_port *ap)
  5804. {
  5805. unsigned long flags;
  5806. struct ipr_sata_port *sata_port = ap->private_data;
  5807. struct ipr_resource_entry *res = sata_port->res;
  5808. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5809. int rc;
  5810. ENTER;
  5811. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5812. while (ioa_cfg->in_reset_reload) {
  5813. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5814. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5815. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5816. }
  5817. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5818. goto out_unlock;
  5819. rc = ipr_device_reset(ioa_cfg, res);
  5820. if (rc) {
  5821. ap->link.device[0].class = ATA_DEV_NONE;
  5822. goto out_unlock;
  5823. }
  5824. ap->link.device[0].class = res->ata_class;
  5825. if (ap->link.device[0].class == ATA_DEV_UNKNOWN)
  5826. ap->link.device[0].class = ATA_DEV_NONE;
  5827. out_unlock:
  5828. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5829. LEAVE;
  5830. }
  5831. /**
  5832. * ipr_ata_post_internal - Cleanup after an internal command
  5833. * @qc: ATA queued command
  5834. *
  5835. * Return value:
  5836. * none
  5837. **/
  5838. static void ipr_ata_post_internal(struct ata_queued_cmd *qc)
  5839. {
  5840. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5841. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5842. struct ipr_cmnd *ipr_cmd;
  5843. struct ipr_hrr_queue *hrrq;
  5844. unsigned long flags;
  5845. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5846. while (ioa_cfg->in_reset_reload) {
  5847. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5848. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5849. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5850. }
  5851. for_each_hrrq(hrrq, ioa_cfg) {
  5852. spin_lock(&hrrq->_lock);
  5853. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  5854. if (ipr_cmd->qc == qc) {
  5855. ipr_device_reset(ioa_cfg, sata_port->res);
  5856. break;
  5857. }
  5858. }
  5859. spin_unlock(&hrrq->_lock);
  5860. }
  5861. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5862. }
  5863. /**
  5864. * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure
  5865. * @regs: destination
  5866. * @tf: source ATA taskfile
  5867. *
  5868. * Return value:
  5869. * none
  5870. **/
  5871. static void ipr_copy_sata_tf(struct ipr_ioarcb_ata_regs *regs,
  5872. struct ata_taskfile *tf)
  5873. {
  5874. regs->feature = tf->feature;
  5875. regs->nsect = tf->nsect;
  5876. regs->lbal = tf->lbal;
  5877. regs->lbam = tf->lbam;
  5878. regs->lbah = tf->lbah;
  5879. regs->device = tf->device;
  5880. regs->command = tf->command;
  5881. regs->hob_feature = tf->hob_feature;
  5882. regs->hob_nsect = tf->hob_nsect;
  5883. regs->hob_lbal = tf->hob_lbal;
  5884. regs->hob_lbam = tf->hob_lbam;
  5885. regs->hob_lbah = tf->hob_lbah;
  5886. regs->ctl = tf->ctl;
  5887. }
  5888. /**
  5889. * ipr_sata_done - done function for SATA commands
  5890. * @ipr_cmd: ipr command struct
  5891. *
  5892. * This function is invoked by the interrupt handler for
  5893. * ops generated by the SCSI mid-layer to SATA devices
  5894. *
  5895. * Return value:
  5896. * none
  5897. **/
  5898. static void ipr_sata_done(struct ipr_cmnd *ipr_cmd)
  5899. {
  5900. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5901. struct ata_queued_cmd *qc = ipr_cmd->qc;
  5902. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5903. struct ipr_resource_entry *res = sata_port->res;
  5904. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5905. spin_lock(&ipr_cmd->hrrq->_lock);
  5906. if (ipr_cmd->ioa_cfg->sis64)
  5907. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  5908. sizeof(struct ipr_ioasa_gata));
  5909. else
  5910. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  5911. sizeof(struct ipr_ioasa_gata));
  5912. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5913. if (be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc_specific) & IPR_ATA_DEVICE_WAS_RESET)
  5914. scsi_report_device_reset(ioa_cfg->host, res->bus, res->target);
  5915. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5916. qc->err_mask |= __ac_err_mask(sata_port->ioasa.status);
  5917. else
  5918. qc->err_mask |= ac_err_mask(sata_port->ioasa.status);
  5919. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5920. spin_unlock(&ipr_cmd->hrrq->_lock);
  5921. ata_qc_complete(qc);
  5922. }
  5923. /**
  5924. * ipr_build_ata_ioadl64 - Build an ATA scatter/gather list
  5925. * @ipr_cmd: ipr command struct
  5926. * @qc: ATA queued command
  5927. *
  5928. **/
  5929. static void ipr_build_ata_ioadl64(struct ipr_cmnd *ipr_cmd,
  5930. struct ata_queued_cmd *qc)
  5931. {
  5932. u32 ioadl_flags = 0;
  5933. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5934. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ata_ioadl.ioadl64;
  5935. struct ipr_ioadl64_desc *last_ioadl64 = NULL;
  5936. int len = qc->nbytes;
  5937. struct scatterlist *sg;
  5938. unsigned int si;
  5939. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5940. if (len == 0)
  5941. return;
  5942. if (qc->dma_dir == DMA_TO_DEVICE) {
  5943. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5944. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5945. } else if (qc->dma_dir == DMA_FROM_DEVICE)
  5946. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5947. ioarcb->data_transfer_length = cpu_to_be32(len);
  5948. ioarcb->ioadl_len =
  5949. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5950. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5951. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ata_ioadl.ioadl64));
  5952. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5953. ioadl64->flags = cpu_to_be32(ioadl_flags);
  5954. ioadl64->data_len = cpu_to_be32(sg_dma_len(sg));
  5955. ioadl64->address = cpu_to_be64(sg_dma_address(sg));
  5956. last_ioadl64 = ioadl64;
  5957. ioadl64++;
  5958. }
  5959. if (likely(last_ioadl64))
  5960. last_ioadl64->flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5961. }
  5962. /**
  5963. * ipr_build_ata_ioadl - Build an ATA scatter/gather list
  5964. * @ipr_cmd: ipr command struct
  5965. * @qc: ATA queued command
  5966. *
  5967. **/
  5968. static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
  5969. struct ata_queued_cmd *qc)
  5970. {
  5971. u32 ioadl_flags = 0;
  5972. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5973. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5974. struct ipr_ioadl_desc *last_ioadl = NULL;
  5975. int len = qc->nbytes;
  5976. struct scatterlist *sg;
  5977. unsigned int si;
  5978. if (len == 0)
  5979. return;
  5980. if (qc->dma_dir == DMA_TO_DEVICE) {
  5981. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5982. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5983. ioarcb->data_transfer_length = cpu_to_be32(len);
  5984. ioarcb->ioadl_len =
  5985. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5986. } else if (qc->dma_dir == DMA_FROM_DEVICE) {
  5987. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5988. ioarcb->read_data_transfer_length = cpu_to_be32(len);
  5989. ioarcb->read_ioadl_len =
  5990. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5991. }
  5992. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5993. ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5994. ioadl->address = cpu_to_be32(sg_dma_address(sg));
  5995. last_ioadl = ioadl;
  5996. ioadl++;
  5997. }
  5998. if (likely(last_ioadl))
  5999. last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  6000. }
  6001. /**
  6002. * ipr_qc_defer - Get a free ipr_cmd
  6003. * @qc: queued command
  6004. *
  6005. * Return value:
  6006. * 0 if success
  6007. **/
  6008. static int ipr_qc_defer(struct ata_queued_cmd *qc)
  6009. {
  6010. struct ata_port *ap = qc->ap;
  6011. struct ipr_sata_port *sata_port = ap->private_data;
  6012. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  6013. struct ipr_cmnd *ipr_cmd;
  6014. struct ipr_hrr_queue *hrrq;
  6015. int hrrq_id;
  6016. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  6017. hrrq = &ioa_cfg->hrrq[hrrq_id];
  6018. qc->lldd_task = NULL;
  6019. spin_lock(&hrrq->_lock);
  6020. if (unlikely(hrrq->ioa_is_dead)) {
  6021. spin_unlock(&hrrq->_lock);
  6022. return 0;
  6023. }
  6024. if (unlikely(!hrrq->allow_cmds)) {
  6025. spin_unlock(&hrrq->_lock);
  6026. return ATA_DEFER_LINK;
  6027. }
  6028. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  6029. if (ipr_cmd == NULL) {
  6030. spin_unlock(&hrrq->_lock);
  6031. return ATA_DEFER_LINK;
  6032. }
  6033. qc->lldd_task = ipr_cmd;
  6034. spin_unlock(&hrrq->_lock);
  6035. return 0;
  6036. }
  6037. /**
  6038. * ipr_qc_issue - Issue a SATA qc to a device
  6039. * @qc: queued command
  6040. *
  6041. * Return value:
  6042. * 0 if success
  6043. **/
  6044. static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc)
  6045. {
  6046. struct ata_port *ap = qc->ap;
  6047. struct ipr_sata_port *sata_port = ap->private_data;
  6048. struct ipr_resource_entry *res = sata_port->res;
  6049. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  6050. struct ipr_cmnd *ipr_cmd;
  6051. struct ipr_ioarcb *ioarcb;
  6052. struct ipr_ioarcb_ata_regs *regs;
  6053. if (qc->lldd_task == NULL)
  6054. ipr_qc_defer(qc);
  6055. ipr_cmd = qc->lldd_task;
  6056. if (ipr_cmd == NULL)
  6057. return AC_ERR_SYSTEM;
  6058. qc->lldd_task = NULL;
  6059. spin_lock(&ipr_cmd->hrrq->_lock);
  6060. if (unlikely(!ipr_cmd->hrrq->allow_cmds ||
  6061. ipr_cmd->hrrq->ioa_is_dead)) {
  6062. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6063. spin_unlock(&ipr_cmd->hrrq->_lock);
  6064. return AC_ERR_SYSTEM;
  6065. }
  6066. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  6067. ioarcb = &ipr_cmd->ioarcb;
  6068. if (ioa_cfg->sis64) {
  6069. regs = &ipr_cmd->i.ata_ioadl.regs;
  6070. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  6071. } else
  6072. regs = &ioarcb->u.add_data.u.regs;
  6073. memset(regs, 0, sizeof(*regs));
  6074. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(*regs));
  6075. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6076. ipr_cmd->qc = qc;
  6077. ipr_cmd->done = ipr_sata_done;
  6078. ipr_cmd->ioarcb.res_handle = res->res_handle;
  6079. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_ATA_PASSTHRU;
  6080. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  6081. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  6082. ipr_cmd->dma_use_sg = qc->n_elem;
  6083. if (ioa_cfg->sis64)
  6084. ipr_build_ata_ioadl64(ipr_cmd, qc);
  6085. else
  6086. ipr_build_ata_ioadl(ipr_cmd, qc);
  6087. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  6088. ipr_copy_sata_tf(regs, &qc->tf);
  6089. memcpy(ioarcb->cmd_pkt.cdb, qc->cdb, IPR_MAX_CDB_LEN);
  6090. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  6091. switch (qc->tf.protocol) {
  6092. case ATA_PROT_NODATA:
  6093. case ATA_PROT_PIO:
  6094. break;
  6095. case ATA_PROT_DMA:
  6096. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  6097. break;
  6098. case ATAPI_PROT_PIO:
  6099. case ATAPI_PROT_NODATA:
  6100. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  6101. break;
  6102. case ATAPI_PROT_DMA:
  6103. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  6104. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  6105. break;
  6106. default:
  6107. WARN_ON(1);
  6108. spin_unlock(&ipr_cmd->hrrq->_lock);
  6109. return AC_ERR_INVALID;
  6110. }
  6111. ipr_send_command(ipr_cmd);
  6112. spin_unlock(&ipr_cmd->hrrq->_lock);
  6113. return 0;
  6114. }
  6115. /**
  6116. * ipr_qc_fill_rtf - Read result TF
  6117. * @qc: ATA queued command
  6118. *
  6119. * Return value:
  6120. * true
  6121. **/
  6122. static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
  6123. {
  6124. struct ipr_sata_port *sata_port = qc->ap->private_data;
  6125. struct ipr_ioasa_gata *g = &sata_port->ioasa;
  6126. struct ata_taskfile *tf = &qc->result_tf;
  6127. tf->feature = g->error;
  6128. tf->nsect = g->nsect;
  6129. tf->lbal = g->lbal;
  6130. tf->lbam = g->lbam;
  6131. tf->lbah = g->lbah;
  6132. tf->device = g->device;
  6133. tf->command = g->status;
  6134. tf->hob_nsect = g->hob_nsect;
  6135. tf->hob_lbal = g->hob_lbal;
  6136. tf->hob_lbam = g->hob_lbam;
  6137. tf->hob_lbah = g->hob_lbah;
  6138. return true;
  6139. }
  6140. static struct ata_port_operations ipr_sata_ops = {
  6141. .phy_reset = ipr_ata_phy_reset,
  6142. .hardreset = ipr_sata_reset,
  6143. .post_internal_cmd = ipr_ata_post_internal,
  6144. .qc_prep = ata_noop_qc_prep,
  6145. .qc_defer = ipr_qc_defer,
  6146. .qc_issue = ipr_qc_issue,
  6147. .qc_fill_rtf = ipr_qc_fill_rtf,
  6148. .port_start = ata_sas_port_start,
  6149. .port_stop = ata_sas_port_stop
  6150. };
  6151. static struct ata_port_info sata_port_info = {
  6152. .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA |
  6153. ATA_FLAG_SAS_HOST,
  6154. .pio_mask = ATA_PIO4_ONLY,
  6155. .mwdma_mask = ATA_MWDMA2,
  6156. .udma_mask = ATA_UDMA6,
  6157. .port_ops = &ipr_sata_ops
  6158. };
  6159. #ifdef CONFIG_PPC_PSERIES
  6160. static const u16 ipr_blocked_processors[] = {
  6161. PVR_NORTHSTAR,
  6162. PVR_PULSAR,
  6163. PVR_POWER4,
  6164. PVR_ICESTAR,
  6165. PVR_SSTAR,
  6166. PVR_POWER4p,
  6167. PVR_630,
  6168. PVR_630p
  6169. };
  6170. /**
  6171. * ipr_invalid_adapter - Determine if this adapter is supported on this hardware
  6172. * @ioa_cfg: ioa cfg struct
  6173. *
  6174. * Adapters that use Gemstone revision < 3.1 do not work reliably on
  6175. * certain pSeries hardware. This function determines if the given
  6176. * adapter is in one of these confgurations or not.
  6177. *
  6178. * Return value:
  6179. * 1 if adapter is not supported / 0 if adapter is supported
  6180. **/
  6181. static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg)
  6182. {
  6183. int i;
  6184. if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) {
  6185. for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++) {
  6186. if (pvr_version_is(ipr_blocked_processors[i]))
  6187. return 1;
  6188. }
  6189. }
  6190. return 0;
  6191. }
  6192. #else
  6193. #define ipr_invalid_adapter(ioa_cfg) 0
  6194. #endif
  6195. /**
  6196. * ipr_ioa_bringdown_done - IOA bring down completion.
  6197. * @ipr_cmd: ipr command struct
  6198. *
  6199. * This function processes the completion of an adapter bring down.
  6200. * It wakes any reset sleepers.
  6201. *
  6202. * Return value:
  6203. * IPR_RC_JOB_RETURN
  6204. **/
  6205. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  6206. {
  6207. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6208. int i;
  6209. ENTER;
  6210. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  6211. ipr_trace;
  6212. spin_unlock_irq(ioa_cfg->host->host_lock);
  6213. scsi_unblock_requests(ioa_cfg->host);
  6214. spin_lock_irq(ioa_cfg->host->host_lock);
  6215. }
  6216. ioa_cfg->in_reset_reload = 0;
  6217. ioa_cfg->reset_retries = 0;
  6218. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  6219. spin_lock(&ioa_cfg->hrrq[i]._lock);
  6220. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  6221. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  6222. }
  6223. wmb();
  6224. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6225. wake_up_all(&ioa_cfg->reset_wait_q);
  6226. LEAVE;
  6227. return IPR_RC_JOB_RETURN;
  6228. }
  6229. /**
  6230. * ipr_ioa_reset_done - IOA reset completion.
  6231. * @ipr_cmd: ipr command struct
  6232. *
  6233. * This function processes the completion of an adapter reset.
  6234. * It schedules any necessary mid-layer add/removes and
  6235. * wakes any reset sleepers.
  6236. *
  6237. * Return value:
  6238. * IPR_RC_JOB_RETURN
  6239. **/
  6240. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  6241. {
  6242. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6243. struct ipr_resource_entry *res;
  6244. int j;
  6245. ENTER;
  6246. ioa_cfg->in_reset_reload = 0;
  6247. for (j = 0; j < ioa_cfg->hrrq_num; j++) {
  6248. spin_lock(&ioa_cfg->hrrq[j]._lock);
  6249. ioa_cfg->hrrq[j].allow_cmds = 1;
  6250. spin_unlock(&ioa_cfg->hrrq[j]._lock);
  6251. }
  6252. wmb();
  6253. ioa_cfg->reset_cmd = NULL;
  6254. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  6255. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  6256. if (res->add_to_ml || res->del_from_ml) {
  6257. ipr_trace;
  6258. break;
  6259. }
  6260. }
  6261. schedule_work(&ioa_cfg->work_q);
  6262. for (j = 0; j < IPR_NUM_HCAMS; j++) {
  6263. list_del_init(&ioa_cfg->hostrcb[j]->queue);
  6264. if (j < IPR_NUM_LOG_HCAMS)
  6265. ipr_send_hcam(ioa_cfg,
  6266. IPR_HCAM_CDB_OP_CODE_LOG_DATA,
  6267. ioa_cfg->hostrcb[j]);
  6268. else
  6269. ipr_send_hcam(ioa_cfg,
  6270. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  6271. ioa_cfg->hostrcb[j]);
  6272. }
  6273. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  6274. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  6275. ioa_cfg->reset_retries = 0;
  6276. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6277. wake_up_all(&ioa_cfg->reset_wait_q);
  6278. spin_unlock(ioa_cfg->host->host_lock);
  6279. scsi_unblock_requests(ioa_cfg->host);
  6280. spin_lock(ioa_cfg->host->host_lock);
  6281. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  6282. scsi_block_requests(ioa_cfg->host);
  6283. schedule_work(&ioa_cfg->work_q);
  6284. LEAVE;
  6285. return IPR_RC_JOB_RETURN;
  6286. }
  6287. /**
  6288. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  6289. * @supported_dev: supported device struct
  6290. * @vpids: vendor product id struct
  6291. *
  6292. * Return value:
  6293. * none
  6294. **/
  6295. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  6296. struct ipr_std_inq_vpids *vpids)
  6297. {
  6298. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  6299. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  6300. supported_dev->num_records = 1;
  6301. supported_dev->data_length =
  6302. cpu_to_be16(sizeof(struct ipr_supported_device));
  6303. supported_dev->reserved = 0;
  6304. }
  6305. /**
  6306. * ipr_set_supported_devs - Send Set Supported Devices for a device
  6307. * @ipr_cmd: ipr command struct
  6308. *
  6309. * This function sends a Set Supported Devices to the adapter
  6310. *
  6311. * Return value:
  6312. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6313. **/
  6314. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  6315. {
  6316. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6317. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  6318. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6319. struct ipr_resource_entry *res = ipr_cmd->u.res;
  6320. ipr_cmd->job_step = ipr_ioa_reset_done;
  6321. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  6322. if (!ipr_is_scsi_disk(res))
  6323. continue;
  6324. ipr_cmd->u.res = res;
  6325. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  6326. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6327. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6328. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6329. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  6330. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  6331. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  6332. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  6333. ipr_init_ioadl(ipr_cmd,
  6334. ioa_cfg->vpd_cbs_dma +
  6335. offsetof(struct ipr_misc_cbs, supp_dev),
  6336. sizeof(struct ipr_supported_device),
  6337. IPR_IOADL_FLAGS_WRITE_LAST);
  6338. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6339. IPR_SET_SUP_DEVICE_TIMEOUT);
  6340. if (!ioa_cfg->sis64)
  6341. ipr_cmd->job_step = ipr_set_supported_devs;
  6342. LEAVE;
  6343. return IPR_RC_JOB_RETURN;
  6344. }
  6345. LEAVE;
  6346. return IPR_RC_JOB_CONTINUE;
  6347. }
  6348. /**
  6349. * ipr_get_mode_page - Locate specified mode page
  6350. * @mode_pages: mode page buffer
  6351. * @page_code: page code to find
  6352. * @len: minimum required length for mode page
  6353. *
  6354. * Return value:
  6355. * pointer to mode page / NULL on failure
  6356. **/
  6357. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  6358. u32 page_code, u32 len)
  6359. {
  6360. struct ipr_mode_page_hdr *mode_hdr;
  6361. u32 page_length;
  6362. u32 length;
  6363. if (!mode_pages || (mode_pages->hdr.length == 0))
  6364. return NULL;
  6365. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  6366. mode_hdr = (struct ipr_mode_page_hdr *)
  6367. (mode_pages->data + mode_pages->hdr.block_desc_len);
  6368. while (length) {
  6369. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  6370. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  6371. return mode_hdr;
  6372. break;
  6373. } else {
  6374. page_length = (sizeof(struct ipr_mode_page_hdr) +
  6375. mode_hdr->page_length);
  6376. length -= page_length;
  6377. mode_hdr = (struct ipr_mode_page_hdr *)
  6378. ((unsigned long)mode_hdr + page_length);
  6379. }
  6380. }
  6381. return NULL;
  6382. }
  6383. /**
  6384. * ipr_check_term_power - Check for term power errors
  6385. * @ioa_cfg: ioa config struct
  6386. * @mode_pages: IOAFP mode pages buffer
  6387. *
  6388. * Check the IOAFP's mode page 28 for term power errors
  6389. *
  6390. * Return value:
  6391. * nothing
  6392. **/
  6393. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  6394. struct ipr_mode_pages *mode_pages)
  6395. {
  6396. int i;
  6397. int entry_length;
  6398. struct ipr_dev_bus_entry *bus;
  6399. struct ipr_mode_page28 *mode_page;
  6400. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6401. sizeof(struct ipr_mode_page28));
  6402. entry_length = mode_page->entry_length;
  6403. bus = mode_page->bus;
  6404. for (i = 0; i < mode_page->num_entries; i++) {
  6405. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  6406. dev_err(&ioa_cfg->pdev->dev,
  6407. "Term power is absent on scsi bus %d\n",
  6408. bus->res_addr.bus);
  6409. }
  6410. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  6411. }
  6412. }
  6413. /**
  6414. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  6415. * @ioa_cfg: ioa config struct
  6416. *
  6417. * Looks through the config table checking for SES devices. If
  6418. * the SES device is in the SES table indicating a maximum SCSI
  6419. * bus speed, the speed is limited for the bus.
  6420. *
  6421. * Return value:
  6422. * none
  6423. **/
  6424. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  6425. {
  6426. u32 max_xfer_rate;
  6427. int i;
  6428. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  6429. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  6430. ioa_cfg->bus_attr[i].bus_width);
  6431. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  6432. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  6433. }
  6434. }
  6435. /**
  6436. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  6437. * @ioa_cfg: ioa config struct
  6438. * @mode_pages: mode page 28 buffer
  6439. *
  6440. * Updates mode page 28 based on driver configuration
  6441. *
  6442. * Return value:
  6443. * none
  6444. **/
  6445. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  6446. struct ipr_mode_pages *mode_pages)
  6447. {
  6448. int i, entry_length;
  6449. struct ipr_dev_bus_entry *bus;
  6450. struct ipr_bus_attributes *bus_attr;
  6451. struct ipr_mode_page28 *mode_page;
  6452. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6453. sizeof(struct ipr_mode_page28));
  6454. entry_length = mode_page->entry_length;
  6455. /* Loop for each device bus entry */
  6456. for (i = 0, bus = mode_page->bus;
  6457. i < mode_page->num_entries;
  6458. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  6459. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  6460. dev_err(&ioa_cfg->pdev->dev,
  6461. "Invalid resource address reported: 0x%08X\n",
  6462. IPR_GET_PHYS_LOC(bus->res_addr));
  6463. continue;
  6464. }
  6465. bus_attr = &ioa_cfg->bus_attr[i];
  6466. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  6467. bus->bus_width = bus_attr->bus_width;
  6468. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  6469. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  6470. if (bus_attr->qas_enabled)
  6471. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  6472. else
  6473. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  6474. }
  6475. }
  6476. /**
  6477. * ipr_build_mode_select - Build a mode select command
  6478. * @ipr_cmd: ipr command struct
  6479. * @res_handle: resource handle to send command to
  6480. * @parm: Byte 2 of Mode Sense command
  6481. * @dma_addr: DMA buffer address
  6482. * @xfer_len: data transfer length
  6483. *
  6484. * Return value:
  6485. * none
  6486. **/
  6487. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  6488. __be32 res_handle, u8 parm,
  6489. dma_addr_t dma_addr, u8 xfer_len)
  6490. {
  6491. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6492. ioarcb->res_handle = res_handle;
  6493. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6494. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6495. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  6496. ioarcb->cmd_pkt.cdb[1] = parm;
  6497. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6498. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  6499. }
  6500. /**
  6501. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  6502. * @ipr_cmd: ipr command struct
  6503. *
  6504. * This function sets up the SCSI bus attributes and sends
  6505. * a Mode Select for Page 28 to activate them.
  6506. *
  6507. * Return value:
  6508. * IPR_RC_JOB_RETURN
  6509. **/
  6510. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  6511. {
  6512. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6513. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6514. int length;
  6515. ENTER;
  6516. ipr_scsi_bus_speed_limit(ioa_cfg);
  6517. ipr_check_term_power(ioa_cfg, mode_pages);
  6518. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  6519. length = mode_pages->hdr.length + 1;
  6520. mode_pages->hdr.length = 0;
  6521. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6522. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6523. length);
  6524. ipr_cmd->job_step = ipr_set_supported_devs;
  6525. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6526. struct ipr_resource_entry, queue);
  6527. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6528. LEAVE;
  6529. return IPR_RC_JOB_RETURN;
  6530. }
  6531. /**
  6532. * ipr_build_mode_sense - Builds a mode sense command
  6533. * @ipr_cmd: ipr command struct
  6534. * @res: resource entry struct
  6535. * @parm: Byte 2 of mode sense command
  6536. * @dma_addr: DMA address of mode sense buffer
  6537. * @xfer_len: Size of DMA buffer
  6538. *
  6539. * Return value:
  6540. * none
  6541. **/
  6542. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  6543. __be32 res_handle,
  6544. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  6545. {
  6546. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6547. ioarcb->res_handle = res_handle;
  6548. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  6549. ioarcb->cmd_pkt.cdb[2] = parm;
  6550. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6551. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6552. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6553. }
  6554. /**
  6555. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  6556. * @ipr_cmd: ipr command struct
  6557. *
  6558. * This function handles the failure of an IOA bringup command.
  6559. *
  6560. * Return value:
  6561. * IPR_RC_JOB_RETURN
  6562. **/
  6563. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  6564. {
  6565. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6566. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6567. dev_err(&ioa_cfg->pdev->dev,
  6568. "0x%02X failed with IOASC: 0x%08X\n",
  6569. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  6570. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6571. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6572. return IPR_RC_JOB_RETURN;
  6573. }
  6574. /**
  6575. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  6576. * @ipr_cmd: ipr command struct
  6577. *
  6578. * This function handles the failure of a Mode Sense to the IOAFP.
  6579. * Some adapters do not handle all mode pages.
  6580. *
  6581. * Return value:
  6582. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6583. **/
  6584. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  6585. {
  6586. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6587. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6588. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6589. ipr_cmd->job_step = ipr_set_supported_devs;
  6590. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6591. struct ipr_resource_entry, queue);
  6592. return IPR_RC_JOB_CONTINUE;
  6593. }
  6594. return ipr_reset_cmd_failed(ipr_cmd);
  6595. }
  6596. /**
  6597. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  6598. * @ipr_cmd: ipr command struct
  6599. *
  6600. * This function send a Page 28 mode sense to the IOA to
  6601. * retrieve SCSI bus attributes.
  6602. *
  6603. * Return value:
  6604. * IPR_RC_JOB_RETURN
  6605. **/
  6606. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  6607. {
  6608. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6609. ENTER;
  6610. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6611. 0x28, ioa_cfg->vpd_cbs_dma +
  6612. offsetof(struct ipr_misc_cbs, mode_pages),
  6613. sizeof(struct ipr_mode_pages));
  6614. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  6615. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  6616. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6617. LEAVE;
  6618. return IPR_RC_JOB_RETURN;
  6619. }
  6620. /**
  6621. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  6622. * @ipr_cmd: ipr command struct
  6623. *
  6624. * This function enables dual IOA RAID support if possible.
  6625. *
  6626. * Return value:
  6627. * IPR_RC_JOB_RETURN
  6628. **/
  6629. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  6630. {
  6631. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6632. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6633. struct ipr_mode_page24 *mode_page;
  6634. int length;
  6635. ENTER;
  6636. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  6637. sizeof(struct ipr_mode_page24));
  6638. if (mode_page)
  6639. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  6640. length = mode_pages->hdr.length + 1;
  6641. mode_pages->hdr.length = 0;
  6642. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6643. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6644. length);
  6645. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6646. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6647. LEAVE;
  6648. return IPR_RC_JOB_RETURN;
  6649. }
  6650. /**
  6651. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  6652. * @ipr_cmd: ipr command struct
  6653. *
  6654. * This function handles the failure of a Mode Sense to the IOAFP.
  6655. * Some adapters do not handle all mode pages.
  6656. *
  6657. * Return value:
  6658. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6659. **/
  6660. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  6661. {
  6662. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6663. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6664. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6665. return IPR_RC_JOB_CONTINUE;
  6666. }
  6667. return ipr_reset_cmd_failed(ipr_cmd);
  6668. }
  6669. /**
  6670. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  6671. * @ipr_cmd: ipr command struct
  6672. *
  6673. * This function send a mode sense to the IOA to retrieve
  6674. * the IOA Advanced Function Control mode page.
  6675. *
  6676. * Return value:
  6677. * IPR_RC_JOB_RETURN
  6678. **/
  6679. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  6680. {
  6681. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6682. ENTER;
  6683. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6684. 0x24, ioa_cfg->vpd_cbs_dma +
  6685. offsetof(struct ipr_misc_cbs, mode_pages),
  6686. sizeof(struct ipr_mode_pages));
  6687. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  6688. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  6689. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6690. LEAVE;
  6691. return IPR_RC_JOB_RETURN;
  6692. }
  6693. /**
  6694. * ipr_init_res_table - Initialize the resource table
  6695. * @ipr_cmd: ipr command struct
  6696. *
  6697. * This function looks through the existing resource table, comparing
  6698. * it with the config table. This function will take care of old/new
  6699. * devices and schedule adding/removing them from the mid-layer
  6700. * as appropriate.
  6701. *
  6702. * Return value:
  6703. * IPR_RC_JOB_CONTINUE
  6704. **/
  6705. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6706. {
  6707. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6708. struct ipr_resource_entry *res, *temp;
  6709. struct ipr_config_table_entry_wrapper cfgtew;
  6710. int entries, found, flag, i;
  6711. LIST_HEAD(old_res);
  6712. ENTER;
  6713. if (ioa_cfg->sis64)
  6714. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6715. else
  6716. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6717. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6718. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6719. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6720. list_move_tail(&res->queue, &old_res);
  6721. if (ioa_cfg->sis64)
  6722. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6723. else
  6724. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6725. for (i = 0; i < entries; i++) {
  6726. if (ioa_cfg->sis64)
  6727. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6728. else
  6729. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6730. found = 0;
  6731. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6732. if (ipr_is_same_device(res, &cfgtew)) {
  6733. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6734. found = 1;
  6735. break;
  6736. }
  6737. }
  6738. if (!found) {
  6739. if (list_empty(&ioa_cfg->free_res_q)) {
  6740. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6741. break;
  6742. }
  6743. found = 1;
  6744. res = list_entry(ioa_cfg->free_res_q.next,
  6745. struct ipr_resource_entry, queue);
  6746. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6747. ipr_init_res_entry(res, &cfgtew);
  6748. res->add_to_ml = 1;
  6749. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6750. res->sdev->allow_restart = 1;
  6751. if (found)
  6752. ipr_update_res_entry(res, &cfgtew);
  6753. }
  6754. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6755. if (res->sdev) {
  6756. res->del_from_ml = 1;
  6757. res->res_handle = IPR_INVALID_RES_HANDLE;
  6758. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6759. }
  6760. }
  6761. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6762. ipr_clear_res_target(res);
  6763. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6764. }
  6765. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6766. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6767. else
  6768. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6769. LEAVE;
  6770. return IPR_RC_JOB_CONTINUE;
  6771. }
  6772. /**
  6773. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6774. * @ipr_cmd: ipr command struct
  6775. *
  6776. * This function sends a Query IOA Configuration command
  6777. * to the adapter to retrieve the IOA configuration table.
  6778. *
  6779. * Return value:
  6780. * IPR_RC_JOB_RETURN
  6781. **/
  6782. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6783. {
  6784. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6785. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6786. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6787. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6788. ENTER;
  6789. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6790. ioa_cfg->dual_raid = 1;
  6791. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6792. ucode_vpd->major_release, ucode_vpd->card_type,
  6793. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6794. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6795. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6796. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6797. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6798. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6799. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6800. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6801. IPR_IOADL_FLAGS_READ_LAST);
  6802. ipr_cmd->job_step = ipr_init_res_table;
  6803. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6804. LEAVE;
  6805. return IPR_RC_JOB_RETURN;
  6806. }
  6807. static int ipr_ioa_service_action_failed(struct ipr_cmnd *ipr_cmd)
  6808. {
  6809. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6810. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT)
  6811. return IPR_RC_JOB_CONTINUE;
  6812. return ipr_reset_cmd_failed(ipr_cmd);
  6813. }
  6814. static void ipr_build_ioa_service_action(struct ipr_cmnd *ipr_cmd,
  6815. __be32 res_handle, u8 sa_code)
  6816. {
  6817. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6818. ioarcb->res_handle = res_handle;
  6819. ioarcb->cmd_pkt.cdb[0] = IPR_IOA_SERVICE_ACTION;
  6820. ioarcb->cmd_pkt.cdb[1] = sa_code;
  6821. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6822. }
  6823. /**
  6824. * ipr_ioafp_set_caching_parameters - Issue Set Cache parameters service
  6825. * action
  6826. *
  6827. * Return value:
  6828. * none
  6829. **/
  6830. static int ipr_ioafp_set_caching_parameters(struct ipr_cmnd *ipr_cmd)
  6831. {
  6832. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6833. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6834. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  6835. ENTER;
  6836. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6837. if (pageC4->cache_cap[0] & IPR_CAP_SYNC_CACHE) {
  6838. ipr_build_ioa_service_action(ipr_cmd,
  6839. cpu_to_be32(IPR_IOA_RES_HANDLE),
  6840. IPR_IOA_SA_CHANGE_CACHE_PARAMS);
  6841. ioarcb->cmd_pkt.cdb[2] = 0x40;
  6842. ipr_cmd->job_step_failed = ipr_ioa_service_action_failed;
  6843. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6844. IPR_SET_SUP_DEVICE_TIMEOUT);
  6845. LEAVE;
  6846. return IPR_RC_JOB_RETURN;
  6847. }
  6848. LEAVE;
  6849. return IPR_RC_JOB_CONTINUE;
  6850. }
  6851. /**
  6852. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6853. * @ipr_cmd: ipr command struct
  6854. *
  6855. * This utility function sends an inquiry to the adapter.
  6856. *
  6857. * Return value:
  6858. * none
  6859. **/
  6860. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6861. dma_addr_t dma_addr, u8 xfer_len)
  6862. {
  6863. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6864. ENTER;
  6865. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6866. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6867. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  6868. ioarcb->cmd_pkt.cdb[1] = flags;
  6869. ioarcb->cmd_pkt.cdb[2] = page;
  6870. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6871. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6872. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6873. LEAVE;
  6874. }
  6875. /**
  6876. * ipr_inquiry_page_supported - Is the given inquiry page supported
  6877. * @page0: inquiry page 0 buffer
  6878. * @page: page code.
  6879. *
  6880. * This function determines if the specified inquiry page is supported.
  6881. *
  6882. * Return value:
  6883. * 1 if page is supported / 0 if not
  6884. **/
  6885. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  6886. {
  6887. int i;
  6888. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  6889. if (page0->page[i] == page)
  6890. return 1;
  6891. return 0;
  6892. }
  6893. /**
  6894. * ipr_ioafp_pageC4_inquiry - Send a Page 0xC4 Inquiry to the adapter.
  6895. * @ipr_cmd: ipr command struct
  6896. *
  6897. * This function sends a Page 0xC4 inquiry to the adapter
  6898. * to retrieve software VPD information.
  6899. *
  6900. * Return value:
  6901. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6902. **/
  6903. static int ipr_ioafp_pageC4_inquiry(struct ipr_cmnd *ipr_cmd)
  6904. {
  6905. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6906. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6907. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  6908. ENTER;
  6909. ipr_cmd->job_step = ipr_ioafp_set_caching_parameters;
  6910. memset(pageC4, 0, sizeof(*pageC4));
  6911. if (ipr_inquiry_page_supported(page0, 0xC4)) {
  6912. ipr_ioafp_inquiry(ipr_cmd, 1, 0xC4,
  6913. (ioa_cfg->vpd_cbs_dma
  6914. + offsetof(struct ipr_misc_cbs,
  6915. pageC4_data)),
  6916. sizeof(struct ipr_inquiry_pageC4));
  6917. return IPR_RC_JOB_RETURN;
  6918. }
  6919. LEAVE;
  6920. return IPR_RC_JOB_CONTINUE;
  6921. }
  6922. /**
  6923. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  6924. * @ipr_cmd: ipr command struct
  6925. *
  6926. * This function sends a Page 0xD0 inquiry to the adapter
  6927. * to retrieve adapter capabilities.
  6928. *
  6929. * Return value:
  6930. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6931. **/
  6932. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  6933. {
  6934. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6935. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6936. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6937. ENTER;
  6938. ipr_cmd->job_step = ipr_ioafp_pageC4_inquiry;
  6939. memset(cap, 0, sizeof(*cap));
  6940. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  6941. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  6942. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  6943. sizeof(struct ipr_inquiry_cap));
  6944. return IPR_RC_JOB_RETURN;
  6945. }
  6946. LEAVE;
  6947. return IPR_RC_JOB_CONTINUE;
  6948. }
  6949. /**
  6950. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  6951. * @ipr_cmd: ipr command struct
  6952. *
  6953. * This function sends a Page 3 inquiry to the adapter
  6954. * to retrieve software VPD information.
  6955. *
  6956. * Return value:
  6957. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6958. **/
  6959. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  6960. {
  6961. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6962. ENTER;
  6963. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  6964. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  6965. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  6966. sizeof(struct ipr_inquiry_page3));
  6967. LEAVE;
  6968. return IPR_RC_JOB_RETURN;
  6969. }
  6970. /**
  6971. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  6972. * @ipr_cmd: ipr command struct
  6973. *
  6974. * This function sends a Page 0 inquiry to the adapter
  6975. * to retrieve supported inquiry pages.
  6976. *
  6977. * Return value:
  6978. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6979. **/
  6980. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  6981. {
  6982. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6983. char type[5];
  6984. ENTER;
  6985. /* Grab the type out of the VPD and store it away */
  6986. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  6987. type[4] = '\0';
  6988. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  6989. if (ipr_invalid_adapter(ioa_cfg)) {
  6990. dev_err(&ioa_cfg->pdev->dev,
  6991. "Adapter not supported in this hardware configuration.\n");
  6992. if (!ipr_testmode) {
  6993. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  6994. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6995. list_add_tail(&ipr_cmd->queue,
  6996. &ioa_cfg->hrrq->hrrq_free_q);
  6997. return IPR_RC_JOB_RETURN;
  6998. }
  6999. }
  7000. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  7001. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  7002. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  7003. sizeof(struct ipr_inquiry_page0));
  7004. LEAVE;
  7005. return IPR_RC_JOB_RETURN;
  7006. }
  7007. /**
  7008. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  7009. * @ipr_cmd: ipr command struct
  7010. *
  7011. * This function sends a standard inquiry to the adapter.
  7012. *
  7013. * Return value:
  7014. * IPR_RC_JOB_RETURN
  7015. **/
  7016. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  7017. {
  7018. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7019. ENTER;
  7020. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  7021. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  7022. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  7023. sizeof(struct ipr_ioa_vpd));
  7024. LEAVE;
  7025. return IPR_RC_JOB_RETURN;
  7026. }
  7027. /**
  7028. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  7029. * @ipr_cmd: ipr command struct
  7030. *
  7031. * This function send an Identify Host Request Response Queue
  7032. * command to establish the HRRQ with the adapter.
  7033. *
  7034. * Return value:
  7035. * IPR_RC_JOB_RETURN
  7036. **/
  7037. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  7038. {
  7039. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7040. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  7041. struct ipr_hrr_queue *hrrq;
  7042. ENTER;
  7043. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  7044. if (ioa_cfg->identify_hrrq_index == 0)
  7045. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  7046. if (ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num) {
  7047. hrrq = &ioa_cfg->hrrq[ioa_cfg->identify_hrrq_index];
  7048. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  7049. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7050. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7051. if (ioa_cfg->sis64)
  7052. ioarcb->cmd_pkt.cdb[1] = 0x1;
  7053. if (ioa_cfg->nvectors == 1)
  7054. ioarcb->cmd_pkt.cdb[1] &= ~IPR_ID_HRRQ_SELE_ENABLE;
  7055. else
  7056. ioarcb->cmd_pkt.cdb[1] |= IPR_ID_HRRQ_SELE_ENABLE;
  7057. ioarcb->cmd_pkt.cdb[2] =
  7058. ((u64) hrrq->host_rrq_dma >> 24) & 0xff;
  7059. ioarcb->cmd_pkt.cdb[3] =
  7060. ((u64) hrrq->host_rrq_dma >> 16) & 0xff;
  7061. ioarcb->cmd_pkt.cdb[4] =
  7062. ((u64) hrrq->host_rrq_dma >> 8) & 0xff;
  7063. ioarcb->cmd_pkt.cdb[5] =
  7064. ((u64) hrrq->host_rrq_dma) & 0xff;
  7065. ioarcb->cmd_pkt.cdb[7] =
  7066. ((sizeof(u32) * hrrq->size) >> 8) & 0xff;
  7067. ioarcb->cmd_pkt.cdb[8] =
  7068. (sizeof(u32) * hrrq->size) & 0xff;
  7069. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  7070. ioarcb->cmd_pkt.cdb[9] =
  7071. ioa_cfg->identify_hrrq_index;
  7072. if (ioa_cfg->sis64) {
  7073. ioarcb->cmd_pkt.cdb[10] =
  7074. ((u64) hrrq->host_rrq_dma >> 56) & 0xff;
  7075. ioarcb->cmd_pkt.cdb[11] =
  7076. ((u64) hrrq->host_rrq_dma >> 48) & 0xff;
  7077. ioarcb->cmd_pkt.cdb[12] =
  7078. ((u64) hrrq->host_rrq_dma >> 40) & 0xff;
  7079. ioarcb->cmd_pkt.cdb[13] =
  7080. ((u64) hrrq->host_rrq_dma >> 32) & 0xff;
  7081. }
  7082. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  7083. ioarcb->cmd_pkt.cdb[14] =
  7084. ioa_cfg->identify_hrrq_index;
  7085. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7086. IPR_INTERNAL_TIMEOUT);
  7087. if (++ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num)
  7088. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7089. LEAVE;
  7090. return IPR_RC_JOB_RETURN;
  7091. }
  7092. LEAVE;
  7093. return IPR_RC_JOB_CONTINUE;
  7094. }
  7095. /**
  7096. * ipr_reset_timer_done - Adapter reset timer function
  7097. * @ipr_cmd: ipr command struct
  7098. *
  7099. * Description: This function is used in adapter reset processing
  7100. * for timing events. If the reset_cmd pointer in the IOA
  7101. * config struct is not this adapter's we are doing nested
  7102. * resets and fail_all_ops will take care of freeing the
  7103. * command block.
  7104. *
  7105. * Return value:
  7106. * none
  7107. **/
  7108. static void ipr_reset_timer_done(struct ipr_cmnd *ipr_cmd)
  7109. {
  7110. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7111. unsigned long lock_flags = 0;
  7112. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7113. if (ioa_cfg->reset_cmd == ipr_cmd) {
  7114. list_del(&ipr_cmd->queue);
  7115. ipr_cmd->done(ipr_cmd);
  7116. }
  7117. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7118. }
  7119. /**
  7120. * ipr_reset_start_timer - Start a timer for adapter reset job
  7121. * @ipr_cmd: ipr command struct
  7122. * @timeout: timeout value
  7123. *
  7124. * Description: This function is used in adapter reset processing
  7125. * for timing events. If the reset_cmd pointer in the IOA
  7126. * config struct is not this adapter's we are doing nested
  7127. * resets and fail_all_ops will take care of freeing the
  7128. * command block.
  7129. *
  7130. * Return value:
  7131. * none
  7132. **/
  7133. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  7134. unsigned long timeout)
  7135. {
  7136. ENTER;
  7137. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7138. ipr_cmd->done = ipr_reset_ioa_job;
  7139. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  7140. ipr_cmd->timer.expires = jiffies + timeout;
  7141. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_reset_timer_done;
  7142. add_timer(&ipr_cmd->timer);
  7143. }
  7144. /**
  7145. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  7146. * @ioa_cfg: ioa cfg struct
  7147. *
  7148. * Return value:
  7149. * nothing
  7150. **/
  7151. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  7152. {
  7153. struct ipr_hrr_queue *hrrq;
  7154. for_each_hrrq(hrrq, ioa_cfg) {
  7155. spin_lock(&hrrq->_lock);
  7156. memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size);
  7157. /* Initialize Host RRQ pointers */
  7158. hrrq->hrrq_start = hrrq->host_rrq;
  7159. hrrq->hrrq_end = &hrrq->host_rrq[hrrq->size - 1];
  7160. hrrq->hrrq_curr = hrrq->hrrq_start;
  7161. hrrq->toggle_bit = 1;
  7162. spin_unlock(&hrrq->_lock);
  7163. }
  7164. wmb();
  7165. ioa_cfg->identify_hrrq_index = 0;
  7166. if (ioa_cfg->hrrq_num == 1)
  7167. atomic_set(&ioa_cfg->hrrq_index, 0);
  7168. else
  7169. atomic_set(&ioa_cfg->hrrq_index, 1);
  7170. /* Zero out config table */
  7171. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  7172. }
  7173. /**
  7174. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  7175. * @ipr_cmd: ipr command struct
  7176. *
  7177. * Return value:
  7178. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7179. **/
  7180. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  7181. {
  7182. unsigned long stage, stage_time;
  7183. u32 feedback;
  7184. volatile u32 int_reg;
  7185. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7186. u64 maskval = 0;
  7187. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  7188. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  7189. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  7190. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  7191. /* sanity check the stage_time value */
  7192. if (stage_time == 0)
  7193. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  7194. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  7195. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  7196. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  7197. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  7198. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  7199. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  7200. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7201. stage_time = ioa_cfg->transop_timeout;
  7202. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7203. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  7204. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  7205. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  7206. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7207. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  7208. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  7209. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  7210. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7211. return IPR_RC_JOB_CONTINUE;
  7212. }
  7213. }
  7214. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  7215. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  7216. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  7217. ipr_cmd->done = ipr_reset_ioa_job;
  7218. add_timer(&ipr_cmd->timer);
  7219. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7220. return IPR_RC_JOB_RETURN;
  7221. }
  7222. /**
  7223. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  7224. * @ipr_cmd: ipr command struct
  7225. *
  7226. * This function reinitializes some control blocks and
  7227. * enables destructive diagnostics on the adapter.
  7228. *
  7229. * Return value:
  7230. * IPR_RC_JOB_RETURN
  7231. **/
  7232. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  7233. {
  7234. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7235. volatile u32 int_reg;
  7236. volatile u64 maskval;
  7237. int i;
  7238. ENTER;
  7239. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7240. ipr_init_ioa_mem(ioa_cfg);
  7241. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7242. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7243. ioa_cfg->hrrq[i].allow_interrupts = 1;
  7244. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7245. }
  7246. wmb();
  7247. if (ioa_cfg->sis64) {
  7248. /* Set the adapter to the correct endian mode. */
  7249. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7250. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7251. }
  7252. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  7253. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  7254. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  7255. ioa_cfg->regs.clr_interrupt_mask_reg32);
  7256. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7257. return IPR_RC_JOB_CONTINUE;
  7258. }
  7259. /* Enable destructive diagnostics on IOA */
  7260. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7261. if (ioa_cfg->sis64) {
  7262. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  7263. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  7264. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  7265. } else
  7266. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  7267. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7268. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  7269. if (ioa_cfg->sis64) {
  7270. ipr_cmd->job_step = ipr_reset_next_stage;
  7271. return IPR_RC_JOB_CONTINUE;
  7272. }
  7273. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  7274. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  7275. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  7276. ipr_cmd->done = ipr_reset_ioa_job;
  7277. add_timer(&ipr_cmd->timer);
  7278. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7279. LEAVE;
  7280. return IPR_RC_JOB_RETURN;
  7281. }
  7282. /**
  7283. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  7284. * @ipr_cmd: ipr command struct
  7285. *
  7286. * This function is invoked when an adapter dump has run out
  7287. * of processing time.
  7288. *
  7289. * Return value:
  7290. * IPR_RC_JOB_CONTINUE
  7291. **/
  7292. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  7293. {
  7294. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7295. if (ioa_cfg->sdt_state == GET_DUMP)
  7296. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7297. else if (ioa_cfg->sdt_state == READ_DUMP)
  7298. ioa_cfg->sdt_state = ABORT_DUMP;
  7299. ioa_cfg->dump_timeout = 1;
  7300. ipr_cmd->job_step = ipr_reset_alert;
  7301. return IPR_RC_JOB_CONTINUE;
  7302. }
  7303. /**
  7304. * ipr_unit_check_no_data - Log a unit check/no data error log
  7305. * @ioa_cfg: ioa config struct
  7306. *
  7307. * Logs an error indicating the adapter unit checked, but for some
  7308. * reason, we were unable to fetch the unit check buffer.
  7309. *
  7310. * Return value:
  7311. * nothing
  7312. **/
  7313. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  7314. {
  7315. ioa_cfg->errors_logged++;
  7316. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  7317. }
  7318. /**
  7319. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  7320. * @ioa_cfg: ioa config struct
  7321. *
  7322. * Fetches the unit check buffer from the adapter by clocking the data
  7323. * through the mailbox register.
  7324. *
  7325. * Return value:
  7326. * nothing
  7327. **/
  7328. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  7329. {
  7330. unsigned long mailbox;
  7331. struct ipr_hostrcb *hostrcb;
  7332. struct ipr_uc_sdt sdt;
  7333. int rc, length;
  7334. u32 ioasc;
  7335. mailbox = readl(ioa_cfg->ioa_mailbox);
  7336. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  7337. ipr_unit_check_no_data(ioa_cfg);
  7338. return;
  7339. }
  7340. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  7341. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  7342. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  7343. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  7344. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  7345. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  7346. ipr_unit_check_no_data(ioa_cfg);
  7347. return;
  7348. }
  7349. /* Find length of the first sdt entry (UC buffer) */
  7350. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  7351. length = be32_to_cpu(sdt.entry[0].end_token);
  7352. else
  7353. length = (be32_to_cpu(sdt.entry[0].end_token) -
  7354. be32_to_cpu(sdt.entry[0].start_token)) &
  7355. IPR_FMT2_MBX_ADDR_MASK;
  7356. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  7357. struct ipr_hostrcb, queue);
  7358. list_del_init(&hostrcb->queue);
  7359. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  7360. rc = ipr_get_ldump_data_section(ioa_cfg,
  7361. be32_to_cpu(sdt.entry[0].start_token),
  7362. (__be32 *)&hostrcb->hcam,
  7363. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  7364. if (!rc) {
  7365. ipr_handle_log_data(ioa_cfg, hostrcb);
  7366. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  7367. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  7368. ioa_cfg->sdt_state == GET_DUMP)
  7369. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7370. } else
  7371. ipr_unit_check_no_data(ioa_cfg);
  7372. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  7373. }
  7374. /**
  7375. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  7376. * @ipr_cmd: ipr command struct
  7377. *
  7378. * Description: This function will call to get the unit check buffer.
  7379. *
  7380. * Return value:
  7381. * IPR_RC_JOB_RETURN
  7382. **/
  7383. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  7384. {
  7385. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7386. ENTER;
  7387. ioa_cfg->ioa_unit_checked = 0;
  7388. ipr_get_unit_check_buffer(ioa_cfg);
  7389. ipr_cmd->job_step = ipr_reset_alert;
  7390. ipr_reset_start_timer(ipr_cmd, 0);
  7391. LEAVE;
  7392. return IPR_RC_JOB_RETURN;
  7393. }
  7394. static int ipr_dump_mailbox_wait(struct ipr_cmnd *ipr_cmd)
  7395. {
  7396. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7397. ENTER;
  7398. if (ioa_cfg->sdt_state != GET_DUMP)
  7399. return IPR_RC_JOB_RETURN;
  7400. if (!ioa_cfg->sis64 || !ipr_cmd->u.time_left ||
  7401. (readl(ioa_cfg->regs.sense_interrupt_reg) &
  7402. IPR_PCII_MAILBOX_STABLE)) {
  7403. if (!ipr_cmd->u.time_left)
  7404. dev_err(&ioa_cfg->pdev->dev,
  7405. "Timed out waiting for Mailbox register.\n");
  7406. ioa_cfg->sdt_state = READ_DUMP;
  7407. ioa_cfg->dump_timeout = 0;
  7408. if (ioa_cfg->sis64)
  7409. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  7410. else
  7411. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  7412. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  7413. schedule_work(&ioa_cfg->work_q);
  7414. } else {
  7415. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7416. ipr_reset_start_timer(ipr_cmd,
  7417. IPR_CHECK_FOR_RESET_TIMEOUT);
  7418. }
  7419. LEAVE;
  7420. return IPR_RC_JOB_RETURN;
  7421. }
  7422. /**
  7423. * ipr_reset_restore_cfg_space - Restore PCI config space.
  7424. * @ipr_cmd: ipr command struct
  7425. *
  7426. * Description: This function restores the saved PCI config space of
  7427. * the adapter, fails all outstanding ops back to the callers, and
  7428. * fetches the dump/unit check if applicable to this reset.
  7429. *
  7430. * Return value:
  7431. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7432. **/
  7433. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  7434. {
  7435. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7436. u32 int_reg;
  7437. ENTER;
  7438. ioa_cfg->pdev->state_saved = true;
  7439. pci_restore_state(ioa_cfg->pdev);
  7440. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  7441. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7442. return IPR_RC_JOB_CONTINUE;
  7443. }
  7444. ipr_fail_all_ops(ioa_cfg);
  7445. if (ioa_cfg->sis64) {
  7446. /* Set the adapter to the correct endian mode. */
  7447. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7448. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7449. }
  7450. if (ioa_cfg->ioa_unit_checked) {
  7451. if (ioa_cfg->sis64) {
  7452. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  7453. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  7454. return IPR_RC_JOB_RETURN;
  7455. } else {
  7456. ioa_cfg->ioa_unit_checked = 0;
  7457. ipr_get_unit_check_buffer(ioa_cfg);
  7458. ipr_cmd->job_step = ipr_reset_alert;
  7459. ipr_reset_start_timer(ipr_cmd, 0);
  7460. return IPR_RC_JOB_RETURN;
  7461. }
  7462. }
  7463. if (ioa_cfg->in_ioa_bringdown) {
  7464. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7465. } else if (ioa_cfg->sdt_state == GET_DUMP) {
  7466. ipr_cmd->job_step = ipr_dump_mailbox_wait;
  7467. ipr_cmd->u.time_left = IPR_WAIT_FOR_MAILBOX;
  7468. } else {
  7469. ipr_cmd->job_step = ipr_reset_enable_ioa;
  7470. }
  7471. LEAVE;
  7472. return IPR_RC_JOB_CONTINUE;
  7473. }
  7474. /**
  7475. * ipr_reset_bist_done - BIST has completed on the adapter.
  7476. * @ipr_cmd: ipr command struct
  7477. *
  7478. * Description: Unblock config space and resume the reset process.
  7479. *
  7480. * Return value:
  7481. * IPR_RC_JOB_CONTINUE
  7482. **/
  7483. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  7484. {
  7485. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7486. ENTER;
  7487. if (ioa_cfg->cfg_locked)
  7488. pci_cfg_access_unlock(ioa_cfg->pdev);
  7489. ioa_cfg->cfg_locked = 0;
  7490. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  7491. LEAVE;
  7492. return IPR_RC_JOB_CONTINUE;
  7493. }
  7494. /**
  7495. * ipr_reset_start_bist - Run BIST on the adapter.
  7496. * @ipr_cmd: ipr command struct
  7497. *
  7498. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  7499. *
  7500. * Return value:
  7501. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7502. **/
  7503. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  7504. {
  7505. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7506. int rc = PCIBIOS_SUCCESSFUL;
  7507. ENTER;
  7508. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  7509. writel(IPR_UPROCI_SIS64_START_BIST,
  7510. ioa_cfg->regs.set_uproc_interrupt_reg32);
  7511. else
  7512. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  7513. if (rc == PCIBIOS_SUCCESSFUL) {
  7514. ipr_cmd->job_step = ipr_reset_bist_done;
  7515. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7516. rc = IPR_RC_JOB_RETURN;
  7517. } else {
  7518. if (ioa_cfg->cfg_locked)
  7519. pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
  7520. ioa_cfg->cfg_locked = 0;
  7521. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7522. rc = IPR_RC_JOB_CONTINUE;
  7523. }
  7524. LEAVE;
  7525. return rc;
  7526. }
  7527. /**
  7528. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  7529. * @ipr_cmd: ipr command struct
  7530. *
  7531. * Description: This clears PCI reset to the adapter and delays two seconds.
  7532. *
  7533. * Return value:
  7534. * IPR_RC_JOB_RETURN
  7535. **/
  7536. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  7537. {
  7538. ENTER;
  7539. ipr_cmd->job_step = ipr_reset_bist_done;
  7540. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7541. LEAVE;
  7542. return IPR_RC_JOB_RETURN;
  7543. }
  7544. /**
  7545. * ipr_reset_reset_work - Pulse a PCIe fundamental reset
  7546. * @work: work struct
  7547. *
  7548. * Description: This pulses warm reset to a slot.
  7549. *
  7550. **/
  7551. static void ipr_reset_reset_work(struct work_struct *work)
  7552. {
  7553. struct ipr_cmnd *ipr_cmd = container_of(work, struct ipr_cmnd, work);
  7554. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7555. struct pci_dev *pdev = ioa_cfg->pdev;
  7556. unsigned long lock_flags = 0;
  7557. ENTER;
  7558. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  7559. msleep(jiffies_to_msecs(IPR_PCI_RESET_TIMEOUT));
  7560. pci_set_pcie_reset_state(pdev, pcie_deassert_reset);
  7561. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7562. if (ioa_cfg->reset_cmd == ipr_cmd)
  7563. ipr_reset_ioa_job(ipr_cmd);
  7564. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7565. LEAVE;
  7566. }
  7567. /**
  7568. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  7569. * @ipr_cmd: ipr command struct
  7570. *
  7571. * Description: This asserts PCI reset to the adapter.
  7572. *
  7573. * Return value:
  7574. * IPR_RC_JOB_RETURN
  7575. **/
  7576. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  7577. {
  7578. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7579. ENTER;
  7580. INIT_WORK(&ipr_cmd->work, ipr_reset_reset_work);
  7581. queue_work(ioa_cfg->reset_work_q, &ipr_cmd->work);
  7582. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  7583. LEAVE;
  7584. return IPR_RC_JOB_RETURN;
  7585. }
  7586. /**
  7587. * ipr_reset_block_config_access_wait - Wait for permission to block config access
  7588. * @ipr_cmd: ipr command struct
  7589. *
  7590. * Description: This attempts to block config access to the IOA.
  7591. *
  7592. * Return value:
  7593. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7594. **/
  7595. static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
  7596. {
  7597. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7598. int rc = IPR_RC_JOB_CONTINUE;
  7599. if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
  7600. ioa_cfg->cfg_locked = 1;
  7601. ipr_cmd->job_step = ioa_cfg->reset;
  7602. } else {
  7603. if (ipr_cmd->u.time_left) {
  7604. rc = IPR_RC_JOB_RETURN;
  7605. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7606. ipr_reset_start_timer(ipr_cmd,
  7607. IPR_CHECK_FOR_RESET_TIMEOUT);
  7608. } else {
  7609. ipr_cmd->job_step = ioa_cfg->reset;
  7610. dev_err(&ioa_cfg->pdev->dev,
  7611. "Timed out waiting to lock config access. Resetting anyway.\n");
  7612. }
  7613. }
  7614. return rc;
  7615. }
  7616. /**
  7617. * ipr_reset_block_config_access - Block config access to the IOA
  7618. * @ipr_cmd: ipr command struct
  7619. *
  7620. * Description: This attempts to block config access to the IOA
  7621. *
  7622. * Return value:
  7623. * IPR_RC_JOB_CONTINUE
  7624. **/
  7625. static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
  7626. {
  7627. ipr_cmd->ioa_cfg->cfg_locked = 0;
  7628. ipr_cmd->job_step = ipr_reset_block_config_access_wait;
  7629. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7630. return IPR_RC_JOB_CONTINUE;
  7631. }
  7632. /**
  7633. * ipr_reset_allowed - Query whether or not IOA can be reset
  7634. * @ioa_cfg: ioa config struct
  7635. *
  7636. * Return value:
  7637. * 0 if reset not allowed / non-zero if reset is allowed
  7638. **/
  7639. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  7640. {
  7641. volatile u32 temp_reg;
  7642. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7643. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  7644. }
  7645. /**
  7646. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  7647. * @ipr_cmd: ipr command struct
  7648. *
  7649. * Description: This function waits for adapter permission to run BIST,
  7650. * then runs BIST. If the adapter does not give permission after a
  7651. * reasonable time, we will reset the adapter anyway. The impact of
  7652. * resetting the adapter without warning the adapter is the risk of
  7653. * losing the persistent error log on the adapter. If the adapter is
  7654. * reset while it is writing to the flash on the adapter, the flash
  7655. * segment will have bad ECC and be zeroed.
  7656. *
  7657. * Return value:
  7658. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7659. **/
  7660. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  7661. {
  7662. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7663. int rc = IPR_RC_JOB_RETURN;
  7664. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  7665. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7666. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7667. } else {
  7668. ipr_cmd->job_step = ipr_reset_block_config_access;
  7669. rc = IPR_RC_JOB_CONTINUE;
  7670. }
  7671. return rc;
  7672. }
  7673. /**
  7674. * ipr_reset_alert - Alert the adapter of a pending reset
  7675. * @ipr_cmd: ipr command struct
  7676. *
  7677. * Description: This function alerts the adapter that it will be reset.
  7678. * If memory space is not currently enabled, proceed directly
  7679. * to running BIST on the adapter. The timer must always be started
  7680. * so we guarantee we do not run BIST from ipr_isr.
  7681. *
  7682. * Return value:
  7683. * IPR_RC_JOB_RETURN
  7684. **/
  7685. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  7686. {
  7687. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7688. u16 cmd_reg;
  7689. int rc;
  7690. ENTER;
  7691. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  7692. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  7693. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  7694. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7695. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  7696. } else {
  7697. ipr_cmd->job_step = ipr_reset_block_config_access;
  7698. }
  7699. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7700. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7701. LEAVE;
  7702. return IPR_RC_JOB_RETURN;
  7703. }
  7704. /**
  7705. * ipr_reset_quiesce_done - Complete IOA disconnect
  7706. * @ipr_cmd: ipr command struct
  7707. *
  7708. * Description: Freeze the adapter to complete quiesce processing
  7709. *
  7710. * Return value:
  7711. * IPR_RC_JOB_CONTINUE
  7712. **/
  7713. static int ipr_reset_quiesce_done(struct ipr_cmnd *ipr_cmd)
  7714. {
  7715. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7716. ENTER;
  7717. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7718. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  7719. LEAVE;
  7720. return IPR_RC_JOB_CONTINUE;
  7721. }
  7722. /**
  7723. * ipr_reset_cancel_hcam_done - Check for outstanding commands
  7724. * @ipr_cmd: ipr command struct
  7725. *
  7726. * Description: Ensure nothing is outstanding to the IOA and
  7727. * proceed with IOA disconnect. Otherwise reset the IOA.
  7728. *
  7729. * Return value:
  7730. * IPR_RC_JOB_RETURN / IPR_RC_JOB_CONTINUE
  7731. **/
  7732. static int ipr_reset_cancel_hcam_done(struct ipr_cmnd *ipr_cmd)
  7733. {
  7734. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7735. struct ipr_cmnd *loop_cmd;
  7736. struct ipr_hrr_queue *hrrq;
  7737. int rc = IPR_RC_JOB_CONTINUE;
  7738. int count = 0;
  7739. ENTER;
  7740. ipr_cmd->job_step = ipr_reset_quiesce_done;
  7741. for_each_hrrq(hrrq, ioa_cfg) {
  7742. spin_lock(&hrrq->_lock);
  7743. list_for_each_entry(loop_cmd, &hrrq->hrrq_pending_q, queue) {
  7744. count++;
  7745. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7746. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7747. rc = IPR_RC_JOB_RETURN;
  7748. break;
  7749. }
  7750. spin_unlock(&hrrq->_lock);
  7751. if (count)
  7752. break;
  7753. }
  7754. LEAVE;
  7755. return rc;
  7756. }
  7757. /**
  7758. * ipr_reset_cancel_hcam - Cancel outstanding HCAMs
  7759. * @ipr_cmd: ipr command struct
  7760. *
  7761. * Description: Cancel any oustanding HCAMs to the IOA.
  7762. *
  7763. * Return value:
  7764. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7765. **/
  7766. static int ipr_reset_cancel_hcam(struct ipr_cmnd *ipr_cmd)
  7767. {
  7768. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7769. int rc = IPR_RC_JOB_CONTINUE;
  7770. struct ipr_cmd_pkt *cmd_pkt;
  7771. struct ipr_cmnd *hcam_cmd;
  7772. struct ipr_hrr_queue *hrrq = &ioa_cfg->hrrq[IPR_INIT_HRRQ];
  7773. ENTER;
  7774. ipr_cmd->job_step = ipr_reset_cancel_hcam_done;
  7775. if (!hrrq->ioa_is_dead) {
  7776. if (!list_empty(&ioa_cfg->hostrcb_pending_q)) {
  7777. list_for_each_entry(hcam_cmd, &hrrq->hrrq_pending_q, queue) {
  7778. if (hcam_cmd->ioarcb.cmd_pkt.cdb[0] != IPR_HOST_CONTROLLED_ASYNC)
  7779. continue;
  7780. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7781. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7782. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  7783. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  7784. cmd_pkt->cdb[0] = IPR_CANCEL_REQUEST;
  7785. cmd_pkt->cdb[1] = IPR_CANCEL_64BIT_IOARCB;
  7786. cmd_pkt->cdb[10] = ((u64) hcam_cmd->dma_addr >> 56) & 0xff;
  7787. cmd_pkt->cdb[11] = ((u64) hcam_cmd->dma_addr >> 48) & 0xff;
  7788. cmd_pkt->cdb[12] = ((u64) hcam_cmd->dma_addr >> 40) & 0xff;
  7789. cmd_pkt->cdb[13] = ((u64) hcam_cmd->dma_addr >> 32) & 0xff;
  7790. cmd_pkt->cdb[2] = ((u64) hcam_cmd->dma_addr >> 24) & 0xff;
  7791. cmd_pkt->cdb[3] = ((u64) hcam_cmd->dma_addr >> 16) & 0xff;
  7792. cmd_pkt->cdb[4] = ((u64) hcam_cmd->dma_addr >> 8) & 0xff;
  7793. cmd_pkt->cdb[5] = ((u64) hcam_cmd->dma_addr) & 0xff;
  7794. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7795. IPR_CANCEL_TIMEOUT);
  7796. rc = IPR_RC_JOB_RETURN;
  7797. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  7798. break;
  7799. }
  7800. }
  7801. } else
  7802. ipr_cmd->job_step = ipr_reset_alert;
  7803. LEAVE;
  7804. return rc;
  7805. }
  7806. /**
  7807. * ipr_reset_ucode_download_done - Microcode download completion
  7808. * @ipr_cmd: ipr command struct
  7809. *
  7810. * Description: This function unmaps the microcode download buffer.
  7811. *
  7812. * Return value:
  7813. * IPR_RC_JOB_CONTINUE
  7814. **/
  7815. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  7816. {
  7817. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7818. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7819. dma_unmap_sg(&ioa_cfg->pdev->dev, sglist->scatterlist,
  7820. sglist->num_sg, DMA_TO_DEVICE);
  7821. ipr_cmd->job_step = ipr_reset_alert;
  7822. return IPR_RC_JOB_CONTINUE;
  7823. }
  7824. /**
  7825. * ipr_reset_ucode_download - Download microcode to the adapter
  7826. * @ipr_cmd: ipr command struct
  7827. *
  7828. * Description: This function checks to see if it there is microcode
  7829. * to download to the adapter. If there is, a download is performed.
  7830. *
  7831. * Return value:
  7832. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7833. **/
  7834. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  7835. {
  7836. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7837. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7838. ENTER;
  7839. ipr_cmd->job_step = ipr_reset_alert;
  7840. if (!sglist)
  7841. return IPR_RC_JOB_CONTINUE;
  7842. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7843. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7844. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  7845. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  7846. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  7847. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  7848. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  7849. if (ioa_cfg->sis64)
  7850. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  7851. else
  7852. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  7853. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  7854. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7855. IPR_WRITE_BUFFER_TIMEOUT);
  7856. LEAVE;
  7857. return IPR_RC_JOB_RETURN;
  7858. }
  7859. /**
  7860. * ipr_reset_shutdown_ioa - Shutdown the adapter
  7861. * @ipr_cmd: ipr command struct
  7862. *
  7863. * Description: This function issues an adapter shutdown of the
  7864. * specified type to the specified adapter as part of the
  7865. * adapter reset job.
  7866. *
  7867. * Return value:
  7868. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7869. **/
  7870. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  7871. {
  7872. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7873. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  7874. unsigned long timeout;
  7875. int rc = IPR_RC_JOB_CONTINUE;
  7876. ENTER;
  7877. if (shutdown_type == IPR_SHUTDOWN_QUIESCE)
  7878. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  7879. else if (shutdown_type != IPR_SHUTDOWN_NONE &&
  7880. !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7881. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7882. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7883. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  7884. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  7885. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  7886. timeout = IPR_SHUTDOWN_TIMEOUT;
  7887. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  7888. timeout = IPR_INTERNAL_TIMEOUT;
  7889. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  7890. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  7891. else
  7892. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  7893. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  7894. rc = IPR_RC_JOB_RETURN;
  7895. ipr_cmd->job_step = ipr_reset_ucode_download;
  7896. } else
  7897. ipr_cmd->job_step = ipr_reset_alert;
  7898. LEAVE;
  7899. return rc;
  7900. }
  7901. /**
  7902. * ipr_reset_ioa_job - Adapter reset job
  7903. * @ipr_cmd: ipr command struct
  7904. *
  7905. * Description: This function is the job router for the adapter reset job.
  7906. *
  7907. * Return value:
  7908. * none
  7909. **/
  7910. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  7911. {
  7912. u32 rc, ioasc;
  7913. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7914. do {
  7915. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  7916. if (ioa_cfg->reset_cmd != ipr_cmd) {
  7917. /*
  7918. * We are doing nested adapter resets and this is
  7919. * not the current reset job.
  7920. */
  7921. list_add_tail(&ipr_cmd->queue,
  7922. &ipr_cmd->hrrq->hrrq_free_q);
  7923. return;
  7924. }
  7925. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  7926. rc = ipr_cmd->job_step_failed(ipr_cmd);
  7927. if (rc == IPR_RC_JOB_RETURN)
  7928. return;
  7929. }
  7930. ipr_reinit_ipr_cmnd(ipr_cmd);
  7931. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  7932. rc = ipr_cmd->job_step(ipr_cmd);
  7933. } while (rc == IPR_RC_JOB_CONTINUE);
  7934. }
  7935. /**
  7936. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  7937. * @ioa_cfg: ioa config struct
  7938. * @job_step: first job step of reset job
  7939. * @shutdown_type: shutdown type
  7940. *
  7941. * Description: This function will initiate the reset of the given adapter
  7942. * starting at the selected job step.
  7943. * If the caller needs to wait on the completion of the reset,
  7944. * the caller must sleep on the reset_wait_q.
  7945. *
  7946. * Return value:
  7947. * none
  7948. **/
  7949. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7950. int (*job_step) (struct ipr_cmnd *),
  7951. enum ipr_shutdown_type shutdown_type)
  7952. {
  7953. struct ipr_cmnd *ipr_cmd;
  7954. int i;
  7955. ioa_cfg->in_reset_reload = 1;
  7956. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7957. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7958. ioa_cfg->hrrq[i].allow_cmds = 0;
  7959. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7960. }
  7961. wmb();
  7962. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa)
  7963. scsi_block_requests(ioa_cfg->host);
  7964. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  7965. ioa_cfg->reset_cmd = ipr_cmd;
  7966. ipr_cmd->job_step = job_step;
  7967. ipr_cmd->u.shutdown_type = shutdown_type;
  7968. ipr_reset_ioa_job(ipr_cmd);
  7969. }
  7970. /**
  7971. * ipr_initiate_ioa_reset - Initiate an adapter reset
  7972. * @ioa_cfg: ioa config struct
  7973. * @shutdown_type: shutdown type
  7974. *
  7975. * Description: This function will initiate the reset of the given adapter.
  7976. * If the caller needs to wait on the completion of the reset,
  7977. * the caller must sleep on the reset_wait_q.
  7978. *
  7979. * Return value:
  7980. * none
  7981. **/
  7982. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7983. enum ipr_shutdown_type shutdown_type)
  7984. {
  7985. int i;
  7986. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  7987. return;
  7988. if (ioa_cfg->in_reset_reload) {
  7989. if (ioa_cfg->sdt_state == GET_DUMP)
  7990. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7991. else if (ioa_cfg->sdt_state == READ_DUMP)
  7992. ioa_cfg->sdt_state = ABORT_DUMP;
  7993. }
  7994. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  7995. dev_err(&ioa_cfg->pdev->dev,
  7996. "IOA taken offline - error recovery failed\n");
  7997. ioa_cfg->reset_retries = 0;
  7998. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7999. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8000. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  8001. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8002. }
  8003. wmb();
  8004. if (ioa_cfg->in_ioa_bringdown) {
  8005. ioa_cfg->reset_cmd = NULL;
  8006. ioa_cfg->in_reset_reload = 0;
  8007. ipr_fail_all_ops(ioa_cfg);
  8008. wake_up_all(&ioa_cfg->reset_wait_q);
  8009. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  8010. spin_unlock_irq(ioa_cfg->host->host_lock);
  8011. scsi_unblock_requests(ioa_cfg->host);
  8012. spin_lock_irq(ioa_cfg->host->host_lock);
  8013. }
  8014. return;
  8015. } else {
  8016. ioa_cfg->in_ioa_bringdown = 1;
  8017. shutdown_type = IPR_SHUTDOWN_NONE;
  8018. }
  8019. }
  8020. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  8021. shutdown_type);
  8022. }
  8023. /**
  8024. * ipr_reset_freeze - Hold off all I/O activity
  8025. * @ipr_cmd: ipr command struct
  8026. *
  8027. * Description: If the PCI slot is frozen, hold off all I/O
  8028. * activity; then, as soon as the slot is available again,
  8029. * initiate an adapter reset.
  8030. */
  8031. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  8032. {
  8033. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  8034. int i;
  8035. /* Disallow new interrupts, avoid loop */
  8036. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8037. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8038. ioa_cfg->hrrq[i].allow_interrupts = 0;
  8039. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8040. }
  8041. wmb();
  8042. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  8043. ipr_cmd->done = ipr_reset_ioa_job;
  8044. return IPR_RC_JOB_RETURN;
  8045. }
  8046. /**
  8047. * ipr_pci_mmio_enabled - Called when MMIO has been re-enabled
  8048. * @pdev: PCI device struct
  8049. *
  8050. * Description: This routine is called to tell us that the MMIO
  8051. * access to the IOA has been restored
  8052. */
  8053. static pci_ers_result_t ipr_pci_mmio_enabled(struct pci_dev *pdev)
  8054. {
  8055. unsigned long flags = 0;
  8056. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8057. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8058. if (!ioa_cfg->probe_done)
  8059. pci_save_state(pdev);
  8060. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8061. return PCI_ERS_RESULT_NEED_RESET;
  8062. }
  8063. /**
  8064. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  8065. * @pdev: PCI device struct
  8066. *
  8067. * Description: This routine is called to tell us that the PCI bus
  8068. * is down. Can't do anything here, except put the device driver
  8069. * into a holding pattern, waiting for the PCI bus to come back.
  8070. */
  8071. static void ipr_pci_frozen(struct pci_dev *pdev)
  8072. {
  8073. unsigned long flags = 0;
  8074. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8075. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8076. if (ioa_cfg->probe_done)
  8077. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  8078. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8079. }
  8080. /**
  8081. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  8082. * @pdev: PCI device struct
  8083. *
  8084. * Description: This routine is called by the pci error recovery
  8085. * code after the PCI slot has been reset, just before we
  8086. * should resume normal operations.
  8087. */
  8088. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  8089. {
  8090. unsigned long flags = 0;
  8091. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8092. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8093. if (ioa_cfg->probe_done) {
  8094. if (ioa_cfg->needs_warm_reset)
  8095. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8096. else
  8097. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  8098. IPR_SHUTDOWN_NONE);
  8099. } else
  8100. wake_up_all(&ioa_cfg->eeh_wait_q);
  8101. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8102. return PCI_ERS_RESULT_RECOVERED;
  8103. }
  8104. /**
  8105. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  8106. * @pdev: PCI device struct
  8107. *
  8108. * Description: This routine is called when the PCI bus has
  8109. * permanently failed.
  8110. */
  8111. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  8112. {
  8113. unsigned long flags = 0;
  8114. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8115. int i;
  8116. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8117. if (ioa_cfg->probe_done) {
  8118. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8119. ioa_cfg->sdt_state = ABORT_DUMP;
  8120. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES - 1;
  8121. ioa_cfg->in_ioa_bringdown = 1;
  8122. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8123. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8124. ioa_cfg->hrrq[i].allow_cmds = 0;
  8125. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8126. }
  8127. wmb();
  8128. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8129. } else
  8130. wake_up_all(&ioa_cfg->eeh_wait_q);
  8131. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8132. }
  8133. /**
  8134. * ipr_pci_error_detected - Called when a PCI error is detected.
  8135. * @pdev: PCI device struct
  8136. * @state: PCI channel state
  8137. *
  8138. * Description: Called when a PCI error is detected.
  8139. *
  8140. * Return value:
  8141. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  8142. */
  8143. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  8144. pci_channel_state_t state)
  8145. {
  8146. switch (state) {
  8147. case pci_channel_io_frozen:
  8148. ipr_pci_frozen(pdev);
  8149. return PCI_ERS_RESULT_CAN_RECOVER;
  8150. case pci_channel_io_perm_failure:
  8151. ipr_pci_perm_failure(pdev);
  8152. return PCI_ERS_RESULT_DISCONNECT;
  8153. break;
  8154. default:
  8155. break;
  8156. }
  8157. return PCI_ERS_RESULT_NEED_RESET;
  8158. }
  8159. /**
  8160. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  8161. * @ioa_cfg: ioa cfg struct
  8162. *
  8163. * Description: This is the second phase of adapter intialization
  8164. * This function takes care of initilizing the adapter to the point
  8165. * where it can accept new commands.
  8166. * Return value:
  8167. * 0 on success / -EIO on failure
  8168. **/
  8169. static int ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  8170. {
  8171. int rc = 0;
  8172. unsigned long host_lock_flags = 0;
  8173. ENTER;
  8174. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8175. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  8176. ioa_cfg->probe_done = 1;
  8177. if (ioa_cfg->needs_hard_reset) {
  8178. ioa_cfg->needs_hard_reset = 0;
  8179. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8180. } else
  8181. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  8182. IPR_SHUTDOWN_NONE);
  8183. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8184. LEAVE;
  8185. return rc;
  8186. }
  8187. /**
  8188. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  8189. * @ioa_cfg: ioa config struct
  8190. *
  8191. * Return value:
  8192. * none
  8193. **/
  8194. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  8195. {
  8196. int i;
  8197. if (ioa_cfg->ipr_cmnd_list) {
  8198. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  8199. if (ioa_cfg->ipr_cmnd_list[i])
  8200. dma_pool_free(ioa_cfg->ipr_cmd_pool,
  8201. ioa_cfg->ipr_cmnd_list[i],
  8202. ioa_cfg->ipr_cmnd_list_dma[i]);
  8203. ioa_cfg->ipr_cmnd_list[i] = NULL;
  8204. }
  8205. }
  8206. if (ioa_cfg->ipr_cmd_pool)
  8207. dma_pool_destroy(ioa_cfg->ipr_cmd_pool);
  8208. kfree(ioa_cfg->ipr_cmnd_list);
  8209. kfree(ioa_cfg->ipr_cmnd_list_dma);
  8210. ioa_cfg->ipr_cmnd_list = NULL;
  8211. ioa_cfg->ipr_cmnd_list_dma = NULL;
  8212. ioa_cfg->ipr_cmd_pool = NULL;
  8213. }
  8214. /**
  8215. * ipr_free_mem - Frees memory allocated for an adapter
  8216. * @ioa_cfg: ioa cfg struct
  8217. *
  8218. * Return value:
  8219. * nothing
  8220. **/
  8221. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  8222. {
  8223. int i;
  8224. kfree(ioa_cfg->res_entries);
  8225. dma_free_coherent(&ioa_cfg->pdev->dev, sizeof(struct ipr_misc_cbs),
  8226. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  8227. ipr_free_cmd_blks(ioa_cfg);
  8228. for (i = 0; i < ioa_cfg->hrrq_num; i++)
  8229. dma_free_coherent(&ioa_cfg->pdev->dev,
  8230. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8231. ioa_cfg->hrrq[i].host_rrq,
  8232. ioa_cfg->hrrq[i].host_rrq_dma);
  8233. dma_free_coherent(&ioa_cfg->pdev->dev, ioa_cfg->cfg_table_size,
  8234. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  8235. for (i = 0; i < IPR_MAX_HCAMS; i++) {
  8236. dma_free_coherent(&ioa_cfg->pdev->dev,
  8237. sizeof(struct ipr_hostrcb),
  8238. ioa_cfg->hostrcb[i],
  8239. ioa_cfg->hostrcb_dma[i]);
  8240. }
  8241. ipr_free_dump(ioa_cfg);
  8242. kfree(ioa_cfg->trace);
  8243. }
  8244. /**
  8245. * ipr_free_irqs - Free all allocated IRQs for the adapter.
  8246. * @ioa_cfg: ipr cfg struct
  8247. *
  8248. * This function frees all allocated IRQs for the
  8249. * specified adapter.
  8250. *
  8251. * Return value:
  8252. * none
  8253. **/
  8254. static void ipr_free_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8255. {
  8256. struct pci_dev *pdev = ioa_cfg->pdev;
  8257. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  8258. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8259. int i;
  8260. for (i = 0; i < ioa_cfg->nvectors; i++)
  8261. free_irq(ioa_cfg->vectors_info[i].vec,
  8262. &ioa_cfg->hrrq[i]);
  8263. } else
  8264. free_irq(pdev->irq, &ioa_cfg->hrrq[0]);
  8265. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  8266. pci_disable_msi(pdev);
  8267. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  8268. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8269. pci_disable_msix(pdev);
  8270. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  8271. }
  8272. }
  8273. /**
  8274. * ipr_free_all_resources - Free all allocated resources for an adapter.
  8275. * @ipr_cmd: ipr command struct
  8276. *
  8277. * This function frees all allocated resources for the
  8278. * specified adapter.
  8279. *
  8280. * Return value:
  8281. * none
  8282. **/
  8283. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  8284. {
  8285. struct pci_dev *pdev = ioa_cfg->pdev;
  8286. ENTER;
  8287. ipr_free_irqs(ioa_cfg);
  8288. if (ioa_cfg->reset_work_q)
  8289. destroy_workqueue(ioa_cfg->reset_work_q);
  8290. iounmap(ioa_cfg->hdw_dma_regs);
  8291. pci_release_regions(pdev);
  8292. ipr_free_mem(ioa_cfg);
  8293. scsi_host_put(ioa_cfg->host);
  8294. pci_disable_device(pdev);
  8295. LEAVE;
  8296. }
  8297. /**
  8298. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  8299. * @ioa_cfg: ioa config struct
  8300. *
  8301. * Return value:
  8302. * 0 on success / -ENOMEM on allocation failure
  8303. **/
  8304. static int ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  8305. {
  8306. struct ipr_cmnd *ipr_cmd;
  8307. struct ipr_ioarcb *ioarcb;
  8308. dma_addr_t dma_addr;
  8309. int i, entries_each_hrrq, hrrq_id = 0;
  8310. ioa_cfg->ipr_cmd_pool = dma_pool_create(IPR_NAME, &ioa_cfg->pdev->dev,
  8311. sizeof(struct ipr_cmnd), 512, 0);
  8312. if (!ioa_cfg->ipr_cmd_pool)
  8313. return -ENOMEM;
  8314. ioa_cfg->ipr_cmnd_list = kcalloc(IPR_NUM_CMD_BLKS, sizeof(struct ipr_cmnd *), GFP_KERNEL);
  8315. ioa_cfg->ipr_cmnd_list_dma = kcalloc(IPR_NUM_CMD_BLKS, sizeof(dma_addr_t), GFP_KERNEL);
  8316. if (!ioa_cfg->ipr_cmnd_list || !ioa_cfg->ipr_cmnd_list_dma) {
  8317. ipr_free_cmd_blks(ioa_cfg);
  8318. return -ENOMEM;
  8319. }
  8320. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8321. if (ioa_cfg->hrrq_num > 1) {
  8322. if (i == 0) {
  8323. entries_each_hrrq = IPR_NUM_INTERNAL_CMD_BLKS;
  8324. ioa_cfg->hrrq[i].min_cmd_id = 0;
  8325. ioa_cfg->hrrq[i].max_cmd_id =
  8326. (entries_each_hrrq - 1);
  8327. } else {
  8328. entries_each_hrrq =
  8329. IPR_NUM_BASE_CMD_BLKS/
  8330. (ioa_cfg->hrrq_num - 1);
  8331. ioa_cfg->hrrq[i].min_cmd_id =
  8332. IPR_NUM_INTERNAL_CMD_BLKS +
  8333. (i - 1) * entries_each_hrrq;
  8334. ioa_cfg->hrrq[i].max_cmd_id =
  8335. (IPR_NUM_INTERNAL_CMD_BLKS +
  8336. i * entries_each_hrrq - 1);
  8337. }
  8338. } else {
  8339. entries_each_hrrq = IPR_NUM_CMD_BLKS;
  8340. ioa_cfg->hrrq[i].min_cmd_id = 0;
  8341. ioa_cfg->hrrq[i].max_cmd_id = (entries_each_hrrq - 1);
  8342. }
  8343. ioa_cfg->hrrq[i].size = entries_each_hrrq;
  8344. }
  8345. BUG_ON(ioa_cfg->hrrq_num == 0);
  8346. i = IPR_NUM_CMD_BLKS -
  8347. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id - 1;
  8348. if (i > 0) {
  8349. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].size += i;
  8350. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id += i;
  8351. }
  8352. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  8353. ipr_cmd = dma_pool_alloc(ioa_cfg->ipr_cmd_pool, GFP_KERNEL, &dma_addr);
  8354. if (!ipr_cmd) {
  8355. ipr_free_cmd_blks(ioa_cfg);
  8356. return -ENOMEM;
  8357. }
  8358. memset(ipr_cmd, 0, sizeof(*ipr_cmd));
  8359. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  8360. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  8361. ioarcb = &ipr_cmd->ioarcb;
  8362. ipr_cmd->dma_addr = dma_addr;
  8363. if (ioa_cfg->sis64)
  8364. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  8365. else
  8366. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  8367. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  8368. if (ioa_cfg->sis64) {
  8369. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  8370. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  8371. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  8372. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  8373. } else {
  8374. ioarcb->write_ioadl_addr =
  8375. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  8376. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  8377. ioarcb->ioasa_host_pci_addr =
  8378. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  8379. }
  8380. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  8381. ipr_cmd->cmd_index = i;
  8382. ipr_cmd->ioa_cfg = ioa_cfg;
  8383. ipr_cmd->sense_buffer_dma = dma_addr +
  8384. offsetof(struct ipr_cmnd, sense_buffer);
  8385. ipr_cmd->ioarcb.cmd_pkt.hrrq_id = hrrq_id;
  8386. ipr_cmd->hrrq = &ioa_cfg->hrrq[hrrq_id];
  8387. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  8388. if (i >= ioa_cfg->hrrq[hrrq_id].max_cmd_id)
  8389. hrrq_id++;
  8390. }
  8391. return 0;
  8392. }
  8393. /**
  8394. * ipr_alloc_mem - Allocate memory for an adapter
  8395. * @ioa_cfg: ioa config struct
  8396. *
  8397. * Return value:
  8398. * 0 on success / non-zero for error
  8399. **/
  8400. static int ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  8401. {
  8402. struct pci_dev *pdev = ioa_cfg->pdev;
  8403. int i, rc = -ENOMEM;
  8404. ENTER;
  8405. ioa_cfg->res_entries = kzalloc(sizeof(struct ipr_resource_entry) *
  8406. ioa_cfg->max_devs_supported, GFP_KERNEL);
  8407. if (!ioa_cfg->res_entries)
  8408. goto out;
  8409. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  8410. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  8411. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  8412. }
  8413. ioa_cfg->vpd_cbs = dma_alloc_coherent(&pdev->dev,
  8414. sizeof(struct ipr_misc_cbs),
  8415. &ioa_cfg->vpd_cbs_dma,
  8416. GFP_KERNEL);
  8417. if (!ioa_cfg->vpd_cbs)
  8418. goto out_free_res_entries;
  8419. if (ipr_alloc_cmd_blks(ioa_cfg))
  8420. goto out_free_vpd_cbs;
  8421. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8422. ioa_cfg->hrrq[i].host_rrq = dma_alloc_coherent(&pdev->dev,
  8423. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8424. &ioa_cfg->hrrq[i].host_rrq_dma,
  8425. GFP_KERNEL);
  8426. if (!ioa_cfg->hrrq[i].host_rrq) {
  8427. while (--i > 0)
  8428. dma_free_coherent(&pdev->dev,
  8429. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8430. ioa_cfg->hrrq[i].host_rrq,
  8431. ioa_cfg->hrrq[i].host_rrq_dma);
  8432. goto out_ipr_free_cmd_blocks;
  8433. }
  8434. ioa_cfg->hrrq[i].ioa_cfg = ioa_cfg;
  8435. }
  8436. ioa_cfg->u.cfg_table = dma_alloc_coherent(&pdev->dev,
  8437. ioa_cfg->cfg_table_size,
  8438. &ioa_cfg->cfg_table_dma,
  8439. GFP_KERNEL);
  8440. if (!ioa_cfg->u.cfg_table)
  8441. goto out_free_host_rrq;
  8442. for (i = 0; i < IPR_MAX_HCAMS; i++) {
  8443. ioa_cfg->hostrcb[i] = dma_alloc_coherent(&pdev->dev,
  8444. sizeof(struct ipr_hostrcb),
  8445. &ioa_cfg->hostrcb_dma[i],
  8446. GFP_KERNEL);
  8447. if (!ioa_cfg->hostrcb[i])
  8448. goto out_free_hostrcb_dma;
  8449. ioa_cfg->hostrcb[i]->hostrcb_dma =
  8450. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  8451. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  8452. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  8453. }
  8454. ioa_cfg->trace = kzalloc(sizeof(struct ipr_trace_entry) *
  8455. IPR_NUM_TRACE_ENTRIES, GFP_KERNEL);
  8456. if (!ioa_cfg->trace)
  8457. goto out_free_hostrcb_dma;
  8458. rc = 0;
  8459. out:
  8460. LEAVE;
  8461. return rc;
  8462. out_free_hostrcb_dma:
  8463. while (i-- > 0) {
  8464. dma_free_coherent(&pdev->dev, sizeof(struct ipr_hostrcb),
  8465. ioa_cfg->hostrcb[i],
  8466. ioa_cfg->hostrcb_dma[i]);
  8467. }
  8468. dma_free_coherent(&pdev->dev, ioa_cfg->cfg_table_size,
  8469. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  8470. out_free_host_rrq:
  8471. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8472. dma_free_coherent(&pdev->dev,
  8473. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8474. ioa_cfg->hrrq[i].host_rrq,
  8475. ioa_cfg->hrrq[i].host_rrq_dma);
  8476. }
  8477. out_ipr_free_cmd_blocks:
  8478. ipr_free_cmd_blks(ioa_cfg);
  8479. out_free_vpd_cbs:
  8480. dma_free_coherent(&pdev->dev, sizeof(struct ipr_misc_cbs),
  8481. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  8482. out_free_res_entries:
  8483. kfree(ioa_cfg->res_entries);
  8484. goto out;
  8485. }
  8486. /**
  8487. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  8488. * @ioa_cfg: ioa config struct
  8489. *
  8490. * Return value:
  8491. * none
  8492. **/
  8493. static void ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  8494. {
  8495. int i;
  8496. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  8497. ioa_cfg->bus_attr[i].bus = i;
  8498. ioa_cfg->bus_attr[i].qas_enabled = 0;
  8499. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  8500. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  8501. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  8502. else
  8503. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  8504. }
  8505. }
  8506. /**
  8507. * ipr_init_regs - Initialize IOA registers
  8508. * @ioa_cfg: ioa config struct
  8509. *
  8510. * Return value:
  8511. * none
  8512. **/
  8513. static void ipr_init_regs(struct ipr_ioa_cfg *ioa_cfg)
  8514. {
  8515. const struct ipr_interrupt_offsets *p;
  8516. struct ipr_interrupts *t;
  8517. void __iomem *base;
  8518. p = &ioa_cfg->chip_cfg->regs;
  8519. t = &ioa_cfg->regs;
  8520. base = ioa_cfg->hdw_dma_regs;
  8521. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  8522. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  8523. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  8524. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  8525. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  8526. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  8527. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  8528. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  8529. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  8530. t->ioarrin_reg = base + p->ioarrin_reg;
  8531. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  8532. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  8533. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  8534. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  8535. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  8536. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  8537. if (ioa_cfg->sis64) {
  8538. t->init_feedback_reg = base + p->init_feedback_reg;
  8539. t->dump_addr_reg = base + p->dump_addr_reg;
  8540. t->dump_data_reg = base + p->dump_data_reg;
  8541. t->endian_swap_reg = base + p->endian_swap_reg;
  8542. }
  8543. }
  8544. /**
  8545. * ipr_init_ioa_cfg - Initialize IOA config struct
  8546. * @ioa_cfg: ioa config struct
  8547. * @host: scsi host struct
  8548. * @pdev: PCI dev struct
  8549. *
  8550. * Return value:
  8551. * none
  8552. **/
  8553. static void ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  8554. struct Scsi_Host *host, struct pci_dev *pdev)
  8555. {
  8556. int i;
  8557. ioa_cfg->host = host;
  8558. ioa_cfg->pdev = pdev;
  8559. ioa_cfg->log_level = ipr_log_level;
  8560. ioa_cfg->doorbell = IPR_DOORBELL;
  8561. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  8562. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  8563. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  8564. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  8565. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  8566. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  8567. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  8568. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  8569. INIT_LIST_HEAD(&ioa_cfg->hostrcb_report_q);
  8570. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  8571. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  8572. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  8573. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  8574. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8575. init_waitqueue_head(&ioa_cfg->eeh_wait_q);
  8576. ioa_cfg->sdt_state = INACTIVE;
  8577. ipr_initialize_bus_attr(ioa_cfg);
  8578. ioa_cfg->max_devs_supported = ipr_max_devs;
  8579. if (ioa_cfg->sis64) {
  8580. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  8581. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  8582. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  8583. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  8584. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  8585. + ((sizeof(struct ipr_config_table_entry64)
  8586. * ioa_cfg->max_devs_supported)));
  8587. } else {
  8588. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  8589. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  8590. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  8591. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  8592. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  8593. + ((sizeof(struct ipr_config_table_entry)
  8594. * ioa_cfg->max_devs_supported)));
  8595. }
  8596. host->max_channel = IPR_VSET_BUS;
  8597. host->unique_id = host->host_no;
  8598. host->max_cmd_len = IPR_MAX_CDB_LEN;
  8599. host->can_queue = ioa_cfg->max_cmds;
  8600. pci_set_drvdata(pdev, ioa_cfg);
  8601. for (i = 0; i < ARRAY_SIZE(ioa_cfg->hrrq); i++) {
  8602. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_free_q);
  8603. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_pending_q);
  8604. spin_lock_init(&ioa_cfg->hrrq[i]._lock);
  8605. if (i == 0)
  8606. ioa_cfg->hrrq[i].lock = ioa_cfg->host->host_lock;
  8607. else
  8608. ioa_cfg->hrrq[i].lock = &ioa_cfg->hrrq[i]._lock;
  8609. }
  8610. }
  8611. /**
  8612. * ipr_get_chip_info - Find adapter chip information
  8613. * @dev_id: PCI device id struct
  8614. *
  8615. * Return value:
  8616. * ptr to chip information on success / NULL on failure
  8617. **/
  8618. static const struct ipr_chip_t *
  8619. ipr_get_chip_info(const struct pci_device_id *dev_id)
  8620. {
  8621. int i;
  8622. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  8623. if (ipr_chip[i].vendor == dev_id->vendor &&
  8624. ipr_chip[i].device == dev_id->device)
  8625. return &ipr_chip[i];
  8626. return NULL;
  8627. }
  8628. /**
  8629. * ipr_wait_for_pci_err_recovery - Wait for any PCI error recovery to complete
  8630. * during probe time
  8631. * @ioa_cfg: ioa config struct
  8632. *
  8633. * Return value:
  8634. * None
  8635. **/
  8636. static void ipr_wait_for_pci_err_recovery(struct ipr_ioa_cfg *ioa_cfg)
  8637. {
  8638. struct pci_dev *pdev = ioa_cfg->pdev;
  8639. if (pci_channel_offline(pdev)) {
  8640. wait_event_timeout(ioa_cfg->eeh_wait_q,
  8641. !pci_channel_offline(pdev),
  8642. IPR_PCI_ERROR_RECOVERY_TIMEOUT);
  8643. pci_restore_state(pdev);
  8644. }
  8645. }
  8646. static int ipr_enable_msix(struct ipr_ioa_cfg *ioa_cfg)
  8647. {
  8648. struct msix_entry entries[IPR_MAX_MSIX_VECTORS];
  8649. int i, vectors;
  8650. for (i = 0; i < ARRAY_SIZE(entries); ++i)
  8651. entries[i].entry = i;
  8652. vectors = pci_enable_msix_range(ioa_cfg->pdev,
  8653. entries, 1, ipr_number_of_msix);
  8654. if (vectors < 0) {
  8655. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8656. return vectors;
  8657. }
  8658. for (i = 0; i < vectors; i++)
  8659. ioa_cfg->vectors_info[i].vec = entries[i].vector;
  8660. ioa_cfg->nvectors = vectors;
  8661. return 0;
  8662. }
  8663. static int ipr_enable_msi(struct ipr_ioa_cfg *ioa_cfg)
  8664. {
  8665. int i, vectors;
  8666. vectors = pci_enable_msi_range(ioa_cfg->pdev, 1, ipr_number_of_msix);
  8667. if (vectors < 0) {
  8668. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8669. return vectors;
  8670. }
  8671. for (i = 0; i < vectors; i++)
  8672. ioa_cfg->vectors_info[i].vec = ioa_cfg->pdev->irq + i;
  8673. ioa_cfg->nvectors = vectors;
  8674. return 0;
  8675. }
  8676. static void name_msi_vectors(struct ipr_ioa_cfg *ioa_cfg)
  8677. {
  8678. int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1;
  8679. for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) {
  8680. snprintf(ioa_cfg->vectors_info[vec_idx].desc, n,
  8681. "host%d-%d", ioa_cfg->host->host_no, vec_idx);
  8682. ioa_cfg->vectors_info[vec_idx].
  8683. desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0;
  8684. }
  8685. }
  8686. static int ipr_request_other_msi_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8687. {
  8688. int i, rc;
  8689. for (i = 1; i < ioa_cfg->nvectors; i++) {
  8690. rc = request_irq(ioa_cfg->vectors_info[i].vec,
  8691. ipr_isr_mhrrq,
  8692. 0,
  8693. ioa_cfg->vectors_info[i].desc,
  8694. &ioa_cfg->hrrq[i]);
  8695. if (rc) {
  8696. while (--i >= 0)
  8697. free_irq(ioa_cfg->vectors_info[i].vec,
  8698. &ioa_cfg->hrrq[i]);
  8699. return rc;
  8700. }
  8701. }
  8702. return 0;
  8703. }
  8704. /**
  8705. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  8706. * @pdev: PCI device struct
  8707. *
  8708. * Description: Simply set the msi_received flag to 1 indicating that
  8709. * Message Signaled Interrupts are supported.
  8710. *
  8711. * Return value:
  8712. * 0 on success / non-zero on failure
  8713. **/
  8714. static irqreturn_t ipr_test_intr(int irq, void *devp)
  8715. {
  8716. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  8717. unsigned long lock_flags = 0;
  8718. irqreturn_t rc = IRQ_HANDLED;
  8719. dev_info(&ioa_cfg->pdev->dev, "Received IRQ : %d\n", irq);
  8720. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8721. ioa_cfg->msi_received = 1;
  8722. wake_up(&ioa_cfg->msi_wait_q);
  8723. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8724. return rc;
  8725. }
  8726. /**
  8727. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  8728. * @pdev: PCI device struct
  8729. *
  8730. * Description: The return value from pci_enable_msi_range() can not always be
  8731. * trusted. This routine sets up and initiates a test interrupt to determine
  8732. * if the interrupt is received via the ipr_test_intr() service routine.
  8733. * If the tests fails, the driver will fall back to LSI.
  8734. *
  8735. * Return value:
  8736. * 0 on success / non-zero on failure
  8737. **/
  8738. static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
  8739. {
  8740. int rc;
  8741. volatile u32 int_reg;
  8742. unsigned long lock_flags = 0;
  8743. ENTER;
  8744. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8745. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8746. ioa_cfg->msi_received = 0;
  8747. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8748. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  8749. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  8750. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8751. if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8752. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8753. else
  8754. rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8755. if (rc) {
  8756. dev_err(&pdev->dev, "Can not assign irq %d\n", pdev->irq);
  8757. return rc;
  8758. } else if (ipr_debug)
  8759. dev_info(&pdev->dev, "IRQ assigned: %d\n", pdev->irq);
  8760. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  8761. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  8762. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  8763. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8764. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8765. if (!ioa_cfg->msi_received) {
  8766. /* MSI test failed */
  8767. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  8768. rc = -EOPNOTSUPP;
  8769. } else if (ipr_debug)
  8770. dev_info(&pdev->dev, "MSI test succeeded.\n");
  8771. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8772. if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8773. free_irq(ioa_cfg->vectors_info[0].vec, ioa_cfg);
  8774. else
  8775. free_irq(pdev->irq, ioa_cfg);
  8776. LEAVE;
  8777. return rc;
  8778. }
  8779. /* ipr_probe_ioa - Allocates memory and does first stage of initialization
  8780. * @pdev: PCI device struct
  8781. * @dev_id: PCI device id struct
  8782. *
  8783. * Return value:
  8784. * 0 on success / non-zero on failure
  8785. **/
  8786. static int ipr_probe_ioa(struct pci_dev *pdev,
  8787. const struct pci_device_id *dev_id)
  8788. {
  8789. struct ipr_ioa_cfg *ioa_cfg;
  8790. struct Scsi_Host *host;
  8791. unsigned long ipr_regs_pci;
  8792. void __iomem *ipr_regs;
  8793. int rc = PCIBIOS_SUCCESSFUL;
  8794. volatile u32 mask, uproc, interrupts;
  8795. unsigned long lock_flags, driver_lock_flags;
  8796. ENTER;
  8797. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  8798. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  8799. if (!host) {
  8800. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  8801. rc = -ENOMEM;
  8802. goto out;
  8803. }
  8804. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  8805. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  8806. ata_host_init(&ioa_cfg->ata_host, &pdev->dev, &ipr_sata_ops);
  8807. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  8808. if (!ioa_cfg->ipr_chip) {
  8809. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  8810. dev_id->vendor, dev_id->device);
  8811. goto out_scsi_host_put;
  8812. }
  8813. /* set SIS 32 or SIS 64 */
  8814. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  8815. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  8816. ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr;
  8817. ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds;
  8818. if (ipr_transop_timeout)
  8819. ioa_cfg->transop_timeout = ipr_transop_timeout;
  8820. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  8821. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  8822. else
  8823. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  8824. ioa_cfg->revid = pdev->revision;
  8825. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  8826. ipr_regs_pci = pci_resource_start(pdev, 0);
  8827. rc = pci_request_regions(pdev, IPR_NAME);
  8828. if (rc < 0) {
  8829. dev_err(&pdev->dev,
  8830. "Couldn't register memory range of registers\n");
  8831. goto out_scsi_host_put;
  8832. }
  8833. rc = pci_enable_device(pdev);
  8834. if (rc || pci_channel_offline(pdev)) {
  8835. if (pci_channel_offline(pdev)) {
  8836. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8837. rc = pci_enable_device(pdev);
  8838. }
  8839. if (rc) {
  8840. dev_err(&pdev->dev, "Cannot enable adapter\n");
  8841. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8842. goto out_release_regions;
  8843. }
  8844. }
  8845. ipr_regs = pci_ioremap_bar(pdev, 0);
  8846. if (!ipr_regs) {
  8847. dev_err(&pdev->dev,
  8848. "Couldn't map memory range of registers\n");
  8849. rc = -ENOMEM;
  8850. goto out_disable;
  8851. }
  8852. ioa_cfg->hdw_dma_regs = ipr_regs;
  8853. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  8854. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  8855. ipr_init_regs(ioa_cfg);
  8856. if (ioa_cfg->sis64) {
  8857. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  8858. if (rc < 0) {
  8859. dev_dbg(&pdev->dev, "Failed to set 64 bit DMA mask\n");
  8860. rc = dma_set_mask_and_coherent(&pdev->dev,
  8861. DMA_BIT_MASK(32));
  8862. }
  8863. } else
  8864. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  8865. if (rc < 0) {
  8866. dev_err(&pdev->dev, "Failed to set DMA mask\n");
  8867. goto cleanup_nomem;
  8868. }
  8869. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  8870. ioa_cfg->chip_cfg->cache_line_size);
  8871. if (rc != PCIBIOS_SUCCESSFUL) {
  8872. dev_err(&pdev->dev, "Write of cache line size failed\n");
  8873. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8874. rc = -EIO;
  8875. goto cleanup_nomem;
  8876. }
  8877. /* Issue MMIO read to ensure card is not in EEH */
  8878. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg);
  8879. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8880. if (ipr_number_of_msix > IPR_MAX_MSIX_VECTORS) {
  8881. dev_err(&pdev->dev, "The max number of MSIX is %d\n",
  8882. IPR_MAX_MSIX_VECTORS);
  8883. ipr_number_of_msix = IPR_MAX_MSIX_VECTORS;
  8884. }
  8885. if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8886. ipr_enable_msix(ioa_cfg) == 0)
  8887. ioa_cfg->intr_flag = IPR_USE_MSIX;
  8888. else if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8889. ipr_enable_msi(ioa_cfg) == 0)
  8890. ioa_cfg->intr_flag = IPR_USE_MSI;
  8891. else {
  8892. ioa_cfg->intr_flag = IPR_USE_LSI;
  8893. ioa_cfg->clear_isr = 1;
  8894. ioa_cfg->nvectors = 1;
  8895. dev_info(&pdev->dev, "Cannot enable MSI.\n");
  8896. }
  8897. pci_set_master(pdev);
  8898. if (pci_channel_offline(pdev)) {
  8899. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8900. pci_set_master(pdev);
  8901. if (pci_channel_offline(pdev)) {
  8902. rc = -EIO;
  8903. goto out_msi_disable;
  8904. }
  8905. }
  8906. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  8907. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8908. rc = ipr_test_msi(ioa_cfg, pdev);
  8909. if (rc == -EOPNOTSUPP) {
  8910. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8911. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  8912. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  8913. pci_disable_msi(pdev);
  8914. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8915. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  8916. pci_disable_msix(pdev);
  8917. }
  8918. ioa_cfg->intr_flag = IPR_USE_LSI;
  8919. ioa_cfg->nvectors = 1;
  8920. }
  8921. else if (rc)
  8922. goto out_msi_disable;
  8923. else {
  8924. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8925. dev_info(&pdev->dev,
  8926. "Request for %d MSIs succeeded with starting IRQ: %d\n",
  8927. ioa_cfg->nvectors, pdev->irq);
  8928. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8929. dev_info(&pdev->dev,
  8930. "Request for %d MSIXs succeeded.",
  8931. ioa_cfg->nvectors);
  8932. }
  8933. }
  8934. ioa_cfg->hrrq_num = min3(ioa_cfg->nvectors,
  8935. (unsigned int)num_online_cpus(),
  8936. (unsigned int)IPR_MAX_HRRQ_NUM);
  8937. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  8938. goto out_msi_disable;
  8939. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  8940. goto out_msi_disable;
  8941. rc = ipr_alloc_mem(ioa_cfg);
  8942. if (rc < 0) {
  8943. dev_err(&pdev->dev,
  8944. "Couldn't allocate enough memory for device driver!\n");
  8945. goto out_msi_disable;
  8946. }
  8947. /* Save away PCI config space for use following IOA reset */
  8948. rc = pci_save_state(pdev);
  8949. if (rc != PCIBIOS_SUCCESSFUL) {
  8950. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  8951. rc = -EIO;
  8952. goto cleanup_nolog;
  8953. }
  8954. /*
  8955. * If HRRQ updated interrupt is not masked, or reset alert is set,
  8956. * the card is in an unknown state and needs a hard reset
  8957. */
  8958. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  8959. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  8960. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  8961. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  8962. ioa_cfg->needs_hard_reset = 1;
  8963. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  8964. ioa_cfg->needs_hard_reset = 1;
  8965. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  8966. ioa_cfg->ioa_unit_checked = 1;
  8967. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8968. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8969. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8970. if (ioa_cfg->intr_flag == IPR_USE_MSI
  8971. || ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8972. name_msi_vectors(ioa_cfg);
  8973. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_isr,
  8974. 0,
  8975. ioa_cfg->vectors_info[0].desc,
  8976. &ioa_cfg->hrrq[0]);
  8977. if (!rc)
  8978. rc = ipr_request_other_msi_irqs(ioa_cfg);
  8979. } else {
  8980. rc = request_irq(pdev->irq, ipr_isr,
  8981. IRQF_SHARED,
  8982. IPR_NAME, &ioa_cfg->hrrq[0]);
  8983. }
  8984. if (rc) {
  8985. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  8986. pdev->irq, rc);
  8987. goto cleanup_nolog;
  8988. }
  8989. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  8990. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  8991. ioa_cfg->needs_warm_reset = 1;
  8992. ioa_cfg->reset = ipr_reset_slot_reset;
  8993. ioa_cfg->reset_work_q = alloc_ordered_workqueue("ipr_reset_%d",
  8994. WQ_MEM_RECLAIM, host->host_no);
  8995. if (!ioa_cfg->reset_work_q) {
  8996. dev_err(&pdev->dev, "Couldn't register reset workqueue\n");
  8997. rc = -ENOMEM;
  8998. goto out_free_irq;
  8999. }
  9000. } else
  9001. ioa_cfg->reset = ipr_reset_start_bist;
  9002. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9003. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  9004. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9005. LEAVE;
  9006. out:
  9007. return rc;
  9008. out_free_irq:
  9009. ipr_free_irqs(ioa_cfg);
  9010. cleanup_nolog:
  9011. ipr_free_mem(ioa_cfg);
  9012. out_msi_disable:
  9013. ipr_wait_for_pci_err_recovery(ioa_cfg);
  9014. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  9015. pci_disable_msi(pdev);
  9016. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  9017. pci_disable_msix(pdev);
  9018. cleanup_nomem:
  9019. iounmap(ipr_regs);
  9020. out_disable:
  9021. pci_disable_device(pdev);
  9022. out_release_regions:
  9023. pci_release_regions(pdev);
  9024. out_scsi_host_put:
  9025. scsi_host_put(host);
  9026. goto out;
  9027. }
  9028. /**
  9029. * ipr_initiate_ioa_bringdown - Bring down an adapter
  9030. * @ioa_cfg: ioa config struct
  9031. * @shutdown_type: shutdown type
  9032. *
  9033. * Description: This function will initiate bringing down the adapter.
  9034. * This consists of issuing an IOA shutdown to the adapter
  9035. * to flush the cache, and running BIST.
  9036. * If the caller needs to wait on the completion of the reset,
  9037. * the caller must sleep on the reset_wait_q.
  9038. *
  9039. * Return value:
  9040. * none
  9041. **/
  9042. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  9043. enum ipr_shutdown_type shutdown_type)
  9044. {
  9045. ENTER;
  9046. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  9047. ioa_cfg->sdt_state = ABORT_DUMP;
  9048. ioa_cfg->reset_retries = 0;
  9049. ioa_cfg->in_ioa_bringdown = 1;
  9050. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  9051. LEAVE;
  9052. }
  9053. /**
  9054. * __ipr_remove - Remove a single adapter
  9055. * @pdev: pci device struct
  9056. *
  9057. * Adapter hot plug remove entry point.
  9058. *
  9059. * Return value:
  9060. * none
  9061. **/
  9062. static void __ipr_remove(struct pci_dev *pdev)
  9063. {
  9064. unsigned long host_lock_flags = 0;
  9065. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9066. int i;
  9067. unsigned long driver_lock_flags;
  9068. ENTER;
  9069. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  9070. while (ioa_cfg->in_reset_reload) {
  9071. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9072. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9073. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  9074. }
  9075. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  9076. spin_lock(&ioa_cfg->hrrq[i]._lock);
  9077. ioa_cfg->hrrq[i].removing_ioa = 1;
  9078. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  9079. }
  9080. wmb();
  9081. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  9082. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9083. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9084. flush_work(&ioa_cfg->work_q);
  9085. if (ioa_cfg->reset_work_q)
  9086. flush_workqueue(ioa_cfg->reset_work_q);
  9087. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  9088. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  9089. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9090. list_del(&ioa_cfg->queue);
  9091. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9092. if (ioa_cfg->sdt_state == ABORT_DUMP)
  9093. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  9094. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9095. ipr_free_all_resources(ioa_cfg);
  9096. LEAVE;
  9097. }
  9098. /**
  9099. * ipr_remove - IOA hot plug remove entry point
  9100. * @pdev: pci device struct
  9101. *
  9102. * Adapter hot plug remove entry point.
  9103. *
  9104. * Return value:
  9105. * none
  9106. **/
  9107. static void ipr_remove(struct pci_dev *pdev)
  9108. {
  9109. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9110. ENTER;
  9111. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9112. &ipr_trace_attr);
  9113. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9114. &ipr_dump_attr);
  9115. sysfs_remove_bin_file(&ioa_cfg->host->shost_dev.kobj,
  9116. &ipr_ioa_async_err_log);
  9117. scsi_remove_host(ioa_cfg->host);
  9118. __ipr_remove(pdev);
  9119. LEAVE;
  9120. }
  9121. /**
  9122. * ipr_probe - Adapter hot plug add entry point
  9123. *
  9124. * Return value:
  9125. * 0 on success / non-zero on failure
  9126. **/
  9127. static int ipr_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
  9128. {
  9129. struct ipr_ioa_cfg *ioa_cfg;
  9130. unsigned long flags;
  9131. int rc, i;
  9132. rc = ipr_probe_ioa(pdev, dev_id);
  9133. if (rc)
  9134. return rc;
  9135. ioa_cfg = pci_get_drvdata(pdev);
  9136. rc = ipr_probe_ioa_part2(ioa_cfg);
  9137. if (rc) {
  9138. __ipr_remove(pdev);
  9139. return rc;
  9140. }
  9141. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  9142. if (rc) {
  9143. __ipr_remove(pdev);
  9144. return rc;
  9145. }
  9146. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9147. &ipr_trace_attr);
  9148. if (rc) {
  9149. scsi_remove_host(ioa_cfg->host);
  9150. __ipr_remove(pdev);
  9151. return rc;
  9152. }
  9153. rc = sysfs_create_bin_file(&ioa_cfg->host->shost_dev.kobj,
  9154. &ipr_ioa_async_err_log);
  9155. if (rc) {
  9156. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9157. &ipr_dump_attr);
  9158. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9159. &ipr_trace_attr);
  9160. scsi_remove_host(ioa_cfg->host);
  9161. __ipr_remove(pdev);
  9162. return rc;
  9163. }
  9164. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9165. &ipr_dump_attr);
  9166. if (rc) {
  9167. sysfs_remove_bin_file(&ioa_cfg->host->shost_dev.kobj,
  9168. &ipr_ioa_async_err_log);
  9169. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9170. &ipr_trace_attr);
  9171. scsi_remove_host(ioa_cfg->host);
  9172. __ipr_remove(pdev);
  9173. return rc;
  9174. }
  9175. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  9176. ioa_cfg->scan_enabled = 1;
  9177. schedule_work(&ioa_cfg->work_q);
  9178. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9179. ioa_cfg->iopoll_weight = ioa_cfg->chip_cfg->iopoll_weight;
  9180. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  9181. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  9182. irq_poll_init(&ioa_cfg->hrrq[i].iopoll,
  9183. ioa_cfg->iopoll_weight, ipr_iopoll);
  9184. }
  9185. }
  9186. scsi_scan_host(ioa_cfg->host);
  9187. return 0;
  9188. }
  9189. /**
  9190. * ipr_shutdown - Shutdown handler.
  9191. * @pdev: pci device struct
  9192. *
  9193. * This function is invoked upon system shutdown/reboot. It will issue
  9194. * an adapter shutdown to the adapter to flush the write cache.
  9195. *
  9196. * Return value:
  9197. * none
  9198. **/
  9199. static void ipr_shutdown(struct pci_dev *pdev)
  9200. {
  9201. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9202. unsigned long lock_flags = 0;
  9203. enum ipr_shutdown_type shutdown_type = IPR_SHUTDOWN_NORMAL;
  9204. int i;
  9205. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  9206. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  9207. ioa_cfg->iopoll_weight = 0;
  9208. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  9209. irq_poll_disable(&ioa_cfg->hrrq[i].iopoll);
  9210. }
  9211. while (ioa_cfg->in_reset_reload) {
  9212. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  9213. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9214. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  9215. }
  9216. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64)
  9217. shutdown_type = IPR_SHUTDOWN_QUIESCE;
  9218. ipr_initiate_ioa_bringdown(ioa_cfg, shutdown_type);
  9219. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  9220. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9221. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64) {
  9222. ipr_free_irqs(ioa_cfg);
  9223. pci_disable_device(ioa_cfg->pdev);
  9224. }
  9225. }
  9226. static struct pci_device_id ipr_pci_table[] = {
  9227. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9228. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  9229. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9230. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  9231. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9232. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  9233. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9234. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  9235. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9236. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  9237. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9238. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  9239. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9240. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  9241. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9242. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  9243. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9244. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9245. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  9246. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9247. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  9248. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9249. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9250. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  9251. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9252. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9253. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  9254. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9255. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  9256. IPR_USE_LONG_TRANSOP_TIMEOUT},
  9257. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9258. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  9259. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9260. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9261. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  9262. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9263. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9264. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  9265. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9266. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  9267. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9268. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  9269. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  9270. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  9271. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  9272. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9273. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  9274. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9275. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  9276. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9277. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9278. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  9279. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9280. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9281. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  9282. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9283. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  9284. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9285. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  9286. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9287. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
  9288. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9289. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  9290. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9291. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  9292. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9293. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  9294. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9295. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  9296. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9297. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  9298. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9299. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
  9300. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9301. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  9302. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9303. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
  9304. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9305. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
  9306. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9307. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
  9308. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9309. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
  9310. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9311. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D9, 0, 0, 0 },
  9312. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9313. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57DA, 0, 0, 0 },
  9314. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9315. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EB, 0, 0, 0 },
  9316. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9317. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EC, 0, 0, 0 },
  9318. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9319. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57ED, 0, 0, 0 },
  9320. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9321. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EE, 0, 0, 0 },
  9322. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9323. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EF, 0, 0, 0 },
  9324. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9325. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57F0, 0, 0, 0 },
  9326. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9327. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCA, 0, 0, 0 },
  9328. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9329. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CD2, 0, 0, 0 },
  9330. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9331. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCD, 0, 0, 0 },
  9332. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
  9333. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580A, 0, 0, 0 },
  9334. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
  9335. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580B, 0, 0, 0 },
  9336. { }
  9337. };
  9338. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  9339. static const struct pci_error_handlers ipr_err_handler = {
  9340. .error_detected = ipr_pci_error_detected,
  9341. .mmio_enabled = ipr_pci_mmio_enabled,
  9342. .slot_reset = ipr_pci_slot_reset,
  9343. };
  9344. static struct pci_driver ipr_driver = {
  9345. .name = IPR_NAME,
  9346. .id_table = ipr_pci_table,
  9347. .probe = ipr_probe,
  9348. .remove = ipr_remove,
  9349. .shutdown = ipr_shutdown,
  9350. .err_handler = &ipr_err_handler,
  9351. };
  9352. /**
  9353. * ipr_halt_done - Shutdown prepare completion
  9354. *
  9355. * Return value:
  9356. * none
  9357. **/
  9358. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  9359. {
  9360. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  9361. }
  9362. /**
  9363. * ipr_halt - Issue shutdown prepare to all adapters
  9364. *
  9365. * Return value:
  9366. * NOTIFY_OK on success / NOTIFY_DONE on failure
  9367. **/
  9368. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  9369. {
  9370. struct ipr_cmnd *ipr_cmd;
  9371. struct ipr_ioa_cfg *ioa_cfg;
  9372. unsigned long flags = 0, driver_lock_flags;
  9373. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  9374. return NOTIFY_DONE;
  9375. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9376. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  9377. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  9378. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
  9379. (ipr_fast_reboot && event == SYS_RESTART && ioa_cfg->sis64)) {
  9380. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9381. continue;
  9382. }
  9383. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  9384. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  9385. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  9386. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  9387. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  9388. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  9389. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9390. }
  9391. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9392. return NOTIFY_OK;
  9393. }
  9394. static struct notifier_block ipr_notifier = {
  9395. ipr_halt, NULL, 0
  9396. };
  9397. /**
  9398. * ipr_init - Module entry point
  9399. *
  9400. * Return value:
  9401. * 0 on success / negative value on failure
  9402. **/
  9403. static int __init ipr_init(void)
  9404. {
  9405. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  9406. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  9407. register_reboot_notifier(&ipr_notifier);
  9408. return pci_register_driver(&ipr_driver);
  9409. }
  9410. /**
  9411. * ipr_exit - Module unload
  9412. *
  9413. * Module unload entry point.
  9414. *
  9415. * Return value:
  9416. * none
  9417. **/
  9418. static void __exit ipr_exit(void)
  9419. {
  9420. unregister_reboot_notifier(&ipr_notifier);
  9421. pci_unregister_driver(&ipr_driver);
  9422. }
  9423. module_init(ipr_init);
  9424. module_exit(ipr_exit);