gazel.c 16 KB

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  1. /* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $
  2. *
  3. * low level stuff for Gazel isdn cards
  4. *
  5. * Author BeWan Systems
  6. * based on source code from Karsten Keil
  7. * Copyright by BeWan Systems
  8. *
  9. * This software may be used and distributed according to the terms
  10. * of the GNU General Public License, incorporated herein by reference.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include "hisax.h"
  15. #include "isac.h"
  16. #include "hscx.h"
  17. #include "isdnl1.h"
  18. #include "ipac.h"
  19. #include <linux/pci.h>
  20. static const char *gazel_revision = "$Revision: 2.19.2.4 $";
  21. #define R647 1
  22. #define R685 2
  23. #define R753 3
  24. #define R742 4
  25. #define PLX_CNTRL 0x50 /* registre de controle PLX */
  26. #define RESET_GAZEL 0x4
  27. #define RESET_9050 0x40000000
  28. #define PLX_INCSR 0x4C /* registre d'IT du 9050 */
  29. #define INT_ISAC_EN 0x8 /* 1 = enable IT isac */
  30. #define INT_ISAC 0x20 /* 1 = IT isac en cours */
  31. #define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */
  32. #define INT_HSCX 0x4 /* 1 = IT hscx en cours */
  33. #define INT_PCI_EN 0x40 /* 1 = enable IT PCI */
  34. #define INT_IPAC_EN 0x3 /* enable IT ipac */
  35. #define byteout(addr, val) outb(val, addr)
  36. #define bytein(addr) inb(addr)
  37. static inline u_char
  38. readreg(unsigned int adr, u_short off)
  39. {
  40. return bytein(adr + off);
  41. }
  42. static inline void
  43. writereg(unsigned int adr, u_short off, u_char data)
  44. {
  45. byteout(adr + off, data);
  46. }
  47. static inline void
  48. read_fifo(unsigned int adr, u_char *data, int size)
  49. {
  50. insb(adr, data, size);
  51. }
  52. static void
  53. write_fifo(unsigned int adr, u_char *data, int size)
  54. {
  55. outsb(adr, data, size);
  56. }
  57. static inline u_char
  58. readreg_ipac(unsigned int adr, u_short off)
  59. {
  60. register u_char ret;
  61. byteout(adr, off);
  62. ret = bytein(adr + 4);
  63. return ret;
  64. }
  65. static inline void
  66. writereg_ipac(unsigned int adr, u_short off, u_char data)
  67. {
  68. byteout(adr, off);
  69. byteout(adr + 4, data);
  70. }
  71. static inline void
  72. read_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
  73. {
  74. byteout(adr, off);
  75. insb(adr + 4, data, size);
  76. }
  77. static void
  78. write_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
  79. {
  80. byteout(adr, off);
  81. outsb(adr + 4, data, size);
  82. }
  83. /* Interface functions */
  84. static u_char
  85. ReadISAC(struct IsdnCardState *cs, u_char offset)
  86. {
  87. u_short off2 = offset;
  88. switch (cs->subtyp) {
  89. case R647:
  90. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  91. case R685:
  92. return (readreg(cs->hw.gazel.isac, off2));
  93. case R753:
  94. case R742:
  95. return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
  96. }
  97. return 0;
  98. }
  99. static void
  100. WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
  101. {
  102. u_short off2 = offset;
  103. switch (cs->subtyp) {
  104. case R647:
  105. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  106. case R685:
  107. writereg(cs->hw.gazel.isac, off2, value);
  108. break;
  109. case R753:
  110. case R742:
  111. writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
  112. break;
  113. }
  114. }
  115. static void
  116. ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
  117. {
  118. switch (cs->subtyp) {
  119. case R647:
  120. case R685:
  121. read_fifo(cs->hw.gazel.isacfifo, data, size);
  122. break;
  123. case R753:
  124. case R742:
  125. read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
  126. break;
  127. }
  128. }
  129. static void
  130. WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
  131. {
  132. switch (cs->subtyp) {
  133. case R647:
  134. case R685:
  135. write_fifo(cs->hw.gazel.isacfifo, data, size);
  136. break;
  137. case R753:
  138. case R742:
  139. write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
  140. break;
  141. }
  142. }
  143. static void
  144. ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
  145. {
  146. switch (cs->subtyp) {
  147. case R647:
  148. case R685:
  149. read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
  150. break;
  151. case R753:
  152. case R742:
  153. read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
  154. break;
  155. }
  156. }
  157. static void
  158. WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
  159. {
  160. switch (cs->subtyp) {
  161. case R647:
  162. case R685:
  163. write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
  164. break;
  165. case R753:
  166. case R742:
  167. write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
  168. break;
  169. }
  170. }
  171. static u_char
  172. ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
  173. {
  174. u_short off2 = offset;
  175. switch (cs->subtyp) {
  176. case R647:
  177. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  178. case R685:
  179. return (readreg(cs->hw.gazel.hscx[hscx], off2));
  180. case R753:
  181. case R742:
  182. return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
  183. }
  184. return 0;
  185. }
  186. static void
  187. WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
  188. {
  189. u_short off2 = offset;
  190. switch (cs->subtyp) {
  191. case R647:
  192. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  193. case R685:
  194. writereg(cs->hw.gazel.hscx[hscx], off2, value);
  195. break;
  196. case R753:
  197. case R742:
  198. writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
  199. break;
  200. }
  201. }
  202. /*
  203. * fast interrupt HSCX stuff goes here
  204. */
  205. #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
  206. #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
  207. #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
  208. #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
  209. #include "hscx_irq.c"
  210. static irqreturn_t
  211. gazel_interrupt(int intno, void *dev_id)
  212. {
  213. #define MAXCOUNT 5
  214. struct IsdnCardState *cs = dev_id;
  215. u_char valisac, valhscx;
  216. int count = 0;
  217. u_long flags;
  218. spin_lock_irqsave(&cs->lock, flags);
  219. do {
  220. valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
  221. if (valhscx)
  222. hscx_int_main(cs, valhscx);
  223. valisac = ReadISAC(cs, ISAC_ISTA);
  224. if (valisac)
  225. isac_interrupt(cs, valisac);
  226. count++;
  227. } while ((valhscx || valisac) && (count < MAXCOUNT));
  228. WriteHSCX(cs, 0, HSCX_MASK, 0xFF);
  229. WriteHSCX(cs, 1, HSCX_MASK, 0xFF);
  230. WriteISAC(cs, ISAC_MASK, 0xFF);
  231. WriteISAC(cs, ISAC_MASK, 0x0);
  232. WriteHSCX(cs, 0, HSCX_MASK, 0x0);
  233. WriteHSCX(cs, 1, HSCX_MASK, 0x0);
  234. spin_unlock_irqrestore(&cs->lock, flags);
  235. return IRQ_HANDLED;
  236. }
  237. static irqreturn_t
  238. gazel_interrupt_ipac(int intno, void *dev_id)
  239. {
  240. struct IsdnCardState *cs = dev_id;
  241. u_char ista, val;
  242. int count = 0;
  243. u_long flags;
  244. spin_lock_irqsave(&cs->lock, flags);
  245. ista = ReadISAC(cs, IPAC_ISTA - 0x80);
  246. do {
  247. if (ista & 0x0f) {
  248. val = ReadHSCX(cs, 1, HSCX_ISTA);
  249. if (ista & 0x01)
  250. val |= 0x01;
  251. if (ista & 0x04)
  252. val |= 0x02;
  253. if (ista & 0x08)
  254. val |= 0x04;
  255. if (val) {
  256. hscx_int_main(cs, val);
  257. }
  258. }
  259. if (ista & 0x20) {
  260. val = 0xfe & ReadISAC(cs, ISAC_ISTA);
  261. if (val) {
  262. isac_interrupt(cs, val);
  263. }
  264. }
  265. if (ista & 0x10) {
  266. val = 0x01;
  267. isac_interrupt(cs, val);
  268. }
  269. ista = ReadISAC(cs, IPAC_ISTA - 0x80);
  270. count++;
  271. }
  272. while ((ista & 0x3f) && (count < MAXCOUNT));
  273. WriteISAC(cs, IPAC_MASK - 0x80, 0xFF);
  274. WriteISAC(cs, IPAC_MASK - 0x80, 0xC0);
  275. spin_unlock_irqrestore(&cs->lock, flags);
  276. return IRQ_HANDLED;
  277. }
  278. static void
  279. release_io_gazel(struct IsdnCardState *cs)
  280. {
  281. unsigned int i;
  282. switch (cs->subtyp) {
  283. case R647:
  284. for (i = 0x0000; i < 0xC000; i += 0x1000)
  285. release_region(i + cs->hw.gazel.hscx[0], 16);
  286. release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
  287. break;
  288. case R685:
  289. release_region(cs->hw.gazel.hscx[0], 0x100);
  290. release_region(cs->hw.gazel.cfg_reg, 0x80);
  291. break;
  292. case R753:
  293. release_region(cs->hw.gazel.ipac, 0x8);
  294. release_region(cs->hw.gazel.cfg_reg, 0x80);
  295. break;
  296. case R742:
  297. release_region(cs->hw.gazel.ipac, 8);
  298. break;
  299. }
  300. }
  301. static int
  302. reset_gazel(struct IsdnCardState *cs)
  303. {
  304. unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
  305. switch (cs->subtyp) {
  306. case R647:
  307. writereg(addr, 0, 0);
  308. HZDELAY(10);
  309. writereg(addr, 0, 1);
  310. HZDELAY(2);
  311. break;
  312. case R685:
  313. plxcntrl = inl(addr + PLX_CNTRL);
  314. plxcntrl |= (RESET_9050 + RESET_GAZEL);
  315. outl(plxcntrl, addr + PLX_CNTRL);
  316. plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
  317. HZDELAY(4);
  318. outl(plxcntrl, addr + PLX_CNTRL);
  319. HZDELAY(10);
  320. outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
  321. break;
  322. case R753:
  323. plxcntrl = inl(addr + PLX_CNTRL);
  324. plxcntrl |= (RESET_9050 + RESET_GAZEL);
  325. outl(plxcntrl, addr + PLX_CNTRL);
  326. plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
  327. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
  328. HZDELAY(4);
  329. outl(plxcntrl, addr + PLX_CNTRL);
  330. HZDELAY(10);
  331. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
  332. WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
  333. WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
  334. WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
  335. WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
  336. outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
  337. WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
  338. break;
  339. case R742:
  340. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
  341. HZDELAY(4);
  342. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
  343. WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
  344. WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
  345. WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
  346. WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
  347. WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
  348. break;
  349. }
  350. return (0);
  351. }
  352. static int
  353. Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
  354. {
  355. u_long flags;
  356. switch (mt) {
  357. case CARD_RESET:
  358. spin_lock_irqsave(&cs->lock, flags);
  359. reset_gazel(cs);
  360. spin_unlock_irqrestore(&cs->lock, flags);
  361. return (0);
  362. case CARD_RELEASE:
  363. release_io_gazel(cs);
  364. return (0);
  365. case CARD_INIT:
  366. spin_lock_irqsave(&cs->lock, flags);
  367. inithscxisac(cs, 1);
  368. if ((cs->subtyp == R647) || (cs->subtyp == R685)) {
  369. int i;
  370. for (i = 0; i < (2 + MAX_WAITING_CALLS); i++) {
  371. cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
  372. cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
  373. }
  374. }
  375. spin_unlock_irqrestore(&cs->lock, flags);
  376. return (0);
  377. case CARD_TEST:
  378. return (0);
  379. }
  380. return (0);
  381. }
  382. static int
  383. reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
  384. {
  385. unsigned int i, j, base = 0, adr = 0, len = 0;
  386. switch (cs->subtyp) {
  387. case R647:
  388. base = cs->hw.gazel.hscx[0];
  389. if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
  390. goto error;
  391. for (i = 0x0000; i < 0xC000; i += 0x1000) {
  392. if (!request_region(adr = (i + base), len = 16, "gazel"))
  393. goto error;
  394. }
  395. if (i != 0xC000) {
  396. for (j = 0; j < i; j += 0x1000)
  397. release_region(j + base, 16);
  398. release_region(0xC000 + base, 1);
  399. goto error;
  400. }
  401. break;
  402. case R685:
  403. if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
  404. goto error;
  405. if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
  406. release_region(cs->hw.gazel.hscx[0], 0x100);
  407. goto error;
  408. }
  409. break;
  410. case R753:
  411. if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
  412. goto error;
  413. if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
  414. release_region(cs->hw.gazel.ipac, 8);
  415. goto error;
  416. }
  417. break;
  418. case R742:
  419. if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
  420. goto error;
  421. break;
  422. }
  423. return 0;
  424. error:
  425. printk(KERN_WARNING "Gazel: io ports 0x%x-0x%x already in use\n",
  426. adr, adr + len);
  427. return 1;
  428. }
  429. static int setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
  430. {
  431. printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n");
  432. // we got an irq parameter, assume it is an ISA card
  433. // R742 decodes address even in not started...
  434. // R647 returns FF if not present or not started
  435. // eventually needs improvment
  436. if (readreg_ipac(card->para[1], IPAC_ID) == 1)
  437. cs->subtyp = R742;
  438. else
  439. cs->subtyp = R647;
  440. setup_isac(cs);
  441. cs->hw.gazel.cfg_reg = card->para[1] + 0xC000;
  442. cs->hw.gazel.ipac = card->para[1];
  443. cs->hw.gazel.isac = card->para[1] + 0x8000;
  444. cs->hw.gazel.hscx[0] = card->para[1];
  445. cs->hw.gazel.hscx[1] = card->para[1] + 0x4000;
  446. cs->irq = card->para[0];
  447. cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
  448. cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
  449. cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
  450. switch (cs->subtyp) {
  451. case R647:
  452. printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
  453. cs->dc.isac.adf2 = 0x87;
  454. printk(KERN_INFO
  455. "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
  456. cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
  457. printk(KERN_INFO
  458. "Gazel: hscx A:0x%X hscx B:0x%X\n",
  459. cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
  460. break;
  461. case R742:
  462. printk(KERN_INFO "Gazel: Card ISA R742 found\n");
  463. test_and_set_bit(HW_IPAC, &cs->HW_Flags);
  464. printk(KERN_INFO
  465. "Gazel: config irq:%d ipac:0x%X\n",
  466. cs->irq, cs->hw.gazel.ipac);
  467. break;
  468. }
  469. return (0);
  470. }
  471. #ifdef CONFIG_PCI
  472. static struct pci_dev *dev_tel = NULL;
  473. static int setup_gazelpci(struct IsdnCardState *cs)
  474. {
  475. u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0;
  476. u_char pci_irq = 0, found;
  477. u_int nbseek, seekcard;
  478. printk(KERN_WARNING "Gazel: PCI card automatic recognition\n");
  479. found = 0;
  480. seekcard = PCI_DEVICE_ID_PLX_R685;
  481. for (nbseek = 0; nbseek < 4; nbseek++) {
  482. if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
  483. seekcard, dev_tel))) {
  484. if (pci_enable_device(dev_tel))
  485. return 1;
  486. pci_irq = dev_tel->irq;
  487. pci_ioaddr0 = pci_resource_start(dev_tel, 1);
  488. pci_ioaddr1 = pci_resource_start(dev_tel, 2);
  489. found = 1;
  490. }
  491. if (found)
  492. break;
  493. else {
  494. switch (seekcard) {
  495. case PCI_DEVICE_ID_PLX_R685:
  496. seekcard = PCI_DEVICE_ID_PLX_R753;
  497. break;
  498. case PCI_DEVICE_ID_PLX_R753:
  499. seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
  500. break;
  501. case PCI_DEVICE_ID_PLX_DJINN_ITOO:
  502. seekcard = PCI_DEVICE_ID_PLX_OLITEC;
  503. break;
  504. }
  505. }
  506. }
  507. if (!found) {
  508. printk(KERN_WARNING "Gazel: No PCI card found\n");
  509. return (1);
  510. }
  511. if (!pci_irq) {
  512. printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n");
  513. return 1;
  514. }
  515. cs->hw.gazel.pciaddr[0] = pci_ioaddr0;
  516. cs->hw.gazel.pciaddr[1] = pci_ioaddr1;
  517. setup_isac(cs);
  518. pci_ioaddr1 &= 0xfffe;
  519. cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe;
  520. cs->hw.gazel.ipac = pci_ioaddr1;
  521. cs->hw.gazel.isac = pci_ioaddr1 + 0x80;
  522. cs->hw.gazel.hscx[0] = pci_ioaddr1;
  523. cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40;
  524. cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
  525. cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
  526. cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
  527. cs->irq = pci_irq;
  528. cs->irq_flags |= IRQF_SHARED;
  529. switch (seekcard) {
  530. case PCI_DEVICE_ID_PLX_R685:
  531. printk(KERN_INFO "Gazel: Card PCI R685 found\n");
  532. cs->subtyp = R685;
  533. cs->dc.isac.adf2 = 0x87;
  534. printk(KERN_INFO
  535. "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
  536. cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
  537. printk(KERN_INFO
  538. "Gazel: hscx A:0x%X hscx B:0x%X\n",
  539. cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
  540. break;
  541. case PCI_DEVICE_ID_PLX_R753:
  542. case PCI_DEVICE_ID_PLX_DJINN_ITOO:
  543. case PCI_DEVICE_ID_PLX_OLITEC:
  544. printk(KERN_INFO "Gazel: Card PCI R753 found\n");
  545. cs->subtyp = R753;
  546. test_and_set_bit(HW_IPAC, &cs->HW_Flags);
  547. printk(KERN_INFO
  548. "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
  549. cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
  550. break;
  551. }
  552. return (0);
  553. }
  554. #endif /* CONFIG_PCI */
  555. int setup_gazel(struct IsdnCard *card)
  556. {
  557. struct IsdnCardState *cs = card->cs;
  558. char tmp[64];
  559. u_char val;
  560. strcpy(tmp, gazel_revision);
  561. printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp));
  562. if (cs->typ != ISDN_CTYPE_GAZEL)
  563. return (0);
  564. if (card->para[0]) {
  565. if (setup_gazelisa(card, cs))
  566. return (0);
  567. } else {
  568. #ifdef CONFIG_PCI
  569. if (setup_gazelpci(cs))
  570. return (0);
  571. #else
  572. printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n");
  573. return (0);
  574. #endif /* CONFIG_PCI */
  575. }
  576. if (reserve_regions(card, cs)) {
  577. return (0);
  578. }
  579. if (reset_gazel(cs)) {
  580. printk(KERN_WARNING "Gazel: wrong IRQ\n");
  581. release_io_gazel(cs);
  582. return (0);
  583. }
  584. cs->readisac = &ReadISAC;
  585. cs->writeisac = &WriteISAC;
  586. cs->readisacfifo = &ReadISACfifo;
  587. cs->writeisacfifo = &WriteISACfifo;
  588. cs->BC_Read_Reg = &ReadHSCX;
  589. cs->BC_Write_Reg = &WriteHSCX;
  590. cs->BC_Send_Data = &hscx_fill_fifo;
  591. cs->cardmsg = &Gazel_card_msg;
  592. switch (cs->subtyp) {
  593. case R647:
  594. case R685:
  595. cs->irq_func = &gazel_interrupt;
  596. ISACVersion(cs, "Gazel:");
  597. if (HscxVersion(cs, "Gazel:")) {
  598. printk(KERN_WARNING
  599. "Gazel: wrong HSCX versions check IO address\n");
  600. release_io_gazel(cs);
  601. return (0);
  602. }
  603. break;
  604. case R742:
  605. case R753:
  606. cs->irq_func = &gazel_interrupt_ipac;
  607. val = ReadISAC(cs, IPAC_ID - 0x80);
  608. printk(KERN_INFO "Gazel: IPAC version %x\n", val);
  609. break;
  610. }
  611. return (1);
  612. }