gp2ap020a00f.c 46 KB

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  1. /*
  2. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  3. * Author: Jacek Anaszewski <j.anaszewski@samsung.com>
  4. *
  5. * IIO features supported by the driver:
  6. *
  7. * Read-only raw channels:
  8. * - illuminance_clear [lux]
  9. * - illuminance_ir
  10. * - proximity
  11. *
  12. * Triggered buffer:
  13. * - illuminance_clear
  14. * - illuminance_ir
  15. * - proximity
  16. *
  17. * Events:
  18. * - illuminance_clear (rising and falling)
  19. * - proximity (rising and falling)
  20. * - both falling and rising thresholds for the proximity events
  21. * must be set to the values greater than 0.
  22. *
  23. * The driver supports triggered buffers for all the three
  24. * channels as well as high and low threshold events for the
  25. * illuminance_clear and proxmimity channels. Triggers
  26. * can be enabled simultaneously with both illuminance_clear
  27. * events. Proximity events cannot be enabled simultaneously
  28. * with any triggers or illuminance events. Enabling/disabling
  29. * one of the proximity events automatically enables/disables
  30. * the other one.
  31. *
  32. * This program is free software; you can redistribute it and/or modify
  33. * it under the terms of the GNU General Public License version 2, as
  34. * published by the Free Software Foundation.
  35. */
  36. #include <linux/debugfs.h>
  37. #include <linux/delay.h>
  38. #include <linux/i2c.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/irq.h>
  41. #include <linux/irq_work.h>
  42. #include <linux/module.h>
  43. #include <linux/mutex.h>
  44. #include <linux/of.h>
  45. #include <linux/regmap.h>
  46. #include <linux/regulator/consumer.h>
  47. #include <linux/slab.h>
  48. #include <asm/unaligned.h>
  49. #include <linux/iio/buffer.h>
  50. #include <linux/iio/events.h>
  51. #include <linux/iio/iio.h>
  52. #include <linux/iio/sysfs.h>
  53. #include <linux/iio/trigger.h>
  54. #include <linux/iio/trigger_consumer.h>
  55. #include <linux/iio/triggered_buffer.h>
  56. #define GP2A_I2C_NAME "gp2ap020a00f"
  57. /* Registers */
  58. #define GP2AP020A00F_OP_REG 0x00 /* Basic operations */
  59. #define GP2AP020A00F_ALS_REG 0x01 /* ALS related settings */
  60. #define GP2AP020A00F_PS_REG 0x02 /* PS related settings */
  61. #define GP2AP020A00F_LED_REG 0x03 /* LED reg */
  62. #define GP2AP020A00F_TL_L_REG 0x04 /* ALS: Threshold low LSB */
  63. #define GP2AP020A00F_TL_H_REG 0x05 /* ALS: Threshold low MSB */
  64. #define GP2AP020A00F_TH_L_REG 0x06 /* ALS: Threshold high LSB */
  65. #define GP2AP020A00F_TH_H_REG 0x07 /* ALS: Threshold high MSB */
  66. #define GP2AP020A00F_PL_L_REG 0x08 /* PS: Threshold low LSB */
  67. #define GP2AP020A00F_PL_H_REG 0x09 /* PS: Threshold low MSB */
  68. #define GP2AP020A00F_PH_L_REG 0x0a /* PS: Threshold high LSB */
  69. #define GP2AP020A00F_PH_H_REG 0x0b /* PS: Threshold high MSB */
  70. #define GP2AP020A00F_D0_L_REG 0x0c /* ALS result: Clear/Illuminance LSB */
  71. #define GP2AP020A00F_D0_H_REG 0x0d /* ALS result: Clear/Illuminance MSB */
  72. #define GP2AP020A00F_D1_L_REG 0x0e /* ALS result: IR LSB */
  73. #define GP2AP020A00F_D1_H_REG 0x0f /* ALS result: IR LSB */
  74. #define GP2AP020A00F_D2_L_REG 0x10 /* PS result LSB */
  75. #define GP2AP020A00F_D2_H_REG 0x11 /* PS result MSB */
  76. #define GP2AP020A00F_NUM_REGS 0x12 /* Number of registers */
  77. /* OP_REG bits */
  78. #define GP2AP020A00F_OP3_MASK 0x80 /* Software shutdown */
  79. #define GP2AP020A00F_OP3_SHUTDOWN 0x00
  80. #define GP2AP020A00F_OP3_OPERATION 0x80
  81. #define GP2AP020A00F_OP2_MASK 0x40 /* Auto shutdown/Continuous mode */
  82. #define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00
  83. #define GP2AP020A00F_OP2_CONT_OPERATION 0x40
  84. #define GP2AP020A00F_OP_MASK 0x30 /* Operating mode selection */
  85. #define GP2AP020A00F_OP_ALS_AND_PS 0x00
  86. #define GP2AP020A00F_OP_ALS 0x10
  87. #define GP2AP020A00F_OP_PS 0x20
  88. #define GP2AP020A00F_OP_DEBUG 0x30
  89. #define GP2AP020A00F_PROX_MASK 0x08 /* PS: detection/non-detection */
  90. #define GP2AP020A00F_PROX_NON_DETECT 0x00
  91. #define GP2AP020A00F_PROX_DETECT 0x08
  92. #define GP2AP020A00F_FLAG_P 0x04 /* PS: interrupt result */
  93. #define GP2AP020A00F_FLAG_A 0x02 /* ALS: interrupt result */
  94. #define GP2AP020A00F_TYPE_MASK 0x01 /* Output data type selection */
  95. #define GP2AP020A00F_TYPE_MANUAL_CALC 0x00
  96. #define GP2AP020A00F_TYPE_AUTO_CALC 0x01
  97. /* ALS_REG bits */
  98. #define GP2AP020A00F_PRST_MASK 0xc0 /* Number of measurement cycles */
  99. #define GP2AP020A00F_PRST_ONCE 0x00
  100. #define GP2AP020A00F_PRST_4_CYCLES 0x40
  101. #define GP2AP020A00F_PRST_8_CYCLES 0x80
  102. #define GP2AP020A00F_PRST_16_CYCLES 0xc0
  103. #define GP2AP020A00F_RES_A_MASK 0x38 /* ALS: Resolution */
  104. #define GP2AP020A00F_RES_A_800ms 0x00
  105. #define GP2AP020A00F_RES_A_400ms 0x08
  106. #define GP2AP020A00F_RES_A_200ms 0x10
  107. #define GP2AP020A00F_RES_A_100ms 0x18
  108. #define GP2AP020A00F_RES_A_25ms 0x20
  109. #define GP2AP020A00F_RES_A_6_25ms 0x28
  110. #define GP2AP020A00F_RES_A_1_56ms 0x30
  111. #define GP2AP020A00F_RES_A_0_39ms 0x38
  112. #define GP2AP020A00F_RANGE_A_MASK 0x07 /* ALS: Max measurable range */
  113. #define GP2AP020A00F_RANGE_A_x1 0x00
  114. #define GP2AP020A00F_RANGE_A_x2 0x01
  115. #define GP2AP020A00F_RANGE_A_x4 0x02
  116. #define GP2AP020A00F_RANGE_A_x8 0x03
  117. #define GP2AP020A00F_RANGE_A_x16 0x04
  118. #define GP2AP020A00F_RANGE_A_x32 0x05
  119. #define GP2AP020A00F_RANGE_A_x64 0x06
  120. #define GP2AP020A00F_RANGE_A_x128 0x07
  121. /* PS_REG bits */
  122. #define GP2AP020A00F_ALC_MASK 0x80 /* Auto light cancel */
  123. #define GP2AP020A00F_ALC_ON 0x80
  124. #define GP2AP020A00F_ALC_OFF 0x00
  125. #define GP2AP020A00F_INTTYPE_MASK 0x40 /* Interrupt type setting */
  126. #define GP2AP020A00F_INTTYPE_LEVEL 0x00
  127. #define GP2AP020A00F_INTTYPE_PULSE 0x40
  128. #define GP2AP020A00F_RES_P_MASK 0x38 /* PS: Resolution */
  129. #define GP2AP020A00F_RES_P_800ms_x2 0x00
  130. #define GP2AP020A00F_RES_P_400ms_x2 0x08
  131. #define GP2AP020A00F_RES_P_200ms_x2 0x10
  132. #define GP2AP020A00F_RES_P_100ms_x2 0x18
  133. #define GP2AP020A00F_RES_P_25ms_x2 0x20
  134. #define GP2AP020A00F_RES_P_6_25ms_x2 0x28
  135. #define GP2AP020A00F_RES_P_1_56ms_x2 0x30
  136. #define GP2AP020A00F_RES_P_0_39ms_x2 0x38
  137. #define GP2AP020A00F_RANGE_P_MASK 0x07 /* PS: Max measurable range */
  138. #define GP2AP020A00F_RANGE_P_x1 0x00
  139. #define GP2AP020A00F_RANGE_P_x2 0x01
  140. #define GP2AP020A00F_RANGE_P_x4 0x02
  141. #define GP2AP020A00F_RANGE_P_x8 0x03
  142. #define GP2AP020A00F_RANGE_P_x16 0x04
  143. #define GP2AP020A00F_RANGE_P_x32 0x05
  144. #define GP2AP020A00F_RANGE_P_x64 0x06
  145. #define GP2AP020A00F_RANGE_P_x128 0x07
  146. /* LED reg bits */
  147. #define GP2AP020A00F_INTVAL_MASK 0xc0 /* Intermittent operating */
  148. #define GP2AP020A00F_INTVAL_0 0x00
  149. #define GP2AP020A00F_INTVAL_4 0x40
  150. #define GP2AP020A00F_INTVAL_8 0x80
  151. #define GP2AP020A00F_INTVAL_16 0xc0
  152. #define GP2AP020A00F_IS_MASK 0x30 /* ILED drive peak current */
  153. #define GP2AP020A00F_IS_13_8mA 0x00
  154. #define GP2AP020A00F_IS_27_5mA 0x10
  155. #define GP2AP020A00F_IS_55mA 0x20
  156. #define GP2AP020A00F_IS_110mA 0x30
  157. #define GP2AP020A00F_PIN_MASK 0x0c /* INT terminal setting */
  158. #define GP2AP020A00F_PIN_ALS_OR_PS 0x00
  159. #define GP2AP020A00F_PIN_ALS 0x04
  160. #define GP2AP020A00F_PIN_PS 0x08
  161. #define GP2AP020A00F_PIN_PS_DETECT 0x0c
  162. #define GP2AP020A00F_FREQ_MASK 0x02 /* LED modulation frequency */
  163. #define GP2AP020A00F_FREQ_327_5kHz 0x00
  164. #define GP2AP020A00F_FREQ_81_8kHz 0x02
  165. #define GP2AP020A00F_RST 0x01 /* Software reset */
  166. #define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0
  167. #define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1
  168. #define GP2AP020A00F_SCAN_MODE_PROXIMITY 2
  169. #define GP2AP020A00F_CHAN_TIMESTAMP 3
  170. #define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000)
  171. #define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + \
  172. (chan) * 2)
  173. #define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + \
  174. (th_val_id) * 2)
  175. #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2)
  176. #define GP2AP020A00F_SUBTRACT_MODE 0
  177. #define GP2AP020A00F_ADD_MODE 1
  178. #define GP2AP020A00F_MAX_CHANNELS 3
  179. enum gp2ap020a00f_opmode {
  180. GP2AP020A00F_OPMODE_READ_RAW_CLEAR,
  181. GP2AP020A00F_OPMODE_READ_RAW_IR,
  182. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY,
  183. GP2AP020A00F_OPMODE_ALS,
  184. GP2AP020A00F_OPMODE_PS,
  185. GP2AP020A00F_OPMODE_ALS_AND_PS,
  186. GP2AP020A00F_OPMODE_PROX_DETECT,
  187. GP2AP020A00F_OPMODE_SHUTDOWN,
  188. GP2AP020A00F_NUM_OPMODES,
  189. };
  190. enum gp2ap020a00f_cmd {
  191. GP2AP020A00F_CMD_READ_RAW_CLEAR,
  192. GP2AP020A00F_CMD_READ_RAW_IR,
  193. GP2AP020A00F_CMD_READ_RAW_PROXIMITY,
  194. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN,
  195. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS,
  196. GP2AP020A00F_CMD_TRIGGER_IR_EN,
  197. GP2AP020A00F_CMD_TRIGGER_IR_DIS,
  198. GP2AP020A00F_CMD_TRIGGER_PROX_EN,
  199. GP2AP020A00F_CMD_TRIGGER_PROX_DIS,
  200. GP2AP020A00F_CMD_ALS_HIGH_EV_EN,
  201. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS,
  202. GP2AP020A00F_CMD_ALS_LOW_EV_EN,
  203. GP2AP020A00F_CMD_ALS_LOW_EV_DIS,
  204. GP2AP020A00F_CMD_PROX_HIGH_EV_EN,
  205. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS,
  206. GP2AP020A00F_CMD_PROX_LOW_EV_EN,
  207. GP2AP020A00F_CMD_PROX_LOW_EV_DIS,
  208. };
  209. enum gp2ap020a00f_flags {
  210. GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER,
  211. GP2AP020A00F_FLAG_ALS_IR_TRIGGER,
  212. GP2AP020A00F_FLAG_PROX_TRIGGER,
  213. GP2AP020A00F_FLAG_PROX_RISING_EV,
  214. GP2AP020A00F_FLAG_PROX_FALLING_EV,
  215. GP2AP020A00F_FLAG_ALS_RISING_EV,
  216. GP2AP020A00F_FLAG_ALS_FALLING_EV,
  217. GP2AP020A00F_FLAG_LUX_MODE_HI,
  218. GP2AP020A00F_FLAG_DATA_READY,
  219. };
  220. enum gp2ap020a00f_thresh_val_id {
  221. GP2AP020A00F_THRESH_TL,
  222. GP2AP020A00F_THRESH_TH,
  223. GP2AP020A00F_THRESH_PL,
  224. GP2AP020A00F_THRESH_PH,
  225. };
  226. struct gp2ap020a00f_data {
  227. const struct gp2ap020a00f_platform_data *pdata;
  228. struct i2c_client *client;
  229. struct mutex lock;
  230. char *buffer;
  231. struct regulator *vled_reg;
  232. unsigned long flags;
  233. enum gp2ap020a00f_opmode cur_opmode;
  234. struct iio_trigger *trig;
  235. struct regmap *regmap;
  236. unsigned int thresh_val[4];
  237. u8 debug_reg_addr;
  238. struct irq_work work;
  239. wait_queue_head_t data_ready_queue;
  240. };
  241. static const u8 gp2ap020a00f_reg_init_tab[] = {
  242. [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
  243. [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
  244. GP2AP020A00F_RANGE_A_x8,
  245. [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
  246. GP2AP020A00F_RES_P_1_56ms_x2 |
  247. GP2AP020A00F_RANGE_P_x4,
  248. [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
  249. GP2AP020A00F_IS_110mA |
  250. GP2AP020A00F_FREQ_327_5kHz,
  251. [GP2AP020A00F_TL_L_REG] = 0,
  252. [GP2AP020A00F_TL_H_REG] = 0,
  253. [GP2AP020A00F_TH_L_REG] = 0,
  254. [GP2AP020A00F_TH_H_REG] = 0,
  255. [GP2AP020A00F_PL_L_REG] = 0,
  256. [GP2AP020A00F_PL_H_REG] = 0,
  257. [GP2AP020A00F_PH_L_REG] = 0,
  258. [GP2AP020A00F_PH_H_REG] = 0,
  259. };
  260. static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
  261. {
  262. switch (reg) {
  263. case GP2AP020A00F_OP_REG:
  264. case GP2AP020A00F_D0_L_REG:
  265. case GP2AP020A00F_D0_H_REG:
  266. case GP2AP020A00F_D1_L_REG:
  267. case GP2AP020A00F_D1_H_REG:
  268. case GP2AP020A00F_D2_L_REG:
  269. case GP2AP020A00F_D2_H_REG:
  270. return true;
  271. default:
  272. return false;
  273. }
  274. }
  275. static const struct regmap_config gp2ap020a00f_regmap_config = {
  276. .reg_bits = 8,
  277. .val_bits = 8,
  278. .max_register = GP2AP020A00F_D2_H_REG,
  279. .cache_type = REGCACHE_RBTREE,
  280. .volatile_reg = gp2ap020a00f_is_volatile_reg,
  281. };
  282. static const struct gp2ap020a00f_mutable_config_regs {
  283. u8 op_reg;
  284. u8 als_reg;
  285. u8 ps_reg;
  286. u8 led_reg;
  287. } opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
  288. [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
  289. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  290. | GP2AP020A00F_OP3_OPERATION
  291. | GP2AP020A00F_TYPE_AUTO_CALC,
  292. GP2AP020A00F_PRST_ONCE,
  293. GP2AP020A00F_INTTYPE_LEVEL,
  294. GP2AP020A00F_PIN_ALS
  295. },
  296. [GP2AP020A00F_OPMODE_READ_RAW_IR] = {
  297. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  298. | GP2AP020A00F_OP3_OPERATION
  299. | GP2AP020A00F_TYPE_MANUAL_CALC,
  300. GP2AP020A00F_PRST_ONCE,
  301. GP2AP020A00F_INTTYPE_LEVEL,
  302. GP2AP020A00F_PIN_ALS
  303. },
  304. [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
  305. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  306. | GP2AP020A00F_OP3_OPERATION
  307. | GP2AP020A00F_TYPE_MANUAL_CALC,
  308. GP2AP020A00F_PRST_ONCE,
  309. GP2AP020A00F_INTTYPE_LEVEL,
  310. GP2AP020A00F_PIN_PS
  311. },
  312. [GP2AP020A00F_OPMODE_PROX_DETECT] = {
  313. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  314. | GP2AP020A00F_OP3_OPERATION
  315. | GP2AP020A00F_TYPE_MANUAL_CALC,
  316. GP2AP020A00F_PRST_4_CYCLES,
  317. GP2AP020A00F_INTTYPE_PULSE,
  318. GP2AP020A00F_PIN_PS_DETECT
  319. },
  320. [GP2AP020A00F_OPMODE_ALS] = {
  321. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  322. | GP2AP020A00F_OP3_OPERATION
  323. | GP2AP020A00F_TYPE_AUTO_CALC,
  324. GP2AP020A00F_PRST_ONCE,
  325. GP2AP020A00F_INTTYPE_LEVEL,
  326. GP2AP020A00F_PIN_ALS
  327. },
  328. [GP2AP020A00F_OPMODE_PS] = {
  329. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  330. | GP2AP020A00F_OP3_OPERATION
  331. | GP2AP020A00F_TYPE_MANUAL_CALC,
  332. GP2AP020A00F_PRST_4_CYCLES,
  333. GP2AP020A00F_INTTYPE_LEVEL,
  334. GP2AP020A00F_PIN_PS
  335. },
  336. [GP2AP020A00F_OPMODE_ALS_AND_PS] = {
  337. GP2AP020A00F_OP_ALS_AND_PS
  338. | GP2AP020A00F_OP2_CONT_OPERATION
  339. | GP2AP020A00F_OP3_OPERATION
  340. | GP2AP020A00F_TYPE_AUTO_CALC,
  341. GP2AP020A00F_PRST_4_CYCLES,
  342. GP2AP020A00F_INTTYPE_LEVEL,
  343. GP2AP020A00F_PIN_ALS_OR_PS
  344. },
  345. [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, },
  346. };
  347. static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data,
  348. enum gp2ap020a00f_opmode op)
  349. {
  350. unsigned int op_reg_val;
  351. int err;
  352. if (op != GP2AP020A00F_OPMODE_SHUTDOWN) {
  353. err = regmap_read(data->regmap, GP2AP020A00F_OP_REG,
  354. &op_reg_val);
  355. if (err < 0)
  356. return err;
  357. /*
  358. * Shutdown the device if the operation being executed entails
  359. * mode transition.
  360. */
  361. if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) !=
  362. (op_reg_val & GP2AP020A00F_OP_MASK)) {
  363. /* set shutdown mode */
  364. err = regmap_update_bits(data->regmap,
  365. GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK,
  366. GP2AP020A00F_OP3_SHUTDOWN);
  367. if (err < 0)
  368. return err;
  369. }
  370. err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG,
  371. GP2AP020A00F_PRST_MASK, opmode_regs_settings[op]
  372. .als_reg);
  373. if (err < 0)
  374. return err;
  375. err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG,
  376. GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op]
  377. .ps_reg);
  378. if (err < 0)
  379. return err;
  380. err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG,
  381. GP2AP020A00F_PIN_MASK, opmode_regs_settings[op]
  382. .led_reg);
  383. if (err < 0)
  384. return err;
  385. }
  386. /* Set OP_REG and apply operation mode (power on / off) */
  387. err = regmap_update_bits(data->regmap,
  388. GP2AP020A00F_OP_REG,
  389. GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK |
  390. GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK,
  391. opmode_regs_settings[op].op_reg);
  392. if (err < 0)
  393. return err;
  394. data->cur_opmode = op;
  395. return 0;
  396. }
  397. static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data)
  398. {
  399. return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) ||
  400. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) ||
  401. test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) ||
  402. test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  403. }
  404. static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data)
  405. {
  406. return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) ||
  407. test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  408. }
  409. static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data,
  410. enum gp2ap020a00f_thresh_val_id th_val_id,
  411. bool enable)
  412. {
  413. __le16 thresh_buf = 0;
  414. unsigned int thresh_reg_val;
  415. if (!enable)
  416. thresh_reg_val = 0;
  417. else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) &&
  418. th_val_id != GP2AP020A00F_THRESH_PL &&
  419. th_val_id != GP2AP020A00F_THRESH_PH)
  420. /*
  421. * For the high lux mode ALS threshold has to be scaled down
  422. * to allow for proper comparison with the output value.
  423. */
  424. thresh_reg_val = data->thresh_val[th_val_id] / 16;
  425. else
  426. thresh_reg_val = data->thresh_val[th_val_id] > 16000 ?
  427. 16000 :
  428. data->thresh_val[th_val_id];
  429. thresh_buf = cpu_to_le16(thresh_reg_val);
  430. return regmap_bulk_write(data->regmap,
  431. GP2AP020A00F_THRESH_REG(th_val_id),
  432. (u8 *)&thresh_buf, 2);
  433. }
  434. static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data,
  435. enum gp2ap020a00f_opmode diff_mode, int add_sub)
  436. {
  437. enum gp2ap020a00f_opmode new_mode;
  438. if (diff_mode != GP2AP020A00F_OPMODE_ALS &&
  439. diff_mode != GP2AP020A00F_OPMODE_PS)
  440. return -EINVAL;
  441. if (add_sub == GP2AP020A00F_ADD_MODE) {
  442. if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN)
  443. new_mode = diff_mode;
  444. else
  445. new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS;
  446. } else {
  447. if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS)
  448. new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ?
  449. GP2AP020A00F_OPMODE_PS :
  450. GP2AP020A00F_OPMODE_ALS;
  451. else
  452. new_mode = GP2AP020A00F_OPMODE_SHUTDOWN;
  453. }
  454. return gp2ap020a00f_set_operation_mode(data, new_mode);
  455. }
  456. static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data,
  457. enum gp2ap020a00f_cmd cmd)
  458. {
  459. int err = 0;
  460. switch (cmd) {
  461. case GP2AP020A00F_CMD_READ_RAW_CLEAR:
  462. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  463. return -EBUSY;
  464. err = gp2ap020a00f_set_operation_mode(data,
  465. GP2AP020A00F_OPMODE_READ_RAW_CLEAR);
  466. break;
  467. case GP2AP020A00F_CMD_READ_RAW_IR:
  468. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  469. return -EBUSY;
  470. err = gp2ap020a00f_set_operation_mode(data,
  471. GP2AP020A00F_OPMODE_READ_RAW_IR);
  472. break;
  473. case GP2AP020A00F_CMD_READ_RAW_PROXIMITY:
  474. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  475. return -EBUSY;
  476. err = gp2ap020a00f_set_operation_mode(data,
  477. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY);
  478. break;
  479. case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN:
  480. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  481. return -EBUSY;
  482. if (!gp2ap020a00f_als_enabled(data))
  483. err = gp2ap020a00f_alter_opmode(data,
  484. GP2AP020A00F_OPMODE_ALS,
  485. GP2AP020A00F_ADD_MODE);
  486. set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  487. break;
  488. case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS:
  489. clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  490. if (gp2ap020a00f_als_enabled(data))
  491. break;
  492. err = gp2ap020a00f_alter_opmode(data,
  493. GP2AP020A00F_OPMODE_ALS,
  494. GP2AP020A00F_SUBTRACT_MODE);
  495. break;
  496. case GP2AP020A00F_CMD_TRIGGER_IR_EN:
  497. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  498. return -EBUSY;
  499. if (!gp2ap020a00f_als_enabled(data))
  500. err = gp2ap020a00f_alter_opmode(data,
  501. GP2AP020A00F_OPMODE_ALS,
  502. GP2AP020A00F_ADD_MODE);
  503. set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  504. break;
  505. case GP2AP020A00F_CMD_TRIGGER_IR_DIS:
  506. clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  507. if (gp2ap020a00f_als_enabled(data))
  508. break;
  509. err = gp2ap020a00f_alter_opmode(data,
  510. GP2AP020A00F_OPMODE_ALS,
  511. GP2AP020A00F_SUBTRACT_MODE);
  512. break;
  513. case GP2AP020A00F_CMD_TRIGGER_PROX_EN:
  514. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  515. return -EBUSY;
  516. err = gp2ap020a00f_alter_opmode(data,
  517. GP2AP020A00F_OPMODE_PS,
  518. GP2AP020A00F_ADD_MODE);
  519. set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  520. break;
  521. case GP2AP020A00F_CMD_TRIGGER_PROX_DIS:
  522. clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  523. err = gp2ap020a00f_alter_opmode(data,
  524. GP2AP020A00F_OPMODE_PS,
  525. GP2AP020A00F_SUBTRACT_MODE);
  526. break;
  527. case GP2AP020A00F_CMD_ALS_HIGH_EV_EN:
  528. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  529. return 0;
  530. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  531. return -EBUSY;
  532. if (!gp2ap020a00f_als_enabled(data)) {
  533. err = gp2ap020a00f_alter_opmode(data,
  534. GP2AP020A00F_OPMODE_ALS,
  535. GP2AP020A00F_ADD_MODE);
  536. if (err < 0)
  537. return err;
  538. }
  539. set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  540. err = gp2ap020a00f_write_event_threshold(data,
  541. GP2AP020A00F_THRESH_TH, true);
  542. break;
  543. case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS:
  544. if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  545. return 0;
  546. clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  547. if (!gp2ap020a00f_als_enabled(data)) {
  548. err = gp2ap020a00f_alter_opmode(data,
  549. GP2AP020A00F_OPMODE_ALS,
  550. GP2AP020A00F_SUBTRACT_MODE);
  551. if (err < 0)
  552. return err;
  553. }
  554. err = gp2ap020a00f_write_event_threshold(data,
  555. GP2AP020A00F_THRESH_TH, false);
  556. break;
  557. case GP2AP020A00F_CMD_ALS_LOW_EV_EN:
  558. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  559. return 0;
  560. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  561. return -EBUSY;
  562. if (!gp2ap020a00f_als_enabled(data)) {
  563. err = gp2ap020a00f_alter_opmode(data,
  564. GP2AP020A00F_OPMODE_ALS,
  565. GP2AP020A00F_ADD_MODE);
  566. if (err < 0)
  567. return err;
  568. }
  569. set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  570. err = gp2ap020a00f_write_event_threshold(data,
  571. GP2AP020A00F_THRESH_TL, true);
  572. break;
  573. case GP2AP020A00F_CMD_ALS_LOW_EV_DIS:
  574. if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  575. return 0;
  576. clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  577. if (!gp2ap020a00f_als_enabled(data)) {
  578. err = gp2ap020a00f_alter_opmode(data,
  579. GP2AP020A00F_OPMODE_ALS,
  580. GP2AP020A00F_SUBTRACT_MODE);
  581. if (err < 0)
  582. return err;
  583. }
  584. err = gp2ap020a00f_write_event_threshold(data,
  585. GP2AP020A00F_THRESH_TL, false);
  586. break;
  587. case GP2AP020A00F_CMD_PROX_HIGH_EV_EN:
  588. if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  589. return 0;
  590. if (gp2ap020a00f_als_enabled(data) ||
  591. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  592. return -EBUSY;
  593. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  594. err = gp2ap020a00f_set_operation_mode(data,
  595. GP2AP020A00F_OPMODE_PROX_DETECT);
  596. if (err < 0)
  597. return err;
  598. }
  599. set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  600. err = gp2ap020a00f_write_event_threshold(data,
  601. GP2AP020A00F_THRESH_PH, true);
  602. break;
  603. case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS:
  604. if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  605. return 0;
  606. clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  607. err = gp2ap020a00f_set_operation_mode(data,
  608. GP2AP020A00F_OPMODE_SHUTDOWN);
  609. if (err < 0)
  610. return err;
  611. err = gp2ap020a00f_write_event_threshold(data,
  612. GP2AP020A00F_THRESH_PH, false);
  613. break;
  614. case GP2AP020A00F_CMD_PROX_LOW_EV_EN:
  615. if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  616. return 0;
  617. if (gp2ap020a00f_als_enabled(data) ||
  618. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  619. return -EBUSY;
  620. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  621. err = gp2ap020a00f_set_operation_mode(data,
  622. GP2AP020A00F_OPMODE_PROX_DETECT);
  623. if (err < 0)
  624. return err;
  625. }
  626. set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  627. err = gp2ap020a00f_write_event_threshold(data,
  628. GP2AP020A00F_THRESH_PL, true);
  629. break;
  630. case GP2AP020A00F_CMD_PROX_LOW_EV_DIS:
  631. if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  632. return 0;
  633. clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  634. err = gp2ap020a00f_set_operation_mode(data,
  635. GP2AP020A00F_OPMODE_SHUTDOWN);
  636. if (err < 0)
  637. return err;
  638. err = gp2ap020a00f_write_event_threshold(data,
  639. GP2AP020A00F_THRESH_PL, false);
  640. break;
  641. }
  642. return err;
  643. }
  644. static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data)
  645. {
  646. int ret;
  647. ret = wait_event_timeout(data->data_ready_queue,
  648. test_bit(GP2AP020A00F_FLAG_DATA_READY,
  649. &data->flags),
  650. GP2AP020A00F_DATA_READY_TIMEOUT);
  651. clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags);
  652. return ret > 0 ? 0 : -ETIME;
  653. }
  654. static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data,
  655. unsigned int output_reg, int *val)
  656. {
  657. u8 reg_buf[2];
  658. int err;
  659. err = wait_conversion_complete_irq(data);
  660. if (err < 0)
  661. dev_dbg(&data->client->dev, "data ready timeout\n");
  662. err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2);
  663. if (err < 0)
  664. return err;
  665. *val = le16_to_cpup((__le16 *)reg_buf);
  666. return err;
  667. }
  668. static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data,
  669. int output_val)
  670. {
  671. u8 new_range = 0xff;
  672. int err;
  673. if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) {
  674. if (output_val > 16000) {
  675. set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  676. new_range = GP2AP020A00F_RANGE_A_x128;
  677. }
  678. } else {
  679. if (output_val < 1000) {
  680. clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  681. new_range = GP2AP020A00F_RANGE_A_x8;
  682. }
  683. }
  684. if (new_range != 0xff) {
  685. /* Clear als threshold registers to avoid spurious
  686. * events caused by lux mode transition.
  687. */
  688. err = gp2ap020a00f_write_event_threshold(data,
  689. GP2AP020A00F_THRESH_TH, false);
  690. if (err < 0) {
  691. dev_err(&data->client->dev,
  692. "Clearing als threshold register failed.\n");
  693. return false;
  694. }
  695. err = gp2ap020a00f_write_event_threshold(data,
  696. GP2AP020A00F_THRESH_TL, false);
  697. if (err < 0) {
  698. dev_err(&data->client->dev,
  699. "Clearing als threshold register failed.\n");
  700. return false;
  701. }
  702. /* Change lux mode */
  703. err = regmap_update_bits(data->regmap,
  704. GP2AP020A00F_OP_REG,
  705. GP2AP020A00F_OP3_MASK,
  706. GP2AP020A00F_OP3_SHUTDOWN);
  707. if (err < 0) {
  708. dev_err(&data->client->dev,
  709. "Shutting down the device failed.\n");
  710. return false;
  711. }
  712. err = regmap_update_bits(data->regmap,
  713. GP2AP020A00F_ALS_REG,
  714. GP2AP020A00F_RANGE_A_MASK,
  715. new_range);
  716. if (err < 0) {
  717. dev_err(&data->client->dev,
  718. "Adjusting device lux mode failed.\n");
  719. return false;
  720. }
  721. err = regmap_update_bits(data->regmap,
  722. GP2AP020A00F_OP_REG,
  723. GP2AP020A00F_OP3_MASK,
  724. GP2AP020A00F_OP3_OPERATION);
  725. if (err < 0) {
  726. dev_err(&data->client->dev,
  727. "Powering up the device failed.\n");
  728. return false;
  729. }
  730. /* Adjust als threshold register values to the new lux mode */
  731. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) {
  732. err = gp2ap020a00f_write_event_threshold(data,
  733. GP2AP020A00F_THRESH_TH, true);
  734. if (err < 0) {
  735. dev_err(&data->client->dev,
  736. "Adjusting als threshold value failed.\n");
  737. return false;
  738. }
  739. }
  740. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) {
  741. err = gp2ap020a00f_write_event_threshold(data,
  742. GP2AP020A00F_THRESH_TL, true);
  743. if (err < 0) {
  744. dev_err(&data->client->dev,
  745. "Adjusting als threshold value failed.\n");
  746. return false;
  747. }
  748. }
  749. return true;
  750. }
  751. return false;
  752. }
  753. static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data,
  754. int *output_val)
  755. {
  756. if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags))
  757. *output_val *= 16;
  758. }
  759. static void gp2ap020a00f_iio_trigger_work(struct irq_work *work)
  760. {
  761. struct gp2ap020a00f_data *data =
  762. container_of(work, struct gp2ap020a00f_data, work);
  763. iio_trigger_poll(data->trig);
  764. }
  765. static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
  766. {
  767. struct iio_dev *indio_dev = data;
  768. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  769. unsigned int op_reg_val;
  770. int ret;
  771. /* Read interrupt flags */
  772. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
  773. if (ret < 0)
  774. return IRQ_HANDLED;
  775. if (gp2ap020a00f_prox_detect_enabled(priv)) {
  776. if (op_reg_val & GP2AP020A00F_PROX_DETECT) {
  777. iio_push_event(indio_dev,
  778. IIO_UNMOD_EVENT_CODE(
  779. IIO_PROXIMITY,
  780. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  781. IIO_EV_TYPE_ROC,
  782. IIO_EV_DIR_RISING),
  783. iio_get_time_ns(indio_dev));
  784. } else {
  785. iio_push_event(indio_dev,
  786. IIO_UNMOD_EVENT_CODE(
  787. IIO_PROXIMITY,
  788. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  789. IIO_EV_TYPE_ROC,
  790. IIO_EV_DIR_FALLING),
  791. iio_get_time_ns(indio_dev));
  792. }
  793. }
  794. return IRQ_HANDLED;
  795. }
  796. static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data)
  797. {
  798. struct iio_dev *indio_dev = data;
  799. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  800. u8 op_reg_flags, d0_reg_buf[2];
  801. unsigned int output_val, op_reg_val;
  802. int thresh_val_id, ret;
  803. /* Read interrupt flags */
  804. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG,
  805. &op_reg_val);
  806. if (ret < 0)
  807. goto done;
  808. op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P
  809. | GP2AP020A00F_PROX_DETECT);
  810. op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P
  811. & ~GP2AP020A00F_PROX_DETECT);
  812. /* Clear interrupt flags (if not in INTTYPE_PULSE mode) */
  813. if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) {
  814. ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG,
  815. op_reg_val);
  816. if (ret < 0)
  817. goto done;
  818. }
  819. if (op_reg_flags & GP2AP020A00F_FLAG_A) {
  820. /* Check D0 register to assess if the lux mode
  821. * transition is required.
  822. */
  823. ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG,
  824. d0_reg_buf, 2);
  825. if (ret < 0)
  826. goto done;
  827. output_val = le16_to_cpup((__le16 *)d0_reg_buf);
  828. if (gp2ap020a00f_adjust_lux_mode(priv, output_val))
  829. goto done;
  830. gp2ap020a00f_output_to_lux(priv, &output_val);
  831. /*
  832. * We need to check output value to distinguish
  833. * between high and low ambient light threshold event.
  834. */
  835. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) {
  836. thresh_val_id =
  837. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG);
  838. if (output_val > priv->thresh_val[thresh_val_id])
  839. iio_push_event(indio_dev,
  840. IIO_MOD_EVENT_CODE(
  841. IIO_LIGHT,
  842. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  843. IIO_MOD_LIGHT_CLEAR,
  844. IIO_EV_TYPE_THRESH,
  845. IIO_EV_DIR_RISING),
  846. iio_get_time_ns(indio_dev));
  847. }
  848. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) {
  849. thresh_val_id =
  850. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG);
  851. if (output_val < priv->thresh_val[thresh_val_id])
  852. iio_push_event(indio_dev,
  853. IIO_MOD_EVENT_CODE(
  854. IIO_LIGHT,
  855. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  856. IIO_MOD_LIGHT_CLEAR,
  857. IIO_EV_TYPE_THRESH,
  858. IIO_EV_DIR_FALLING),
  859. iio_get_time_ns(indio_dev));
  860. }
  861. }
  862. if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR ||
  863. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR ||
  864. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) {
  865. set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags);
  866. wake_up(&priv->data_ready_queue);
  867. goto done;
  868. }
  869. if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) ||
  870. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) ||
  871. test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags))
  872. /* This fires off the trigger. */
  873. irq_work_queue(&priv->work);
  874. done:
  875. return IRQ_HANDLED;
  876. }
  877. static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data)
  878. {
  879. struct iio_poll_func *pf = data;
  880. struct iio_dev *indio_dev = pf->indio_dev;
  881. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  882. size_t d_size = 0;
  883. int i, out_val, ret;
  884. for_each_set_bit(i, indio_dev->active_scan_mask,
  885. indio_dev->masklength) {
  886. ret = regmap_bulk_read(priv->regmap,
  887. GP2AP020A00F_DATA_REG(i),
  888. &priv->buffer[d_size], 2);
  889. if (ret < 0)
  890. goto done;
  891. if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR ||
  892. i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
  893. out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]);
  894. gp2ap020a00f_output_to_lux(priv, &out_val);
  895. put_unaligned_le32(out_val, &priv->buffer[d_size]);
  896. d_size += 4;
  897. } else {
  898. d_size += 2;
  899. }
  900. }
  901. iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer,
  902. pf->timestamp);
  903. done:
  904. iio_trigger_notify_done(indio_dev->trig);
  905. return IRQ_HANDLED;
  906. }
  907. static u8 gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan,
  908. enum iio_event_direction event_dir)
  909. {
  910. switch (chan->type) {
  911. case IIO_PROXIMITY:
  912. if (event_dir == IIO_EV_DIR_RISING)
  913. return GP2AP020A00F_PH_L_REG;
  914. else
  915. return GP2AP020A00F_PL_L_REG;
  916. case IIO_LIGHT:
  917. if (event_dir == IIO_EV_DIR_RISING)
  918. return GP2AP020A00F_TH_L_REG;
  919. else
  920. return GP2AP020A00F_TL_L_REG;
  921. default:
  922. break;
  923. }
  924. return -EINVAL;
  925. }
  926. static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev,
  927. const struct iio_chan_spec *chan,
  928. enum iio_event_type type,
  929. enum iio_event_direction dir,
  930. enum iio_event_info info,
  931. int val, int val2)
  932. {
  933. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  934. bool event_en = false;
  935. u8 thresh_val_id;
  936. u8 thresh_reg_l;
  937. int err = 0;
  938. mutex_lock(&data->lock);
  939. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  940. thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l);
  941. if (thresh_val_id > GP2AP020A00F_THRESH_PH) {
  942. err = -EINVAL;
  943. goto error_unlock;
  944. }
  945. switch (thresh_reg_l) {
  946. case GP2AP020A00F_TH_L_REG:
  947. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  948. &data->flags);
  949. break;
  950. case GP2AP020A00F_TL_L_REG:
  951. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  952. &data->flags);
  953. break;
  954. case GP2AP020A00F_PH_L_REG:
  955. if (val == 0) {
  956. err = -EINVAL;
  957. goto error_unlock;
  958. }
  959. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  960. &data->flags);
  961. break;
  962. case GP2AP020A00F_PL_L_REG:
  963. if (val == 0) {
  964. err = -EINVAL;
  965. goto error_unlock;
  966. }
  967. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  968. &data->flags);
  969. break;
  970. }
  971. data->thresh_val[thresh_val_id] = val;
  972. err = gp2ap020a00f_write_event_threshold(data, thresh_val_id,
  973. event_en);
  974. error_unlock:
  975. mutex_unlock(&data->lock);
  976. return err;
  977. }
  978. static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev,
  979. const struct iio_chan_spec *chan,
  980. enum iio_event_type type,
  981. enum iio_event_direction dir,
  982. enum iio_event_info info,
  983. int *val, int *val2)
  984. {
  985. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  986. u8 thresh_reg_l;
  987. int err = IIO_VAL_INT;
  988. mutex_lock(&data->lock);
  989. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  990. if (thresh_reg_l > GP2AP020A00F_PH_L_REG) {
  991. err = -EINVAL;
  992. goto error_unlock;
  993. }
  994. *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)];
  995. error_unlock:
  996. mutex_unlock(&data->lock);
  997. return err;
  998. }
  999. static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev,
  1000. int state)
  1001. {
  1002. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1003. enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev;
  1004. int err;
  1005. cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN :
  1006. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS;
  1007. cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN :
  1008. GP2AP020A00F_CMD_PROX_LOW_EV_DIS;
  1009. /*
  1010. * In order to enable proximity detection feature in the device
  1011. * both high and low threshold registers have to be written
  1012. * with different values, greater than zero.
  1013. */
  1014. if (state) {
  1015. if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0)
  1016. return -EINVAL;
  1017. if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0)
  1018. return -EINVAL;
  1019. }
  1020. err = gp2ap020a00f_exec_cmd(data, cmd_high_ev);
  1021. if (err < 0)
  1022. return err;
  1023. err = gp2ap020a00f_exec_cmd(data, cmd_low_ev);
  1024. if (err < 0)
  1025. return err;
  1026. free_irq(data->client->irq, indio_dev);
  1027. if (state)
  1028. err = request_threaded_irq(data->client->irq, NULL,
  1029. &gp2ap020a00f_prox_sensing_handler,
  1030. IRQF_TRIGGER_RISING |
  1031. IRQF_TRIGGER_FALLING |
  1032. IRQF_ONESHOT,
  1033. "gp2ap020a00f_prox_sensing",
  1034. indio_dev);
  1035. else {
  1036. err = request_threaded_irq(data->client->irq, NULL,
  1037. &gp2ap020a00f_thresh_event_handler,
  1038. IRQF_TRIGGER_FALLING |
  1039. IRQF_ONESHOT,
  1040. "gp2ap020a00f_thresh_event",
  1041. indio_dev);
  1042. }
  1043. return err;
  1044. }
  1045. static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev,
  1046. const struct iio_chan_spec *chan,
  1047. enum iio_event_type type,
  1048. enum iio_event_direction dir,
  1049. int state)
  1050. {
  1051. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1052. enum gp2ap020a00f_cmd cmd;
  1053. int err;
  1054. mutex_lock(&data->lock);
  1055. switch (chan->type) {
  1056. case IIO_PROXIMITY:
  1057. err = gp2ap020a00f_write_prox_event_config(indio_dev, state);
  1058. break;
  1059. case IIO_LIGHT:
  1060. if (dir == IIO_EV_DIR_RISING) {
  1061. cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN :
  1062. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS;
  1063. err = gp2ap020a00f_exec_cmd(data, cmd);
  1064. } else {
  1065. cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN :
  1066. GP2AP020A00F_CMD_ALS_LOW_EV_DIS;
  1067. err = gp2ap020a00f_exec_cmd(data, cmd);
  1068. }
  1069. break;
  1070. default:
  1071. err = -EINVAL;
  1072. }
  1073. mutex_unlock(&data->lock);
  1074. return err;
  1075. }
  1076. static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev,
  1077. const struct iio_chan_spec *chan,
  1078. enum iio_event_type type,
  1079. enum iio_event_direction dir)
  1080. {
  1081. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1082. int event_en = 0;
  1083. mutex_lock(&data->lock);
  1084. switch (chan->type) {
  1085. case IIO_PROXIMITY:
  1086. if (dir == IIO_EV_DIR_RISING)
  1087. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  1088. &data->flags);
  1089. else
  1090. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  1091. &data->flags);
  1092. break;
  1093. case IIO_LIGHT:
  1094. if (dir == IIO_EV_DIR_RISING)
  1095. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  1096. &data->flags);
  1097. else
  1098. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  1099. &data->flags);
  1100. break;
  1101. default:
  1102. event_en = -EINVAL;
  1103. break;
  1104. }
  1105. mutex_unlock(&data->lock);
  1106. return event_en;
  1107. }
  1108. static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data,
  1109. struct iio_chan_spec const *chan, int *val)
  1110. {
  1111. enum gp2ap020a00f_cmd cmd;
  1112. int err;
  1113. switch (chan->scan_index) {
  1114. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1115. cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR;
  1116. break;
  1117. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1118. cmd = GP2AP020A00F_CMD_READ_RAW_IR;
  1119. break;
  1120. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1121. cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY;
  1122. break;
  1123. default:
  1124. return -EINVAL;
  1125. }
  1126. err = gp2ap020a00f_exec_cmd(data, cmd);
  1127. if (err < 0) {
  1128. dev_err(&data->client->dev,
  1129. "gp2ap020a00f_exec_cmd failed\n");
  1130. goto error_ret;
  1131. }
  1132. err = gp2ap020a00f_read_output(data, chan->address, val);
  1133. if (err < 0)
  1134. dev_err(&data->client->dev,
  1135. "gp2ap020a00f_read_output failed\n");
  1136. err = gp2ap020a00f_set_operation_mode(data,
  1137. GP2AP020A00F_OPMODE_SHUTDOWN);
  1138. if (err < 0)
  1139. dev_err(&data->client->dev,
  1140. "Failed to shut down the device.\n");
  1141. if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR ||
  1142. cmd == GP2AP020A00F_CMD_READ_RAW_IR)
  1143. gp2ap020a00f_output_to_lux(data, val);
  1144. error_ret:
  1145. return err;
  1146. }
  1147. static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev,
  1148. struct iio_chan_spec const *chan,
  1149. int *val, int *val2,
  1150. long mask)
  1151. {
  1152. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1153. int err = -EINVAL;
  1154. if (mask == IIO_CHAN_INFO_RAW) {
  1155. err = iio_device_claim_direct_mode(indio_dev);
  1156. if (err)
  1157. return err;
  1158. err = gp2ap020a00f_read_channel(data, chan, val);
  1159. iio_device_release_direct_mode(indio_dev);
  1160. }
  1161. return err < 0 ? err : IIO_VAL_INT;
  1162. }
  1163. static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = {
  1164. {
  1165. .type = IIO_EV_TYPE_THRESH,
  1166. .dir = IIO_EV_DIR_RISING,
  1167. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1168. BIT(IIO_EV_INFO_ENABLE),
  1169. }, {
  1170. .type = IIO_EV_TYPE_THRESH,
  1171. .dir = IIO_EV_DIR_FALLING,
  1172. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1173. BIT(IIO_EV_INFO_ENABLE),
  1174. },
  1175. };
  1176. static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = {
  1177. {
  1178. .type = IIO_EV_TYPE_ROC,
  1179. .dir = IIO_EV_DIR_RISING,
  1180. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1181. BIT(IIO_EV_INFO_ENABLE),
  1182. }, {
  1183. .type = IIO_EV_TYPE_ROC,
  1184. .dir = IIO_EV_DIR_FALLING,
  1185. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1186. BIT(IIO_EV_INFO_ENABLE),
  1187. },
  1188. };
  1189. static const struct iio_chan_spec gp2ap020a00f_channels[] = {
  1190. {
  1191. .type = IIO_LIGHT,
  1192. .channel2 = IIO_MOD_LIGHT_CLEAR,
  1193. .modified = 1,
  1194. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1195. .scan_type = {
  1196. .sign = 'u',
  1197. .realbits = 24,
  1198. .shift = 0,
  1199. .storagebits = 32,
  1200. .endianness = IIO_LE,
  1201. },
  1202. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  1203. .address = GP2AP020A00F_D0_L_REG,
  1204. .event_spec = gp2ap020a00f_event_spec_light,
  1205. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light),
  1206. },
  1207. {
  1208. .type = IIO_LIGHT,
  1209. .channel2 = IIO_MOD_LIGHT_IR,
  1210. .modified = 1,
  1211. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1212. .scan_type = {
  1213. .sign = 'u',
  1214. .realbits = 24,
  1215. .shift = 0,
  1216. .storagebits = 32,
  1217. .endianness = IIO_LE,
  1218. },
  1219. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR,
  1220. .address = GP2AP020A00F_D1_L_REG,
  1221. },
  1222. {
  1223. .type = IIO_PROXIMITY,
  1224. .modified = 0,
  1225. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1226. .scan_type = {
  1227. .sign = 'u',
  1228. .realbits = 16,
  1229. .shift = 0,
  1230. .storagebits = 16,
  1231. .endianness = IIO_LE,
  1232. },
  1233. .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY,
  1234. .address = GP2AP020A00F_D2_L_REG,
  1235. .event_spec = gp2ap020a00f_event_spec_prox,
  1236. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox),
  1237. },
  1238. IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP),
  1239. };
  1240. static const struct iio_info gp2ap020a00f_info = {
  1241. .read_raw = &gp2ap020a00f_read_raw,
  1242. .read_event_value = &gp2ap020a00f_read_event_val,
  1243. .read_event_config = &gp2ap020a00f_read_event_config,
  1244. .write_event_value = &gp2ap020a00f_write_event_val,
  1245. .write_event_config = &gp2ap020a00f_write_event_config,
  1246. .driver_module = THIS_MODULE,
  1247. };
  1248. static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev)
  1249. {
  1250. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1251. int i, err = 0;
  1252. mutex_lock(&data->lock);
  1253. /*
  1254. * Enable triggers according to the scan_mask. Enabling either
  1255. * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS
  1256. * module in the device, which generates samples in both D0 (clear)
  1257. * and D1 (ir) registers. As the two registers are bound to the
  1258. * two separate IIO channels they are treated in the driver logic
  1259. * as if they were controlled independently.
  1260. */
  1261. for_each_set_bit(i, indio_dev->active_scan_mask,
  1262. indio_dev->masklength) {
  1263. switch (i) {
  1264. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1265. err = gp2ap020a00f_exec_cmd(data,
  1266. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN);
  1267. break;
  1268. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1269. err = gp2ap020a00f_exec_cmd(data,
  1270. GP2AP020A00F_CMD_TRIGGER_IR_EN);
  1271. break;
  1272. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1273. err = gp2ap020a00f_exec_cmd(data,
  1274. GP2AP020A00F_CMD_TRIGGER_PROX_EN);
  1275. break;
  1276. }
  1277. }
  1278. if (err < 0)
  1279. goto error_unlock;
  1280. data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  1281. if (!data->buffer) {
  1282. err = -ENOMEM;
  1283. goto error_unlock;
  1284. }
  1285. err = iio_triggered_buffer_postenable(indio_dev);
  1286. error_unlock:
  1287. mutex_unlock(&data->lock);
  1288. return err;
  1289. }
  1290. static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev)
  1291. {
  1292. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1293. int i, err;
  1294. mutex_lock(&data->lock);
  1295. err = iio_triggered_buffer_predisable(indio_dev);
  1296. if (err < 0)
  1297. goto error_unlock;
  1298. for_each_set_bit(i, indio_dev->active_scan_mask,
  1299. indio_dev->masklength) {
  1300. switch (i) {
  1301. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1302. err = gp2ap020a00f_exec_cmd(data,
  1303. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS);
  1304. break;
  1305. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1306. err = gp2ap020a00f_exec_cmd(data,
  1307. GP2AP020A00F_CMD_TRIGGER_IR_DIS);
  1308. break;
  1309. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1310. err = gp2ap020a00f_exec_cmd(data,
  1311. GP2AP020A00F_CMD_TRIGGER_PROX_DIS);
  1312. break;
  1313. }
  1314. }
  1315. if (err == 0)
  1316. kfree(data->buffer);
  1317. error_unlock:
  1318. mutex_unlock(&data->lock);
  1319. return err;
  1320. }
  1321. static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = {
  1322. .postenable = &gp2ap020a00f_buffer_postenable,
  1323. .predisable = &gp2ap020a00f_buffer_predisable,
  1324. };
  1325. static const struct iio_trigger_ops gp2ap020a00f_trigger_ops = {
  1326. .owner = THIS_MODULE,
  1327. };
  1328. static int gp2ap020a00f_probe(struct i2c_client *client,
  1329. const struct i2c_device_id *id)
  1330. {
  1331. struct gp2ap020a00f_data *data;
  1332. struct iio_dev *indio_dev;
  1333. struct regmap *regmap;
  1334. int err;
  1335. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  1336. if (!indio_dev)
  1337. return -ENOMEM;
  1338. data = iio_priv(indio_dev);
  1339. data->vled_reg = devm_regulator_get(&client->dev, "vled");
  1340. if (IS_ERR(data->vled_reg))
  1341. return PTR_ERR(data->vled_reg);
  1342. err = regulator_enable(data->vled_reg);
  1343. if (err)
  1344. return err;
  1345. regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config);
  1346. if (IS_ERR(regmap)) {
  1347. dev_err(&client->dev, "Regmap initialization failed.\n");
  1348. err = PTR_ERR(regmap);
  1349. goto error_regulator_disable;
  1350. }
  1351. /* Initialize device registers */
  1352. err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG,
  1353. gp2ap020a00f_reg_init_tab,
  1354. ARRAY_SIZE(gp2ap020a00f_reg_init_tab));
  1355. if (err < 0) {
  1356. dev_err(&client->dev, "Device initialization failed.\n");
  1357. goto error_regulator_disable;
  1358. }
  1359. i2c_set_clientdata(client, indio_dev);
  1360. data->client = client;
  1361. data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN;
  1362. data->regmap = regmap;
  1363. init_waitqueue_head(&data->data_ready_queue);
  1364. mutex_init(&data->lock);
  1365. indio_dev->dev.parent = &client->dev;
  1366. indio_dev->channels = gp2ap020a00f_channels;
  1367. indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels);
  1368. indio_dev->info = &gp2ap020a00f_info;
  1369. indio_dev->name = id->name;
  1370. indio_dev->modes = INDIO_DIRECT_MODE;
  1371. /* Allocate buffer */
  1372. err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  1373. &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops);
  1374. if (err < 0)
  1375. goto error_regulator_disable;
  1376. /* Allocate trigger */
  1377. data->trig = devm_iio_trigger_alloc(&client->dev, "%s-trigger",
  1378. indio_dev->name);
  1379. if (data->trig == NULL) {
  1380. err = -ENOMEM;
  1381. dev_err(&indio_dev->dev, "Failed to allocate iio trigger.\n");
  1382. goto error_uninit_buffer;
  1383. }
  1384. /* This needs to be requested here for read_raw calls to work. */
  1385. err = request_threaded_irq(client->irq, NULL,
  1386. &gp2ap020a00f_thresh_event_handler,
  1387. IRQF_TRIGGER_FALLING |
  1388. IRQF_ONESHOT,
  1389. "gp2ap020a00f_als_event",
  1390. indio_dev);
  1391. if (err < 0) {
  1392. dev_err(&client->dev, "Irq request failed.\n");
  1393. goto error_uninit_buffer;
  1394. }
  1395. data->trig->ops = &gp2ap020a00f_trigger_ops;
  1396. data->trig->dev.parent = &data->client->dev;
  1397. init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work);
  1398. err = iio_trigger_register(data->trig);
  1399. if (err < 0) {
  1400. dev_err(&client->dev, "Failed to register iio trigger.\n");
  1401. goto error_free_irq;
  1402. }
  1403. err = iio_device_register(indio_dev);
  1404. if (err < 0)
  1405. goto error_trigger_unregister;
  1406. return 0;
  1407. error_trigger_unregister:
  1408. iio_trigger_unregister(data->trig);
  1409. error_free_irq:
  1410. free_irq(client->irq, indio_dev);
  1411. error_uninit_buffer:
  1412. iio_triggered_buffer_cleanup(indio_dev);
  1413. error_regulator_disable:
  1414. regulator_disable(data->vled_reg);
  1415. return err;
  1416. }
  1417. static int gp2ap020a00f_remove(struct i2c_client *client)
  1418. {
  1419. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1420. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1421. int err;
  1422. err = gp2ap020a00f_set_operation_mode(data,
  1423. GP2AP020A00F_OPMODE_SHUTDOWN);
  1424. if (err < 0)
  1425. dev_err(&indio_dev->dev, "Failed to power off the device.\n");
  1426. iio_device_unregister(indio_dev);
  1427. iio_trigger_unregister(data->trig);
  1428. free_irq(client->irq, indio_dev);
  1429. iio_triggered_buffer_cleanup(indio_dev);
  1430. regulator_disable(data->vled_reg);
  1431. return 0;
  1432. }
  1433. static const struct i2c_device_id gp2ap020a00f_id[] = {
  1434. { GP2A_I2C_NAME, 0 },
  1435. { }
  1436. };
  1437. MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id);
  1438. #ifdef CONFIG_OF
  1439. static const struct of_device_id gp2ap020a00f_of_match[] = {
  1440. { .compatible = "sharp,gp2ap020a00f" },
  1441. { }
  1442. };
  1443. MODULE_DEVICE_TABLE(of, gp2ap020a00f_of_match);
  1444. #endif
  1445. static struct i2c_driver gp2ap020a00f_driver = {
  1446. .driver = {
  1447. .name = GP2A_I2C_NAME,
  1448. .of_match_table = of_match_ptr(gp2ap020a00f_of_match),
  1449. },
  1450. .probe = gp2ap020a00f_probe,
  1451. .remove = gp2ap020a00f_remove,
  1452. .id_table = gp2ap020a00f_id,
  1453. };
  1454. module_i2c_driver(gp2ap020a00f_driver);
  1455. MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>");
  1456. MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver");
  1457. MODULE_LICENSE("GPL v2");