ad5761.c 9.2 KB

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  1. /*
  2. * AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
  3. *
  4. * Copyright 2016 Qtechnology A/S
  5. * 2016 Ricardo Ribalda <ricardo.ribalda@gmail.com>
  6. *
  7. * Licensed under the GPL-2.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/bitops.h>
  13. #include <linux/iio/iio.h>
  14. #include <linux/iio/sysfs.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/platform_data/ad5761.h>
  17. #define AD5761_ADDR(addr) ((addr & 0xf) << 16)
  18. #define AD5761_ADDR_NOOP 0x0
  19. #define AD5761_ADDR_DAC_WRITE 0x3
  20. #define AD5761_ADDR_CTRL_WRITE_REG 0x4
  21. #define AD5761_ADDR_SW_DATA_RESET 0x7
  22. #define AD5761_ADDR_DAC_READ 0xb
  23. #define AD5761_ADDR_CTRL_READ_REG 0xc
  24. #define AD5761_ADDR_SW_FULL_RESET 0xf
  25. #define AD5761_CTRL_USE_INTVREF BIT(5)
  26. #define AD5761_CTRL_ETS BIT(6)
  27. /**
  28. * struct ad5761_chip_info - chip specific information
  29. * @int_vref: Value of the internal reference voltage in mV - 0 if external
  30. * reference voltage is used
  31. * @channel: channel specification
  32. */
  33. struct ad5761_chip_info {
  34. unsigned long int_vref;
  35. const struct iio_chan_spec channel;
  36. };
  37. struct ad5761_range_params {
  38. int m;
  39. int c;
  40. };
  41. enum ad5761_supported_device_ids {
  42. ID_AD5721,
  43. ID_AD5721R,
  44. ID_AD5761,
  45. ID_AD5761R,
  46. };
  47. /**
  48. * struct ad5761_state - driver instance specific data
  49. * @spi: spi_device
  50. * @vref_reg: reference voltage regulator
  51. * @use_intref: true when the internal voltage reference is used
  52. * @vref: actual voltage reference in mVolts
  53. * @range: output range mode used
  54. * @data: cache aligned spi buffer
  55. */
  56. struct ad5761_state {
  57. struct spi_device *spi;
  58. struct regulator *vref_reg;
  59. bool use_intref;
  60. int vref;
  61. enum ad5761_voltage_range range;
  62. /*
  63. * DMA (thus cache coherency maintenance) requires the
  64. * transfer buffers to live in their own cache lines.
  65. */
  66. union {
  67. __be32 d32;
  68. u8 d8[4];
  69. } data[3] ____cacheline_aligned;
  70. };
  71. static const struct ad5761_range_params ad5761_range_params[] = {
  72. [AD5761_VOLTAGE_RANGE_M10V_10V] = {
  73. .m = 80,
  74. .c = 40,
  75. },
  76. [AD5761_VOLTAGE_RANGE_0V_10V] = {
  77. .m = 40,
  78. .c = 0,
  79. },
  80. [AD5761_VOLTAGE_RANGE_M5V_5V] = {
  81. .m = 40,
  82. .c = 20,
  83. },
  84. [AD5761_VOLTAGE_RANGE_0V_5V] = {
  85. .m = 20,
  86. .c = 0,
  87. },
  88. [AD5761_VOLTAGE_RANGE_M2V5_7V5] = {
  89. .m = 40,
  90. .c = 10,
  91. },
  92. [AD5761_VOLTAGE_RANGE_M3V_3V] = {
  93. .m = 24,
  94. .c = 12,
  95. },
  96. [AD5761_VOLTAGE_RANGE_0V_16V] = {
  97. .m = 64,
  98. .c = 0,
  99. },
  100. [AD5761_VOLTAGE_RANGE_0V_20V] = {
  101. .m = 80,
  102. .c = 0,
  103. },
  104. };
  105. static int _ad5761_spi_write(struct ad5761_state *st, u8 addr, u16 val)
  106. {
  107. st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr) | val);
  108. return spi_write(st->spi, &st->data[0].d8[1], 3);
  109. }
  110. static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val)
  111. {
  112. struct ad5761_state *st = iio_priv(indio_dev);
  113. int ret;
  114. mutex_lock(&indio_dev->mlock);
  115. ret = _ad5761_spi_write(st, addr, val);
  116. mutex_unlock(&indio_dev->mlock);
  117. return ret;
  118. }
  119. static int _ad5761_spi_read(struct ad5761_state *st, u8 addr, u16 *val)
  120. {
  121. int ret;
  122. struct spi_transfer xfers[] = {
  123. {
  124. .tx_buf = &st->data[0].d8[1],
  125. .bits_per_word = 8,
  126. .len = 3,
  127. .cs_change = true,
  128. }, {
  129. .tx_buf = &st->data[1].d8[1],
  130. .rx_buf = &st->data[2].d8[1],
  131. .bits_per_word = 8,
  132. .len = 3,
  133. },
  134. };
  135. st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr));
  136. st->data[1].d32 = cpu_to_be32(AD5761_ADDR(AD5761_ADDR_NOOP));
  137. ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
  138. *val = be32_to_cpu(st->data[2].d32);
  139. return ret;
  140. }
  141. static int ad5761_spi_read(struct iio_dev *indio_dev, u8 addr, u16 *val)
  142. {
  143. struct ad5761_state *st = iio_priv(indio_dev);
  144. int ret;
  145. mutex_lock(&indio_dev->mlock);
  146. ret = _ad5761_spi_read(st, addr, val);
  147. mutex_unlock(&indio_dev->mlock);
  148. return ret;
  149. }
  150. static int ad5761_spi_set_range(struct ad5761_state *st,
  151. enum ad5761_voltage_range range)
  152. {
  153. u16 aux;
  154. int ret;
  155. aux = (range & 0x7) | AD5761_CTRL_ETS;
  156. if (st->use_intref)
  157. aux |= AD5761_CTRL_USE_INTVREF;
  158. ret = _ad5761_spi_write(st, AD5761_ADDR_SW_FULL_RESET, 0);
  159. if (ret)
  160. return ret;
  161. ret = _ad5761_spi_write(st, AD5761_ADDR_CTRL_WRITE_REG, aux);
  162. if (ret)
  163. return ret;
  164. st->range = range;
  165. return 0;
  166. }
  167. static int ad5761_read_raw(struct iio_dev *indio_dev,
  168. struct iio_chan_spec const *chan,
  169. int *val,
  170. int *val2,
  171. long mask)
  172. {
  173. struct ad5761_state *st;
  174. int ret;
  175. u16 aux;
  176. switch (mask) {
  177. case IIO_CHAN_INFO_RAW:
  178. ret = ad5761_spi_read(indio_dev, AD5761_ADDR_DAC_READ, &aux);
  179. if (ret)
  180. return ret;
  181. *val = aux >> chan->scan_type.shift;
  182. return IIO_VAL_INT;
  183. case IIO_CHAN_INFO_SCALE:
  184. st = iio_priv(indio_dev);
  185. *val = st->vref * ad5761_range_params[st->range].m;
  186. *val /= 10;
  187. *val2 = chan->scan_type.realbits;
  188. return IIO_VAL_FRACTIONAL_LOG2;
  189. case IIO_CHAN_INFO_OFFSET:
  190. st = iio_priv(indio_dev);
  191. *val = -(1 << chan->scan_type.realbits);
  192. *val *= ad5761_range_params[st->range].c;
  193. *val /= ad5761_range_params[st->range].m;
  194. return IIO_VAL_INT;
  195. default:
  196. return -EINVAL;
  197. }
  198. }
  199. static int ad5761_write_raw(struct iio_dev *indio_dev,
  200. struct iio_chan_spec const *chan,
  201. int val,
  202. int val2,
  203. long mask)
  204. {
  205. u16 aux;
  206. if (mask != IIO_CHAN_INFO_RAW)
  207. return -EINVAL;
  208. if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0)
  209. return -EINVAL;
  210. aux = val << chan->scan_type.shift;
  211. return ad5761_spi_write(indio_dev, AD5761_ADDR_DAC_WRITE, aux);
  212. }
  213. static const struct iio_info ad5761_info = {
  214. .read_raw = &ad5761_read_raw,
  215. .write_raw = &ad5761_write_raw,
  216. .driver_module = THIS_MODULE,
  217. };
  218. #define AD5761_CHAN(_bits) { \
  219. .type = IIO_VOLTAGE, \
  220. .output = 1, \
  221. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  222. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  223. BIT(IIO_CHAN_INFO_OFFSET), \
  224. .scan_type = { \
  225. .sign = 'u', \
  226. .realbits = (_bits), \
  227. .storagebits = 16, \
  228. .shift = 16 - (_bits), \
  229. }, \
  230. }
  231. static const struct ad5761_chip_info ad5761_chip_infos[] = {
  232. [ID_AD5721] = {
  233. .int_vref = 0,
  234. .channel = AD5761_CHAN(12),
  235. },
  236. [ID_AD5721R] = {
  237. .int_vref = 2500,
  238. .channel = AD5761_CHAN(12),
  239. },
  240. [ID_AD5761] = {
  241. .int_vref = 0,
  242. .channel = AD5761_CHAN(16),
  243. },
  244. [ID_AD5761R] = {
  245. .int_vref = 2500,
  246. .channel = AD5761_CHAN(16),
  247. },
  248. };
  249. static int ad5761_get_vref(struct ad5761_state *st,
  250. const struct ad5761_chip_info *chip_info)
  251. {
  252. int ret;
  253. st->vref_reg = devm_regulator_get_optional(&st->spi->dev, "vref");
  254. if (PTR_ERR(st->vref_reg) == -ENODEV) {
  255. /* Use Internal regulator */
  256. if (!chip_info->int_vref) {
  257. dev_err(&st->spi->dev,
  258. "Voltage reference not found\n");
  259. return -EIO;
  260. }
  261. st->use_intref = true;
  262. st->vref = chip_info->int_vref;
  263. return 0;
  264. }
  265. if (IS_ERR(st->vref_reg)) {
  266. dev_err(&st->spi->dev,
  267. "Error getting voltage reference regulator\n");
  268. return PTR_ERR(st->vref_reg);
  269. }
  270. ret = regulator_enable(st->vref_reg);
  271. if (ret) {
  272. dev_err(&st->spi->dev,
  273. "Failed to enable voltage reference\n");
  274. return ret;
  275. }
  276. ret = regulator_get_voltage(st->vref_reg);
  277. if (ret < 0) {
  278. dev_err(&st->spi->dev,
  279. "Failed to get voltage reference value\n");
  280. goto disable_regulator_vref;
  281. }
  282. if (ret < 2000000 || ret > 3000000) {
  283. dev_warn(&st->spi->dev,
  284. "Invalid external voltage ref. value %d uV\n", ret);
  285. ret = -EIO;
  286. goto disable_regulator_vref;
  287. }
  288. st->vref = ret / 1000;
  289. st->use_intref = false;
  290. return 0;
  291. disable_regulator_vref:
  292. regulator_disable(st->vref_reg);
  293. st->vref_reg = NULL;
  294. return ret;
  295. }
  296. static int ad5761_probe(struct spi_device *spi)
  297. {
  298. struct iio_dev *iio_dev;
  299. struct ad5761_state *st;
  300. int ret;
  301. const struct ad5761_chip_info *chip_info =
  302. &ad5761_chip_infos[spi_get_device_id(spi)->driver_data];
  303. enum ad5761_voltage_range voltage_range = AD5761_VOLTAGE_RANGE_0V_5V;
  304. struct ad5761_platform_data *pdata = dev_get_platdata(&spi->dev);
  305. iio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  306. if (!iio_dev)
  307. return -ENOMEM;
  308. st = iio_priv(iio_dev);
  309. st->spi = spi;
  310. spi_set_drvdata(spi, iio_dev);
  311. ret = ad5761_get_vref(st, chip_info);
  312. if (ret)
  313. return ret;
  314. if (pdata)
  315. voltage_range = pdata->voltage_range;
  316. ret = ad5761_spi_set_range(st, voltage_range);
  317. if (ret)
  318. goto disable_regulator_err;
  319. iio_dev->dev.parent = &spi->dev;
  320. iio_dev->info = &ad5761_info;
  321. iio_dev->modes = INDIO_DIRECT_MODE;
  322. iio_dev->channels = &chip_info->channel;
  323. iio_dev->num_channels = 1;
  324. iio_dev->name = spi_get_device_id(st->spi)->name;
  325. ret = iio_device_register(iio_dev);
  326. if (ret)
  327. goto disable_regulator_err;
  328. return 0;
  329. disable_regulator_err:
  330. if (!IS_ERR_OR_NULL(st->vref_reg))
  331. regulator_disable(st->vref_reg);
  332. return ret;
  333. }
  334. static int ad5761_remove(struct spi_device *spi)
  335. {
  336. struct iio_dev *iio_dev = spi_get_drvdata(spi);
  337. struct ad5761_state *st = iio_priv(iio_dev);
  338. iio_device_unregister(iio_dev);
  339. if (!IS_ERR_OR_NULL(st->vref_reg))
  340. regulator_disable(st->vref_reg);
  341. return 0;
  342. }
  343. static const struct spi_device_id ad5761_id[] = {
  344. {"ad5721", ID_AD5721},
  345. {"ad5721r", ID_AD5721R},
  346. {"ad5761", ID_AD5761},
  347. {"ad5761r", ID_AD5761R},
  348. {}
  349. };
  350. MODULE_DEVICE_TABLE(spi, ad5761_id);
  351. static struct spi_driver ad5761_driver = {
  352. .driver = {
  353. .name = "ad5761",
  354. },
  355. .probe = ad5761_probe,
  356. .remove = ad5761_remove,
  357. .id_table = ad5761_id,
  358. };
  359. module_spi_driver(ad5761_driver);
  360. MODULE_AUTHOR("Ricardo Ribalda <ricardo.ribalda@gmail.com>");
  361. MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver");
  362. MODULE_LICENSE("GPL v2");