ad5686.c 9.5 KB

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  1. /*
  2. * AD5686R, AD5685R, AD5684R Digital to analog converters driver
  3. *
  4. * Copyright 2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <linux/fs.h>
  10. #include <linux/device.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #define AD5686_DAC_CHANNELS 4
  20. #define AD5686_ADDR(x) ((x) << 16)
  21. #define AD5686_CMD(x) ((x) << 20)
  22. #define AD5686_ADDR_DAC(chan) (0x1 << (chan))
  23. #define AD5686_ADDR_ALL_DAC 0xF
  24. #define AD5686_CMD_NOOP 0x0
  25. #define AD5686_CMD_WRITE_INPUT_N 0x1
  26. #define AD5686_CMD_UPDATE_DAC_N 0x2
  27. #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3
  28. #define AD5686_CMD_POWERDOWN_DAC 0x4
  29. #define AD5686_CMD_LDAC_MASK 0x5
  30. #define AD5686_CMD_RESET 0x6
  31. #define AD5686_CMD_INTERNAL_REFER_SETUP 0x7
  32. #define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8
  33. #define AD5686_CMD_READBACK_ENABLE 0x9
  34. #define AD5686_LDAC_PWRDN_NONE 0x0
  35. #define AD5686_LDAC_PWRDN_1K 0x1
  36. #define AD5686_LDAC_PWRDN_100K 0x2
  37. #define AD5686_LDAC_PWRDN_3STATE 0x3
  38. /**
  39. * struct ad5686_chip_info - chip specific information
  40. * @int_vref_mv: AD5620/40/60: the internal reference voltage
  41. * @channel: channel specification
  42. */
  43. struct ad5686_chip_info {
  44. u16 int_vref_mv;
  45. struct iio_chan_spec channel[AD5686_DAC_CHANNELS];
  46. };
  47. /**
  48. * struct ad5446_state - driver instance specific data
  49. * @spi: spi_device
  50. * @chip_info: chip model specific constants, available modes etc
  51. * @reg: supply regulator
  52. * @vref_mv: actual reference voltage used
  53. * @pwr_down_mask: power down mask
  54. * @pwr_down_mode: current power down mode
  55. * @data: spi transfer buffers
  56. */
  57. struct ad5686_state {
  58. struct spi_device *spi;
  59. const struct ad5686_chip_info *chip_info;
  60. struct regulator *reg;
  61. unsigned short vref_mv;
  62. unsigned pwr_down_mask;
  63. unsigned pwr_down_mode;
  64. /*
  65. * DMA (thus cache coherency maintenance) requires the
  66. * transfer buffers to live in their own cache lines.
  67. */
  68. union {
  69. __be32 d32;
  70. u8 d8[4];
  71. } data[3] ____cacheline_aligned;
  72. };
  73. /**
  74. * ad5686_supported_device_ids:
  75. */
  76. enum ad5686_supported_device_ids {
  77. ID_AD5684,
  78. ID_AD5685,
  79. ID_AD5686,
  80. };
  81. static int ad5686_spi_write(struct ad5686_state *st,
  82. u8 cmd, u8 addr, u16 val, u8 shift)
  83. {
  84. val <<= shift;
  85. st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
  86. AD5686_ADDR(addr) |
  87. val);
  88. return spi_write(st->spi, &st->data[0].d8[1], 3);
  89. }
  90. static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
  91. {
  92. struct spi_transfer t[] = {
  93. {
  94. .tx_buf = &st->data[0].d8[1],
  95. .len = 3,
  96. .cs_change = 1,
  97. }, {
  98. .tx_buf = &st->data[1].d8[1],
  99. .rx_buf = &st->data[2].d8[1],
  100. .len = 3,
  101. },
  102. };
  103. int ret;
  104. st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
  105. AD5686_ADDR(addr));
  106. st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
  107. ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
  108. if (ret < 0)
  109. return ret;
  110. return be32_to_cpu(st->data[2].d32);
  111. }
  112. static const char * const ad5686_powerdown_modes[] = {
  113. "1kohm_to_gnd",
  114. "100kohm_to_gnd",
  115. "three_state"
  116. };
  117. static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
  118. const struct iio_chan_spec *chan)
  119. {
  120. struct ad5686_state *st = iio_priv(indio_dev);
  121. return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
  122. }
  123. static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
  124. const struct iio_chan_spec *chan, unsigned int mode)
  125. {
  126. struct ad5686_state *st = iio_priv(indio_dev);
  127. st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
  128. st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
  129. return 0;
  130. }
  131. static const struct iio_enum ad5686_powerdown_mode_enum = {
  132. .items = ad5686_powerdown_modes,
  133. .num_items = ARRAY_SIZE(ad5686_powerdown_modes),
  134. .get = ad5686_get_powerdown_mode,
  135. .set = ad5686_set_powerdown_mode,
  136. };
  137. static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
  138. uintptr_t private, const struct iio_chan_spec *chan, char *buf)
  139. {
  140. struct ad5686_state *st = iio_priv(indio_dev);
  141. return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
  142. (0x3 << (chan->channel * 2))));
  143. }
  144. static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
  145. uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
  146. size_t len)
  147. {
  148. bool readin;
  149. int ret;
  150. struct ad5686_state *st = iio_priv(indio_dev);
  151. ret = strtobool(buf, &readin);
  152. if (ret)
  153. return ret;
  154. if (readin)
  155. st->pwr_down_mask |= (0x3 << (chan->channel * 2));
  156. else
  157. st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
  158. ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
  159. st->pwr_down_mask & st->pwr_down_mode, 0);
  160. return ret ? ret : len;
  161. }
  162. static int ad5686_read_raw(struct iio_dev *indio_dev,
  163. struct iio_chan_spec const *chan,
  164. int *val,
  165. int *val2,
  166. long m)
  167. {
  168. struct ad5686_state *st = iio_priv(indio_dev);
  169. int ret;
  170. switch (m) {
  171. case IIO_CHAN_INFO_RAW:
  172. mutex_lock(&indio_dev->mlock);
  173. ret = ad5686_spi_read(st, chan->address);
  174. mutex_unlock(&indio_dev->mlock);
  175. if (ret < 0)
  176. return ret;
  177. *val = ret;
  178. return IIO_VAL_INT;
  179. case IIO_CHAN_INFO_SCALE:
  180. *val = st->vref_mv;
  181. *val2 = chan->scan_type.realbits;
  182. return IIO_VAL_FRACTIONAL_LOG2;
  183. }
  184. return -EINVAL;
  185. }
  186. static int ad5686_write_raw(struct iio_dev *indio_dev,
  187. struct iio_chan_spec const *chan,
  188. int val,
  189. int val2,
  190. long mask)
  191. {
  192. struct ad5686_state *st = iio_priv(indio_dev);
  193. int ret;
  194. switch (mask) {
  195. case IIO_CHAN_INFO_RAW:
  196. if (val > (1 << chan->scan_type.realbits) || val < 0)
  197. return -EINVAL;
  198. mutex_lock(&indio_dev->mlock);
  199. ret = ad5686_spi_write(st,
  200. AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
  201. chan->address,
  202. val,
  203. chan->scan_type.shift);
  204. mutex_unlock(&indio_dev->mlock);
  205. break;
  206. default:
  207. ret = -EINVAL;
  208. }
  209. return ret;
  210. }
  211. static const struct iio_info ad5686_info = {
  212. .read_raw = ad5686_read_raw,
  213. .write_raw = ad5686_write_raw,
  214. .driver_module = THIS_MODULE,
  215. };
  216. static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
  217. {
  218. .name = "powerdown",
  219. .read = ad5686_read_dac_powerdown,
  220. .write = ad5686_write_dac_powerdown,
  221. .shared = IIO_SEPARATE,
  222. },
  223. IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum),
  224. IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
  225. { },
  226. };
  227. #define AD5868_CHANNEL(chan, bits, _shift) { \
  228. .type = IIO_VOLTAGE, \
  229. .indexed = 1, \
  230. .output = 1, \
  231. .channel = chan, \
  232. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  233. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
  234. .address = AD5686_ADDR_DAC(chan), \
  235. .scan_type = { \
  236. .sign = 'u', \
  237. .realbits = (bits), \
  238. .storagebits = 16, \
  239. .shift = (_shift), \
  240. }, \
  241. .ext_info = ad5686_ext_info, \
  242. }
  243. static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
  244. [ID_AD5684] = {
  245. .channel[0] = AD5868_CHANNEL(0, 12, 4),
  246. .channel[1] = AD5868_CHANNEL(1, 12, 4),
  247. .channel[2] = AD5868_CHANNEL(2, 12, 4),
  248. .channel[3] = AD5868_CHANNEL(3, 12, 4),
  249. .int_vref_mv = 2500,
  250. },
  251. [ID_AD5685] = {
  252. .channel[0] = AD5868_CHANNEL(0, 14, 2),
  253. .channel[1] = AD5868_CHANNEL(1, 14, 2),
  254. .channel[2] = AD5868_CHANNEL(2, 14, 2),
  255. .channel[3] = AD5868_CHANNEL(3, 14, 2),
  256. .int_vref_mv = 2500,
  257. },
  258. [ID_AD5686] = {
  259. .channel[0] = AD5868_CHANNEL(0, 16, 0),
  260. .channel[1] = AD5868_CHANNEL(1, 16, 0),
  261. .channel[2] = AD5868_CHANNEL(2, 16, 0),
  262. .channel[3] = AD5868_CHANNEL(3, 16, 0),
  263. .int_vref_mv = 2500,
  264. },
  265. };
  266. static int ad5686_probe(struct spi_device *spi)
  267. {
  268. struct ad5686_state *st;
  269. struct iio_dev *indio_dev;
  270. int ret, voltage_uv = 0;
  271. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  272. if (indio_dev == NULL)
  273. return -ENOMEM;
  274. st = iio_priv(indio_dev);
  275. spi_set_drvdata(spi, indio_dev);
  276. st->reg = devm_regulator_get_optional(&spi->dev, "vcc");
  277. if (!IS_ERR(st->reg)) {
  278. ret = regulator_enable(st->reg);
  279. if (ret)
  280. return ret;
  281. ret = regulator_get_voltage(st->reg);
  282. if (ret < 0)
  283. goto error_disable_reg;
  284. voltage_uv = ret;
  285. }
  286. st->chip_info =
  287. &ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
  288. if (voltage_uv)
  289. st->vref_mv = voltage_uv / 1000;
  290. else
  291. st->vref_mv = st->chip_info->int_vref_mv;
  292. st->spi = spi;
  293. /* Set all the power down mode for all channels to 1K pulldown */
  294. st->pwr_down_mode = 0x55;
  295. indio_dev->dev.parent = &spi->dev;
  296. indio_dev->name = spi_get_device_id(spi)->name;
  297. indio_dev->info = &ad5686_info;
  298. indio_dev->modes = INDIO_DIRECT_MODE;
  299. indio_dev->channels = st->chip_info->channel;
  300. indio_dev->num_channels = AD5686_DAC_CHANNELS;
  301. ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
  302. !!voltage_uv, 0);
  303. if (ret)
  304. goto error_disable_reg;
  305. ret = iio_device_register(indio_dev);
  306. if (ret)
  307. goto error_disable_reg;
  308. return 0;
  309. error_disable_reg:
  310. if (!IS_ERR(st->reg))
  311. regulator_disable(st->reg);
  312. return ret;
  313. }
  314. static int ad5686_remove(struct spi_device *spi)
  315. {
  316. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  317. struct ad5686_state *st = iio_priv(indio_dev);
  318. iio_device_unregister(indio_dev);
  319. if (!IS_ERR(st->reg))
  320. regulator_disable(st->reg);
  321. return 0;
  322. }
  323. static const struct spi_device_id ad5686_id[] = {
  324. {"ad5684", ID_AD5684},
  325. {"ad5685", ID_AD5685},
  326. {"ad5686", ID_AD5686},
  327. {}
  328. };
  329. MODULE_DEVICE_TABLE(spi, ad5686_id);
  330. static struct spi_driver ad5686_driver = {
  331. .driver = {
  332. .name = "ad5686",
  333. },
  334. .probe = ad5686_probe,
  335. .remove = ad5686_remove,
  336. .id_table = ad5686_id,
  337. };
  338. module_spi_driver(ad5686_driver);
  339. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  340. MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
  341. MODULE_LICENSE("GPL v2");