ad799x.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901
  1. /*
  2. * iio/adc/ad799x.c
  3. * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
  4. *
  5. * based on iio/adc/max1363
  6. * Copyright (C) 2008-2010 Jonathan Cameron
  7. *
  8. * based on linux/drivers/i2c/chips/max123x
  9. * Copyright (C) 2002-2004 Stefan Eletzhofer
  10. *
  11. * based on linux/drivers/acron/char/pcf8583.c
  12. * Copyright (C) 2000 Russell King
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. *
  18. * ad799x.c
  19. *
  20. * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
  21. * ad7998 and similar chips.
  22. *
  23. */
  24. #include <linux/interrupt.h>
  25. #include <linux/device.h>
  26. #include <linux/kernel.h>
  27. #include <linux/sysfs.h>
  28. #include <linux/i2c.h>
  29. #include <linux/regulator/consumer.h>
  30. #include <linux/slab.h>
  31. #include <linux/types.h>
  32. #include <linux/err.h>
  33. #include <linux/module.h>
  34. #include <linux/bitops.h>
  35. #include <linux/iio/iio.h>
  36. #include <linux/iio/sysfs.h>
  37. #include <linux/iio/events.h>
  38. #include <linux/iio/buffer.h>
  39. #include <linux/iio/trigger_consumer.h>
  40. #include <linux/iio/triggered_buffer.h>
  41. #define AD799X_CHANNEL_SHIFT 4
  42. /*
  43. * AD7991, AD7995 and AD7999 defines
  44. */
  45. #define AD7991_REF_SEL 0x08
  46. #define AD7991_FLTR 0x04
  47. #define AD7991_BIT_TRIAL_DELAY 0x02
  48. #define AD7991_SAMPLE_DELAY 0x01
  49. /*
  50. * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
  51. */
  52. #define AD7998_FLTR BIT(3)
  53. #define AD7998_ALERT_EN BIT(2)
  54. #define AD7998_BUSY_ALERT BIT(1)
  55. #define AD7998_BUSY_ALERT_POL BIT(0)
  56. #define AD7998_CONV_RES_REG 0x0
  57. #define AD7998_ALERT_STAT_REG 0x1
  58. #define AD7998_CONF_REG 0x2
  59. #define AD7998_CYCLE_TMR_REG 0x3
  60. #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
  61. #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
  62. #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
  63. #define AD7998_CYC_MASK GENMASK(2, 0)
  64. #define AD7998_CYC_DIS 0x0
  65. #define AD7998_CYC_TCONF_32 0x1
  66. #define AD7998_CYC_TCONF_64 0x2
  67. #define AD7998_CYC_TCONF_128 0x3
  68. #define AD7998_CYC_TCONF_256 0x4
  69. #define AD7998_CYC_TCONF_512 0x5
  70. #define AD7998_CYC_TCONF_1024 0x6
  71. #define AD7998_CYC_TCONF_2048 0x7
  72. #define AD7998_ALERT_STAT_CLEAR 0xFF
  73. /*
  74. * AD7997 and AD7997 defines
  75. */
  76. #define AD7997_8_READ_SINGLE BIT(7)
  77. #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
  78. enum {
  79. ad7991,
  80. ad7995,
  81. ad7999,
  82. ad7992,
  83. ad7993,
  84. ad7994,
  85. ad7997,
  86. ad7998
  87. };
  88. /**
  89. * struct ad799x_chip_config - chip specific information
  90. * @channel: channel specification
  91. * @default_config: device default configuration
  92. * @info: pointer to iio_info struct
  93. */
  94. struct ad799x_chip_config {
  95. const struct iio_chan_spec channel[9];
  96. u16 default_config;
  97. const struct iio_info *info;
  98. };
  99. /**
  100. * struct ad799x_chip_info - chip specific information
  101. * @num_channels: number of channels
  102. * @noirq_config: device configuration w/o IRQ
  103. * @irq_config: device configuration w/IRQ
  104. */
  105. struct ad799x_chip_info {
  106. int num_channels;
  107. const struct ad799x_chip_config noirq_config;
  108. const struct ad799x_chip_config irq_config;
  109. };
  110. struct ad799x_state {
  111. struct i2c_client *client;
  112. const struct ad799x_chip_config *chip_config;
  113. struct regulator *reg;
  114. struct regulator *vref;
  115. unsigned id;
  116. u16 config;
  117. u8 *rx_buf;
  118. unsigned int transfer_size;
  119. };
  120. static int ad799x_write_config(struct ad799x_state *st, u16 val)
  121. {
  122. switch (st->id) {
  123. case ad7997:
  124. case ad7998:
  125. return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
  126. val);
  127. case ad7992:
  128. case ad7993:
  129. case ad7994:
  130. return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
  131. val);
  132. default:
  133. /* Will be written when doing a conversion */
  134. st->config = val;
  135. return 0;
  136. }
  137. }
  138. static int ad799x_read_config(struct ad799x_state *st)
  139. {
  140. switch (st->id) {
  141. case ad7997:
  142. case ad7998:
  143. return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
  144. case ad7992:
  145. case ad7993:
  146. case ad7994:
  147. return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
  148. default:
  149. /* No readback support */
  150. return st->config;
  151. }
  152. }
  153. /**
  154. * ad799x_trigger_handler() bh of trigger launched polling to ring buffer
  155. *
  156. * Currently there is no option in this driver to disable the saving of
  157. * timestamps within the ring.
  158. **/
  159. static irqreturn_t ad799x_trigger_handler(int irq, void *p)
  160. {
  161. struct iio_poll_func *pf = p;
  162. struct iio_dev *indio_dev = pf->indio_dev;
  163. struct ad799x_state *st = iio_priv(indio_dev);
  164. int b_sent;
  165. u8 cmd;
  166. switch (st->id) {
  167. case ad7991:
  168. case ad7995:
  169. case ad7999:
  170. cmd = st->config |
  171. (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
  172. break;
  173. case ad7992:
  174. case ad7993:
  175. case ad7994:
  176. cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
  177. AD7998_CONV_RES_REG;
  178. break;
  179. case ad7997:
  180. case ad7998:
  181. cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
  182. break;
  183. default:
  184. cmd = 0;
  185. }
  186. b_sent = i2c_smbus_read_i2c_block_data(st->client,
  187. cmd, st->transfer_size, st->rx_buf);
  188. if (b_sent < 0)
  189. goto out;
  190. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  191. iio_get_time_ns(indio_dev));
  192. out:
  193. iio_trigger_notify_done(indio_dev->trig);
  194. return IRQ_HANDLED;
  195. }
  196. static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
  197. const unsigned long *scan_mask)
  198. {
  199. struct ad799x_state *st = iio_priv(indio_dev);
  200. kfree(st->rx_buf);
  201. st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  202. if (!st->rx_buf)
  203. return -ENOMEM;
  204. st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
  205. switch (st->id) {
  206. case ad7992:
  207. case ad7993:
  208. case ad7994:
  209. case ad7997:
  210. case ad7998:
  211. st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
  212. st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
  213. return ad799x_write_config(st, st->config);
  214. default:
  215. return 0;
  216. }
  217. }
  218. static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
  219. {
  220. u8 cmd;
  221. switch (st->id) {
  222. case ad7991:
  223. case ad7995:
  224. case ad7999:
  225. cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
  226. break;
  227. case ad7992:
  228. case ad7993:
  229. case ad7994:
  230. cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
  231. break;
  232. case ad7997:
  233. case ad7998:
  234. cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
  235. break;
  236. default:
  237. return -EINVAL;
  238. }
  239. return i2c_smbus_read_word_swapped(st->client, cmd);
  240. }
  241. static int ad799x_read_raw(struct iio_dev *indio_dev,
  242. struct iio_chan_spec const *chan,
  243. int *val,
  244. int *val2,
  245. long m)
  246. {
  247. int ret;
  248. struct ad799x_state *st = iio_priv(indio_dev);
  249. switch (m) {
  250. case IIO_CHAN_INFO_RAW:
  251. ret = iio_device_claim_direct_mode(indio_dev);
  252. if (ret)
  253. return ret;
  254. ret = ad799x_scan_direct(st, chan->scan_index);
  255. iio_device_release_direct_mode(indio_dev);
  256. if (ret < 0)
  257. return ret;
  258. *val = (ret >> chan->scan_type.shift) &
  259. GENMASK(chan->scan_type.realbits - 1, 0);
  260. return IIO_VAL_INT;
  261. case IIO_CHAN_INFO_SCALE:
  262. ret = regulator_get_voltage(st->vref);
  263. if (ret < 0)
  264. return ret;
  265. *val = ret / 1000;
  266. *val2 = chan->scan_type.realbits;
  267. return IIO_VAL_FRACTIONAL_LOG2;
  268. }
  269. return -EINVAL;
  270. }
  271. static const unsigned int ad7998_frequencies[] = {
  272. [AD7998_CYC_DIS] = 0,
  273. [AD7998_CYC_TCONF_32] = 15625,
  274. [AD7998_CYC_TCONF_64] = 7812,
  275. [AD7998_CYC_TCONF_128] = 3906,
  276. [AD7998_CYC_TCONF_512] = 976,
  277. [AD7998_CYC_TCONF_1024] = 488,
  278. [AD7998_CYC_TCONF_2048] = 244,
  279. };
  280. static ssize_t ad799x_read_frequency(struct device *dev,
  281. struct device_attribute *attr,
  282. char *buf)
  283. {
  284. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  285. struct ad799x_state *st = iio_priv(indio_dev);
  286. int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  287. if (ret < 0)
  288. return ret;
  289. return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
  290. }
  291. static ssize_t ad799x_write_frequency(struct device *dev,
  292. struct device_attribute *attr,
  293. const char *buf,
  294. size_t len)
  295. {
  296. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  297. struct ad799x_state *st = iio_priv(indio_dev);
  298. long val;
  299. int ret, i;
  300. ret = kstrtol(buf, 10, &val);
  301. if (ret)
  302. return ret;
  303. mutex_lock(&indio_dev->mlock);
  304. ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  305. if (ret < 0)
  306. goto error_ret_mutex;
  307. /* Wipe the bits clean */
  308. ret &= ~AD7998_CYC_MASK;
  309. for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
  310. if (val == ad7998_frequencies[i])
  311. break;
  312. if (i == ARRAY_SIZE(ad7998_frequencies)) {
  313. ret = -EINVAL;
  314. goto error_ret_mutex;
  315. }
  316. ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
  317. ret | i);
  318. if (ret < 0)
  319. goto error_ret_mutex;
  320. ret = len;
  321. error_ret_mutex:
  322. mutex_unlock(&indio_dev->mlock);
  323. return ret;
  324. }
  325. static int ad799x_read_event_config(struct iio_dev *indio_dev,
  326. const struct iio_chan_spec *chan,
  327. enum iio_event_type type,
  328. enum iio_event_direction dir)
  329. {
  330. struct ad799x_state *st = iio_priv(indio_dev);
  331. if (!(st->config & AD7998_ALERT_EN))
  332. return 0;
  333. if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
  334. return 1;
  335. return 0;
  336. }
  337. static int ad799x_write_event_config(struct iio_dev *indio_dev,
  338. const struct iio_chan_spec *chan,
  339. enum iio_event_type type,
  340. enum iio_event_direction dir,
  341. int state)
  342. {
  343. struct ad799x_state *st = iio_priv(indio_dev);
  344. int ret;
  345. ret = iio_device_claim_direct_mode(indio_dev);
  346. if (ret)
  347. return ret;
  348. if (state)
  349. st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
  350. else
  351. st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
  352. if (st->config >> AD799X_CHANNEL_SHIFT)
  353. st->config |= AD7998_ALERT_EN;
  354. else
  355. st->config &= ~AD7998_ALERT_EN;
  356. ret = ad799x_write_config(st, st->config);
  357. iio_device_release_direct_mode(indio_dev);
  358. return ret;
  359. }
  360. static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
  361. enum iio_event_direction dir,
  362. enum iio_event_info info)
  363. {
  364. switch (info) {
  365. case IIO_EV_INFO_VALUE:
  366. if (dir == IIO_EV_DIR_FALLING)
  367. return AD7998_DATALOW_REG(chan->channel);
  368. else
  369. return AD7998_DATAHIGH_REG(chan->channel);
  370. case IIO_EV_INFO_HYSTERESIS:
  371. return AD7998_HYST_REG(chan->channel);
  372. default:
  373. return -EINVAL;
  374. }
  375. return 0;
  376. }
  377. static int ad799x_write_event_value(struct iio_dev *indio_dev,
  378. const struct iio_chan_spec *chan,
  379. enum iio_event_type type,
  380. enum iio_event_direction dir,
  381. enum iio_event_info info,
  382. int val, int val2)
  383. {
  384. int ret;
  385. struct ad799x_state *st = iio_priv(indio_dev);
  386. if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
  387. return -EINVAL;
  388. mutex_lock(&indio_dev->mlock);
  389. ret = i2c_smbus_write_word_swapped(st->client,
  390. ad799x_threshold_reg(chan, dir, info),
  391. val << chan->scan_type.shift);
  392. mutex_unlock(&indio_dev->mlock);
  393. return ret;
  394. }
  395. static int ad799x_read_event_value(struct iio_dev *indio_dev,
  396. const struct iio_chan_spec *chan,
  397. enum iio_event_type type,
  398. enum iio_event_direction dir,
  399. enum iio_event_info info,
  400. int *val, int *val2)
  401. {
  402. int ret;
  403. struct ad799x_state *st = iio_priv(indio_dev);
  404. mutex_lock(&indio_dev->mlock);
  405. ret = i2c_smbus_read_word_swapped(st->client,
  406. ad799x_threshold_reg(chan, dir, info));
  407. mutex_unlock(&indio_dev->mlock);
  408. if (ret < 0)
  409. return ret;
  410. *val = (ret >> chan->scan_type.shift) &
  411. GENMASK(chan->scan_type.realbits - 1, 0);
  412. return IIO_VAL_INT;
  413. }
  414. static irqreturn_t ad799x_event_handler(int irq, void *private)
  415. {
  416. struct iio_dev *indio_dev = private;
  417. struct ad799x_state *st = iio_priv(private);
  418. int i, ret;
  419. ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
  420. if (ret <= 0)
  421. goto done;
  422. if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
  423. AD7998_ALERT_STAT_CLEAR) < 0)
  424. goto done;
  425. for (i = 0; i < 8; i++) {
  426. if (ret & BIT(i))
  427. iio_push_event(indio_dev,
  428. i & 0x1 ?
  429. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  430. (i >> 1),
  431. IIO_EV_TYPE_THRESH,
  432. IIO_EV_DIR_RISING) :
  433. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  434. (i >> 1),
  435. IIO_EV_TYPE_THRESH,
  436. IIO_EV_DIR_FALLING),
  437. iio_get_time_ns(indio_dev));
  438. }
  439. done:
  440. return IRQ_HANDLED;
  441. }
  442. static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
  443. ad799x_read_frequency,
  444. ad799x_write_frequency);
  445. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
  446. static struct attribute *ad799x_event_attributes[] = {
  447. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  448. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  449. NULL,
  450. };
  451. static struct attribute_group ad799x_event_attrs_group = {
  452. .attrs = ad799x_event_attributes,
  453. };
  454. static const struct iio_info ad7991_info = {
  455. .read_raw = &ad799x_read_raw,
  456. .driver_module = THIS_MODULE,
  457. .update_scan_mode = ad799x_update_scan_mode,
  458. };
  459. static const struct iio_info ad7993_4_7_8_noirq_info = {
  460. .read_raw = &ad799x_read_raw,
  461. .driver_module = THIS_MODULE,
  462. .update_scan_mode = ad799x_update_scan_mode,
  463. };
  464. static const struct iio_info ad7993_4_7_8_irq_info = {
  465. .read_raw = &ad799x_read_raw,
  466. .event_attrs = &ad799x_event_attrs_group,
  467. .read_event_config = &ad799x_read_event_config,
  468. .write_event_config = &ad799x_write_event_config,
  469. .read_event_value = &ad799x_read_event_value,
  470. .write_event_value = &ad799x_write_event_value,
  471. .driver_module = THIS_MODULE,
  472. .update_scan_mode = ad799x_update_scan_mode,
  473. };
  474. static const struct iio_event_spec ad799x_events[] = {
  475. {
  476. .type = IIO_EV_TYPE_THRESH,
  477. .dir = IIO_EV_DIR_RISING,
  478. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  479. BIT(IIO_EV_INFO_ENABLE),
  480. }, {
  481. .type = IIO_EV_TYPE_THRESH,
  482. .dir = IIO_EV_DIR_FALLING,
  483. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  484. BIT(IIO_EV_INFO_ENABLE),
  485. }, {
  486. .type = IIO_EV_TYPE_THRESH,
  487. .dir = IIO_EV_DIR_EITHER,
  488. .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
  489. },
  490. };
  491. #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
  492. .type = IIO_VOLTAGE, \
  493. .indexed = 1, \
  494. .channel = (_index), \
  495. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  496. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  497. .scan_index = (_index), \
  498. .scan_type = { \
  499. .sign = 'u', \
  500. .realbits = (_realbits), \
  501. .storagebits = 16, \
  502. .shift = 12 - (_realbits), \
  503. .endianness = IIO_BE, \
  504. }, \
  505. .event_spec = _ev_spec, \
  506. .num_event_specs = _num_ev_spec, \
  507. }
  508. #define AD799X_CHANNEL(_index, _realbits) \
  509. _AD799X_CHANNEL(_index, _realbits, NULL, 0)
  510. #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
  511. _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
  512. ARRAY_SIZE(ad799x_events))
  513. static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
  514. [ad7991] = {
  515. .num_channels = 5,
  516. .noirq_config = {
  517. .channel = {
  518. AD799X_CHANNEL(0, 12),
  519. AD799X_CHANNEL(1, 12),
  520. AD799X_CHANNEL(2, 12),
  521. AD799X_CHANNEL(3, 12),
  522. IIO_CHAN_SOFT_TIMESTAMP(4),
  523. },
  524. .info = &ad7991_info,
  525. },
  526. },
  527. [ad7995] = {
  528. .num_channels = 5,
  529. .noirq_config = {
  530. .channel = {
  531. AD799X_CHANNEL(0, 10),
  532. AD799X_CHANNEL(1, 10),
  533. AD799X_CHANNEL(2, 10),
  534. AD799X_CHANNEL(3, 10),
  535. IIO_CHAN_SOFT_TIMESTAMP(4),
  536. },
  537. .info = &ad7991_info,
  538. },
  539. },
  540. [ad7999] = {
  541. .num_channels = 5,
  542. .noirq_config = {
  543. .channel = {
  544. AD799X_CHANNEL(0, 8),
  545. AD799X_CHANNEL(1, 8),
  546. AD799X_CHANNEL(2, 8),
  547. AD799X_CHANNEL(3, 8),
  548. IIO_CHAN_SOFT_TIMESTAMP(4),
  549. },
  550. .info = &ad7991_info,
  551. },
  552. },
  553. [ad7992] = {
  554. .num_channels = 3,
  555. .noirq_config = {
  556. .channel = {
  557. AD799X_CHANNEL(0, 12),
  558. AD799X_CHANNEL(1, 12),
  559. IIO_CHAN_SOFT_TIMESTAMP(3),
  560. },
  561. .info = &ad7993_4_7_8_noirq_info,
  562. },
  563. .irq_config = {
  564. .channel = {
  565. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  566. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  567. IIO_CHAN_SOFT_TIMESTAMP(3),
  568. },
  569. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  570. .info = &ad7993_4_7_8_irq_info,
  571. },
  572. },
  573. [ad7993] = {
  574. .num_channels = 5,
  575. .noirq_config = {
  576. .channel = {
  577. AD799X_CHANNEL(0, 10),
  578. AD799X_CHANNEL(1, 10),
  579. AD799X_CHANNEL(2, 10),
  580. AD799X_CHANNEL(3, 10),
  581. IIO_CHAN_SOFT_TIMESTAMP(4),
  582. },
  583. .info = &ad7993_4_7_8_noirq_info,
  584. },
  585. .irq_config = {
  586. .channel = {
  587. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  588. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  589. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  590. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  591. IIO_CHAN_SOFT_TIMESTAMP(4),
  592. },
  593. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  594. .info = &ad7993_4_7_8_irq_info,
  595. },
  596. },
  597. [ad7994] = {
  598. .num_channels = 5,
  599. .noirq_config = {
  600. .channel = {
  601. AD799X_CHANNEL(0, 12),
  602. AD799X_CHANNEL(1, 12),
  603. AD799X_CHANNEL(2, 12),
  604. AD799X_CHANNEL(3, 12),
  605. IIO_CHAN_SOFT_TIMESTAMP(4),
  606. },
  607. .info = &ad7993_4_7_8_noirq_info,
  608. },
  609. .irq_config = {
  610. .channel = {
  611. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  612. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  613. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  614. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  615. IIO_CHAN_SOFT_TIMESTAMP(4),
  616. },
  617. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  618. .info = &ad7993_4_7_8_irq_info,
  619. },
  620. },
  621. [ad7997] = {
  622. .num_channels = 9,
  623. .noirq_config = {
  624. .channel = {
  625. AD799X_CHANNEL(0, 10),
  626. AD799X_CHANNEL(1, 10),
  627. AD799X_CHANNEL(2, 10),
  628. AD799X_CHANNEL(3, 10),
  629. AD799X_CHANNEL(4, 10),
  630. AD799X_CHANNEL(5, 10),
  631. AD799X_CHANNEL(6, 10),
  632. AD799X_CHANNEL(7, 10),
  633. IIO_CHAN_SOFT_TIMESTAMP(8),
  634. },
  635. .info = &ad7993_4_7_8_noirq_info,
  636. },
  637. .irq_config = {
  638. .channel = {
  639. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  640. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  641. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  642. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  643. AD799X_CHANNEL(4, 10),
  644. AD799X_CHANNEL(5, 10),
  645. AD799X_CHANNEL(6, 10),
  646. AD799X_CHANNEL(7, 10),
  647. IIO_CHAN_SOFT_TIMESTAMP(8),
  648. },
  649. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  650. .info = &ad7993_4_7_8_irq_info,
  651. },
  652. },
  653. [ad7998] = {
  654. .num_channels = 9,
  655. .noirq_config = {
  656. .channel = {
  657. AD799X_CHANNEL(0, 12),
  658. AD799X_CHANNEL(1, 12),
  659. AD799X_CHANNEL(2, 12),
  660. AD799X_CHANNEL(3, 12),
  661. AD799X_CHANNEL(4, 12),
  662. AD799X_CHANNEL(5, 12),
  663. AD799X_CHANNEL(6, 12),
  664. AD799X_CHANNEL(7, 12),
  665. IIO_CHAN_SOFT_TIMESTAMP(8),
  666. },
  667. .info = &ad7993_4_7_8_noirq_info,
  668. },
  669. .irq_config = {
  670. .channel = {
  671. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  672. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  673. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  674. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  675. AD799X_CHANNEL(4, 12),
  676. AD799X_CHANNEL(5, 12),
  677. AD799X_CHANNEL(6, 12),
  678. AD799X_CHANNEL(7, 12),
  679. IIO_CHAN_SOFT_TIMESTAMP(8),
  680. },
  681. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  682. .info = &ad7993_4_7_8_irq_info,
  683. },
  684. },
  685. };
  686. static int ad799x_probe(struct i2c_client *client,
  687. const struct i2c_device_id *id)
  688. {
  689. int ret;
  690. struct ad799x_state *st;
  691. struct iio_dev *indio_dev;
  692. const struct ad799x_chip_info *chip_info =
  693. &ad799x_chip_info_tbl[id->driver_data];
  694. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
  695. if (indio_dev == NULL)
  696. return -ENOMEM;
  697. st = iio_priv(indio_dev);
  698. /* this is only used for device removal purposes */
  699. i2c_set_clientdata(client, indio_dev);
  700. st->id = id->driver_data;
  701. if (client->irq > 0 && chip_info->irq_config.info)
  702. st->chip_config = &chip_info->irq_config;
  703. else
  704. st->chip_config = &chip_info->noirq_config;
  705. /* TODO: Add pdata options for filtering and bit delay */
  706. st->reg = devm_regulator_get(&client->dev, "vcc");
  707. if (IS_ERR(st->reg))
  708. return PTR_ERR(st->reg);
  709. ret = regulator_enable(st->reg);
  710. if (ret)
  711. return ret;
  712. st->vref = devm_regulator_get(&client->dev, "vref");
  713. if (IS_ERR(st->vref)) {
  714. ret = PTR_ERR(st->vref);
  715. goto error_disable_reg;
  716. }
  717. ret = regulator_enable(st->vref);
  718. if (ret)
  719. goto error_disable_reg;
  720. st->client = client;
  721. indio_dev->dev.parent = &client->dev;
  722. indio_dev->dev.of_node = client->dev.of_node;
  723. indio_dev->name = id->name;
  724. indio_dev->info = st->chip_config->info;
  725. indio_dev->modes = INDIO_DIRECT_MODE;
  726. indio_dev->channels = st->chip_config->channel;
  727. indio_dev->num_channels = chip_info->num_channels;
  728. ret = ad799x_write_config(st, st->chip_config->default_config);
  729. if (ret < 0)
  730. goto error_disable_reg;
  731. ret = ad799x_read_config(st);
  732. if (ret < 0)
  733. goto error_disable_reg;
  734. st->config = ret;
  735. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  736. &ad799x_trigger_handler, NULL);
  737. if (ret)
  738. goto error_disable_vref;
  739. if (client->irq > 0) {
  740. ret = devm_request_threaded_irq(&client->dev,
  741. client->irq,
  742. NULL,
  743. ad799x_event_handler,
  744. IRQF_TRIGGER_FALLING |
  745. IRQF_ONESHOT,
  746. client->name,
  747. indio_dev);
  748. if (ret)
  749. goto error_cleanup_ring;
  750. }
  751. ret = iio_device_register(indio_dev);
  752. if (ret)
  753. goto error_cleanup_ring;
  754. return 0;
  755. error_cleanup_ring:
  756. iio_triggered_buffer_cleanup(indio_dev);
  757. error_disable_vref:
  758. regulator_disable(st->vref);
  759. error_disable_reg:
  760. regulator_disable(st->reg);
  761. return ret;
  762. }
  763. static int ad799x_remove(struct i2c_client *client)
  764. {
  765. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  766. struct ad799x_state *st = iio_priv(indio_dev);
  767. iio_device_unregister(indio_dev);
  768. iio_triggered_buffer_cleanup(indio_dev);
  769. regulator_disable(st->vref);
  770. regulator_disable(st->reg);
  771. kfree(st->rx_buf);
  772. return 0;
  773. }
  774. static const struct i2c_device_id ad799x_id[] = {
  775. { "ad7991", ad7991 },
  776. { "ad7995", ad7995 },
  777. { "ad7999", ad7999 },
  778. { "ad7992", ad7992 },
  779. { "ad7993", ad7993 },
  780. { "ad7994", ad7994 },
  781. { "ad7997", ad7997 },
  782. { "ad7998", ad7998 },
  783. {}
  784. };
  785. MODULE_DEVICE_TABLE(i2c, ad799x_id);
  786. static struct i2c_driver ad799x_driver = {
  787. .driver = {
  788. .name = "ad799x",
  789. },
  790. .probe = ad799x_probe,
  791. .remove = ad799x_remove,
  792. .id_table = ad799x_id,
  793. };
  794. module_i2c_driver(ad799x_driver);
  795. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  796. MODULE_DESCRIPTION("Analog Devices AD799x ADC");
  797. MODULE_LICENSE("GPL v2");