ad7887.c 8.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369
  1. /*
  2. * AD7887 SPI ADC driver
  3. *
  4. * Copyright 2010-2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/sysfs.h>
  12. #include <linux/spi/spi.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/err.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/bitops.h>
  18. #include <linux/iio/iio.h>
  19. #include <linux/iio/sysfs.h>
  20. #include <linux/iio/buffer.h>
  21. #include <linux/iio/trigger_consumer.h>
  22. #include <linux/iio/triggered_buffer.h>
  23. #include <linux/platform_data/ad7887.h>
  24. #define AD7887_REF_DIS BIT(5) /* on-chip reference disable */
  25. #define AD7887_DUAL BIT(4) /* dual-channel mode */
  26. #define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */
  27. #define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */
  28. #define AD7887_PM_MODE1 0 /* CS based shutdown */
  29. #define AD7887_PM_MODE2 1 /* full on */
  30. #define AD7887_PM_MODE3 2 /* auto shutdown after conversion */
  31. #define AD7887_PM_MODE4 3 /* standby mode */
  32. enum ad7887_channels {
  33. AD7887_CH0,
  34. AD7887_CH0_CH1,
  35. AD7887_CH1,
  36. };
  37. /**
  38. * struct ad7887_chip_info - chip specifc information
  39. * @int_vref_mv: the internal reference voltage
  40. * @channel: channel specification
  41. */
  42. struct ad7887_chip_info {
  43. u16 int_vref_mv;
  44. struct iio_chan_spec channel[3];
  45. };
  46. struct ad7887_state {
  47. struct spi_device *spi;
  48. const struct ad7887_chip_info *chip_info;
  49. struct regulator *reg;
  50. struct spi_transfer xfer[4];
  51. struct spi_message msg[3];
  52. struct spi_message *ring_msg;
  53. unsigned char tx_cmd_buf[4];
  54. /*
  55. * DMA (thus cache coherency maintenance) requires the
  56. * transfer buffers to live in their own cache lines.
  57. * Buffer needs to be large enough to hold two 16 bit samples and a
  58. * 64 bit aligned 64 bit timestamp.
  59. */
  60. unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
  61. ____cacheline_aligned;
  62. };
  63. enum ad7887_supported_device_ids {
  64. ID_AD7887
  65. };
  66. static int ad7887_ring_preenable(struct iio_dev *indio_dev)
  67. {
  68. struct ad7887_state *st = iio_priv(indio_dev);
  69. /* We know this is a single long so can 'cheat' */
  70. switch (*indio_dev->active_scan_mask) {
  71. case (1 << 0):
  72. st->ring_msg = &st->msg[AD7887_CH0];
  73. break;
  74. case (1 << 1):
  75. st->ring_msg = &st->msg[AD7887_CH1];
  76. /* Dummy read: push CH1 setting down to hardware */
  77. spi_sync(st->spi, st->ring_msg);
  78. break;
  79. case ((1 << 1) | (1 << 0)):
  80. st->ring_msg = &st->msg[AD7887_CH0_CH1];
  81. break;
  82. }
  83. return 0;
  84. }
  85. static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
  86. {
  87. struct ad7887_state *st = iio_priv(indio_dev);
  88. /* dummy read: restore default CH0 settin */
  89. return spi_sync(st->spi, &st->msg[AD7887_CH0]);
  90. }
  91. /**
  92. * ad7887_trigger_handler() bh of trigger launched polling to ring buffer
  93. *
  94. * Currently there is no option in this driver to disable the saving of
  95. * timestamps within the ring.
  96. **/
  97. static irqreturn_t ad7887_trigger_handler(int irq, void *p)
  98. {
  99. struct iio_poll_func *pf = p;
  100. struct iio_dev *indio_dev = pf->indio_dev;
  101. struct ad7887_state *st = iio_priv(indio_dev);
  102. int b_sent;
  103. b_sent = spi_sync(st->spi, st->ring_msg);
  104. if (b_sent)
  105. goto done;
  106. iio_push_to_buffers_with_timestamp(indio_dev, st->data,
  107. iio_get_time_ns(indio_dev));
  108. done:
  109. iio_trigger_notify_done(indio_dev->trig);
  110. return IRQ_HANDLED;
  111. }
  112. static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
  113. .preenable = &ad7887_ring_preenable,
  114. .postenable = &iio_triggered_buffer_postenable,
  115. .predisable = &iio_triggered_buffer_predisable,
  116. .postdisable = &ad7887_ring_postdisable,
  117. };
  118. static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
  119. {
  120. int ret = spi_sync(st->spi, &st->msg[ch]);
  121. if (ret)
  122. return ret;
  123. return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
  124. }
  125. static int ad7887_read_raw(struct iio_dev *indio_dev,
  126. struct iio_chan_spec const *chan,
  127. int *val,
  128. int *val2,
  129. long m)
  130. {
  131. int ret;
  132. struct ad7887_state *st = iio_priv(indio_dev);
  133. switch (m) {
  134. case IIO_CHAN_INFO_RAW:
  135. ret = iio_device_claim_direct_mode(indio_dev);
  136. if (ret)
  137. return ret;
  138. ret = ad7887_scan_direct(st, chan->address);
  139. iio_device_release_direct_mode(indio_dev);
  140. if (ret < 0)
  141. return ret;
  142. *val = ret >> chan->scan_type.shift;
  143. *val &= GENMASK(chan->scan_type.realbits - 1, 0);
  144. return IIO_VAL_INT;
  145. case IIO_CHAN_INFO_SCALE:
  146. if (st->reg) {
  147. *val = regulator_get_voltage(st->reg);
  148. if (*val < 0)
  149. return *val;
  150. *val /= 1000;
  151. } else {
  152. *val = st->chip_info->int_vref_mv;
  153. }
  154. *val2 = chan->scan_type.realbits;
  155. return IIO_VAL_FRACTIONAL_LOG2;
  156. }
  157. return -EINVAL;
  158. }
  159. static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
  160. /*
  161. * More devices added in future
  162. */
  163. [ID_AD7887] = {
  164. .channel[0] = {
  165. .type = IIO_VOLTAGE,
  166. .indexed = 1,
  167. .channel = 1,
  168. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  169. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
  170. .address = 1,
  171. .scan_index = 1,
  172. .scan_type = {
  173. .sign = 'u',
  174. .realbits = 12,
  175. .storagebits = 16,
  176. .shift = 0,
  177. .endianness = IIO_BE,
  178. },
  179. },
  180. .channel[1] = {
  181. .type = IIO_VOLTAGE,
  182. .indexed = 1,
  183. .channel = 0,
  184. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  185. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
  186. .address = 0,
  187. .scan_index = 0,
  188. .scan_type = {
  189. .sign = 'u',
  190. .realbits = 12,
  191. .storagebits = 16,
  192. .shift = 0,
  193. .endianness = IIO_BE,
  194. },
  195. },
  196. .channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
  197. .int_vref_mv = 2500,
  198. },
  199. };
  200. static const struct iio_info ad7887_info = {
  201. .read_raw = &ad7887_read_raw,
  202. .driver_module = THIS_MODULE,
  203. };
  204. static int ad7887_probe(struct spi_device *spi)
  205. {
  206. struct ad7887_platform_data *pdata = spi->dev.platform_data;
  207. struct ad7887_state *st;
  208. struct iio_dev *indio_dev;
  209. uint8_t mode;
  210. int ret;
  211. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  212. if (indio_dev == NULL)
  213. return -ENOMEM;
  214. st = iio_priv(indio_dev);
  215. if (!pdata || !pdata->use_onchip_ref) {
  216. st->reg = devm_regulator_get(&spi->dev, "vref");
  217. if (IS_ERR(st->reg))
  218. return PTR_ERR(st->reg);
  219. ret = regulator_enable(st->reg);
  220. if (ret)
  221. return ret;
  222. }
  223. st->chip_info =
  224. &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
  225. spi_set_drvdata(spi, indio_dev);
  226. st->spi = spi;
  227. /* Estabilish that the iio_dev is a child of the spi device */
  228. indio_dev->dev.parent = &spi->dev;
  229. indio_dev->dev.of_node = spi->dev.of_node;
  230. indio_dev->name = spi_get_device_id(spi)->name;
  231. indio_dev->info = &ad7887_info;
  232. indio_dev->modes = INDIO_DIRECT_MODE;
  233. /* Setup default message */
  234. mode = AD7887_PM_MODE4;
  235. if (!pdata || !pdata->use_onchip_ref)
  236. mode |= AD7887_REF_DIS;
  237. if (pdata && pdata->en_dual)
  238. mode |= AD7887_DUAL;
  239. st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
  240. st->xfer[0].rx_buf = &st->data[0];
  241. st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
  242. st->xfer[0].len = 2;
  243. spi_message_init(&st->msg[AD7887_CH0]);
  244. spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
  245. if (pdata && pdata->en_dual) {
  246. st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
  247. st->xfer[1].rx_buf = &st->data[0];
  248. st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
  249. st->xfer[1].len = 2;
  250. st->xfer[2].rx_buf = &st->data[2];
  251. st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
  252. st->xfer[2].len = 2;
  253. spi_message_init(&st->msg[AD7887_CH0_CH1]);
  254. spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
  255. spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
  256. st->xfer[3].rx_buf = &st->data[2];
  257. st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
  258. st->xfer[3].len = 2;
  259. spi_message_init(&st->msg[AD7887_CH1]);
  260. spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
  261. indio_dev->channels = st->chip_info->channel;
  262. indio_dev->num_channels = 3;
  263. } else {
  264. indio_dev->channels = &st->chip_info->channel[1];
  265. indio_dev->num_channels = 2;
  266. }
  267. ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  268. &ad7887_trigger_handler, &ad7887_ring_setup_ops);
  269. if (ret)
  270. goto error_disable_reg;
  271. ret = iio_device_register(indio_dev);
  272. if (ret)
  273. goto error_unregister_ring;
  274. return 0;
  275. error_unregister_ring:
  276. iio_triggered_buffer_cleanup(indio_dev);
  277. error_disable_reg:
  278. if (st->reg)
  279. regulator_disable(st->reg);
  280. return ret;
  281. }
  282. static int ad7887_remove(struct spi_device *spi)
  283. {
  284. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  285. struct ad7887_state *st = iio_priv(indio_dev);
  286. iio_device_unregister(indio_dev);
  287. iio_triggered_buffer_cleanup(indio_dev);
  288. if (st->reg)
  289. regulator_disable(st->reg);
  290. return 0;
  291. }
  292. static const struct spi_device_id ad7887_id[] = {
  293. {"ad7887", ID_AD7887},
  294. {}
  295. };
  296. MODULE_DEVICE_TABLE(spi, ad7887_id);
  297. static struct spi_driver ad7887_driver = {
  298. .driver = {
  299. .name = "ad7887",
  300. },
  301. .probe = ad7887_probe,
  302. .remove = ad7887_remove,
  303. .id_table = ad7887_id,
  304. };
  305. module_spi_driver(ad7887_driver);
  306. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  307. MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
  308. MODULE_LICENSE("GPL v2");