ad7476.c 7.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315
  1. /*
  2. * AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
  3. *
  4. * Copyright 2010 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/sysfs.h>
  12. #include <linux/spi/spi.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/err.h>
  15. #include <linux/module.h>
  16. #include <linux/bitops.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/buffer.h>
  20. #include <linux/iio/trigger_consumer.h>
  21. #include <linux/iio/triggered_buffer.h>
  22. struct ad7476_state;
  23. struct ad7476_chip_info {
  24. unsigned int int_vref_uv;
  25. struct iio_chan_spec channel[2];
  26. void (*reset)(struct ad7476_state *);
  27. };
  28. struct ad7476_state {
  29. struct spi_device *spi;
  30. const struct ad7476_chip_info *chip_info;
  31. struct regulator *reg;
  32. struct spi_transfer xfer;
  33. struct spi_message msg;
  34. /*
  35. * DMA (thus cache coherency maintenance) requires the
  36. * transfer buffers to live in their own cache lines.
  37. * Make the buffer large enough for one 16 bit sample and one 64 bit
  38. * aligned 64 bit timestamp.
  39. */
  40. unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
  41. ____cacheline_aligned;
  42. };
  43. enum ad7476_supported_device_ids {
  44. ID_AD7091R,
  45. ID_AD7276,
  46. ID_AD7277,
  47. ID_AD7278,
  48. ID_AD7466,
  49. ID_AD7467,
  50. ID_AD7468,
  51. ID_AD7495,
  52. ID_AD7940,
  53. };
  54. static irqreturn_t ad7476_trigger_handler(int irq, void *p)
  55. {
  56. struct iio_poll_func *pf = p;
  57. struct iio_dev *indio_dev = pf->indio_dev;
  58. struct ad7476_state *st = iio_priv(indio_dev);
  59. int b_sent;
  60. b_sent = spi_sync(st->spi, &st->msg);
  61. if (b_sent < 0)
  62. goto done;
  63. iio_push_to_buffers_with_timestamp(indio_dev, st->data,
  64. iio_get_time_ns(indio_dev));
  65. done:
  66. iio_trigger_notify_done(indio_dev->trig);
  67. return IRQ_HANDLED;
  68. }
  69. static void ad7091_reset(struct ad7476_state *st)
  70. {
  71. /* Any transfers with 8 scl cycles will reset the device */
  72. spi_read(st->spi, st->data, 1);
  73. }
  74. static int ad7476_scan_direct(struct ad7476_state *st)
  75. {
  76. int ret;
  77. ret = spi_sync(st->spi, &st->msg);
  78. if (ret)
  79. return ret;
  80. return be16_to_cpup((__be16 *)st->data);
  81. }
  82. static int ad7476_read_raw(struct iio_dev *indio_dev,
  83. struct iio_chan_spec const *chan,
  84. int *val,
  85. int *val2,
  86. long m)
  87. {
  88. int ret;
  89. struct ad7476_state *st = iio_priv(indio_dev);
  90. int scale_uv;
  91. switch (m) {
  92. case IIO_CHAN_INFO_RAW:
  93. ret = iio_device_claim_direct_mode(indio_dev);
  94. if (ret)
  95. return ret;
  96. ret = ad7476_scan_direct(st);
  97. iio_device_release_direct_mode(indio_dev);
  98. if (ret < 0)
  99. return ret;
  100. *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
  101. GENMASK(st->chip_info->channel[0].scan_type.realbits - 1, 0);
  102. return IIO_VAL_INT;
  103. case IIO_CHAN_INFO_SCALE:
  104. if (!st->chip_info->int_vref_uv) {
  105. scale_uv = regulator_get_voltage(st->reg);
  106. if (scale_uv < 0)
  107. return scale_uv;
  108. } else {
  109. scale_uv = st->chip_info->int_vref_uv;
  110. }
  111. *val = scale_uv / 1000;
  112. *val2 = chan->scan_type.realbits;
  113. return IIO_VAL_FRACTIONAL_LOG2;
  114. }
  115. return -EINVAL;
  116. }
  117. #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \
  118. { \
  119. .type = IIO_VOLTAGE, \
  120. .indexed = 1, \
  121. .info_mask_separate = _info_mask_sep, \
  122. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  123. .scan_type = { \
  124. .sign = 'u', \
  125. .realbits = (bits), \
  126. .storagebits = 16, \
  127. .shift = (_shift), \
  128. .endianness = IIO_BE, \
  129. }, \
  130. }
  131. #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
  132. BIT(IIO_CHAN_INFO_RAW))
  133. #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
  134. BIT(IIO_CHAN_INFO_RAW))
  135. #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
  136. static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
  137. [ID_AD7091R] = {
  138. .channel[0] = AD7091R_CHAN(12),
  139. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  140. .reset = ad7091_reset,
  141. },
  142. [ID_AD7276] = {
  143. .channel[0] = AD7940_CHAN(12),
  144. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  145. },
  146. [ID_AD7277] = {
  147. .channel[0] = AD7940_CHAN(10),
  148. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  149. },
  150. [ID_AD7278] = {
  151. .channel[0] = AD7940_CHAN(8),
  152. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  153. },
  154. [ID_AD7466] = {
  155. .channel[0] = AD7476_CHAN(12),
  156. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  157. },
  158. [ID_AD7467] = {
  159. .channel[0] = AD7476_CHAN(10),
  160. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  161. },
  162. [ID_AD7468] = {
  163. .channel[0] = AD7476_CHAN(8),
  164. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  165. },
  166. [ID_AD7495] = {
  167. .channel[0] = AD7476_CHAN(12),
  168. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  169. .int_vref_uv = 2500000,
  170. },
  171. [ID_AD7940] = {
  172. .channel[0] = AD7940_CHAN(14),
  173. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  174. },
  175. };
  176. static const struct iio_info ad7476_info = {
  177. .driver_module = THIS_MODULE,
  178. .read_raw = &ad7476_read_raw,
  179. };
  180. static int ad7476_probe(struct spi_device *spi)
  181. {
  182. struct ad7476_state *st;
  183. struct iio_dev *indio_dev;
  184. int ret;
  185. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  186. if (!indio_dev)
  187. return -ENOMEM;
  188. st = iio_priv(indio_dev);
  189. st->chip_info =
  190. &ad7476_chip_info_tbl[spi_get_device_id(spi)->driver_data];
  191. st->reg = devm_regulator_get(&spi->dev, "vcc");
  192. if (IS_ERR(st->reg))
  193. return PTR_ERR(st->reg);
  194. ret = regulator_enable(st->reg);
  195. if (ret)
  196. return ret;
  197. spi_set_drvdata(spi, indio_dev);
  198. st->spi = spi;
  199. /* Establish that the iio_dev is a child of the spi device */
  200. indio_dev->dev.parent = &spi->dev;
  201. indio_dev->dev.of_node = spi->dev.of_node;
  202. indio_dev->name = spi_get_device_id(spi)->name;
  203. indio_dev->modes = INDIO_DIRECT_MODE;
  204. indio_dev->channels = st->chip_info->channel;
  205. indio_dev->num_channels = 2;
  206. indio_dev->info = &ad7476_info;
  207. /* Setup default message */
  208. st->xfer.rx_buf = &st->data;
  209. st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
  210. spi_message_init(&st->msg);
  211. spi_message_add_tail(&st->xfer, &st->msg);
  212. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  213. &ad7476_trigger_handler, NULL);
  214. if (ret)
  215. goto error_disable_reg;
  216. if (st->chip_info->reset)
  217. st->chip_info->reset(st);
  218. ret = iio_device_register(indio_dev);
  219. if (ret)
  220. goto error_ring_unregister;
  221. return 0;
  222. error_ring_unregister:
  223. iio_triggered_buffer_cleanup(indio_dev);
  224. error_disable_reg:
  225. regulator_disable(st->reg);
  226. return ret;
  227. }
  228. static int ad7476_remove(struct spi_device *spi)
  229. {
  230. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  231. struct ad7476_state *st = iio_priv(indio_dev);
  232. iio_device_unregister(indio_dev);
  233. iio_triggered_buffer_cleanup(indio_dev);
  234. regulator_disable(st->reg);
  235. return 0;
  236. }
  237. static const struct spi_device_id ad7476_id[] = {
  238. {"ad7091r", ID_AD7091R},
  239. {"ad7273", ID_AD7277},
  240. {"ad7274", ID_AD7276},
  241. {"ad7276", ID_AD7276},
  242. {"ad7277", ID_AD7277},
  243. {"ad7278", ID_AD7278},
  244. {"ad7466", ID_AD7466},
  245. {"ad7467", ID_AD7467},
  246. {"ad7468", ID_AD7468},
  247. {"ad7475", ID_AD7466},
  248. {"ad7476", ID_AD7466},
  249. {"ad7476a", ID_AD7466},
  250. {"ad7477", ID_AD7467},
  251. {"ad7477a", ID_AD7467},
  252. {"ad7478", ID_AD7468},
  253. {"ad7478a", ID_AD7468},
  254. {"ad7495", ID_AD7495},
  255. {"ad7910", ID_AD7467},
  256. {"ad7920", ID_AD7466},
  257. {"ad7940", ID_AD7940},
  258. {}
  259. };
  260. MODULE_DEVICE_TABLE(spi, ad7476_id);
  261. static struct spi_driver ad7476_driver = {
  262. .driver = {
  263. .name = "ad7476",
  264. },
  265. .probe = ad7476_probe,
  266. .remove = ad7476_remove,
  267. .id_table = ad7476_id,
  268. };
  269. module_spi_driver(ad7476_driver);
  270. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  271. MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
  272. MODULE_LICENSE("GPL v2");