ad7266.c 13 KB

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  1. /*
  2. * AD7266/65 SPI ADC driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/buffer.h>
  19. #include <linux/iio/trigger_consumer.h>
  20. #include <linux/iio/triggered_buffer.h>
  21. #include <linux/platform_data/ad7266.h>
  22. struct ad7266_state {
  23. struct spi_device *spi;
  24. struct regulator *reg;
  25. unsigned long vref_mv;
  26. struct spi_transfer single_xfer[3];
  27. struct spi_message single_msg;
  28. enum ad7266_range range;
  29. enum ad7266_mode mode;
  30. bool fixed_addr;
  31. struct gpio gpios[3];
  32. /*
  33. * DMA (thus cache coherency maintenance) requires the
  34. * transfer buffers to live in their own cache lines.
  35. * The buffer needs to be large enough to hold two samples (4 bytes) and
  36. * the naturally aligned timestamp (8 bytes).
  37. */
  38. struct {
  39. __be16 sample[2];
  40. s64 timestamp;
  41. } data ____cacheline_aligned;
  42. };
  43. static int ad7266_wakeup(struct ad7266_state *st)
  44. {
  45. /* Any read with >= 2 bytes will wake the device */
  46. return spi_read(st->spi, &st->data.sample[0], 2);
  47. }
  48. static int ad7266_powerdown(struct ad7266_state *st)
  49. {
  50. /* Any read with < 2 bytes will powerdown the device */
  51. return spi_read(st->spi, &st->data.sample[0], 1);
  52. }
  53. static int ad7266_preenable(struct iio_dev *indio_dev)
  54. {
  55. struct ad7266_state *st = iio_priv(indio_dev);
  56. return ad7266_wakeup(st);
  57. }
  58. static int ad7266_postdisable(struct iio_dev *indio_dev)
  59. {
  60. struct ad7266_state *st = iio_priv(indio_dev);
  61. return ad7266_powerdown(st);
  62. }
  63. static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
  64. .preenable = &ad7266_preenable,
  65. .postenable = &iio_triggered_buffer_postenable,
  66. .predisable = &iio_triggered_buffer_predisable,
  67. .postdisable = &ad7266_postdisable,
  68. };
  69. static irqreturn_t ad7266_trigger_handler(int irq, void *p)
  70. {
  71. struct iio_poll_func *pf = p;
  72. struct iio_dev *indio_dev = pf->indio_dev;
  73. struct ad7266_state *st = iio_priv(indio_dev);
  74. int ret;
  75. ret = spi_read(st->spi, st->data.sample, 4);
  76. if (ret == 0) {
  77. iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
  78. pf->timestamp);
  79. }
  80. iio_trigger_notify_done(indio_dev->trig);
  81. return IRQ_HANDLED;
  82. }
  83. static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
  84. {
  85. unsigned int i;
  86. if (st->fixed_addr)
  87. return;
  88. switch (st->mode) {
  89. case AD7266_MODE_SINGLE_ENDED:
  90. nr >>= 1;
  91. break;
  92. case AD7266_MODE_PSEUDO_DIFF:
  93. nr |= 1;
  94. break;
  95. case AD7266_MODE_DIFF:
  96. nr &= ~1;
  97. break;
  98. }
  99. for (i = 0; i < 3; ++i)
  100. gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
  101. }
  102. static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
  103. const unsigned long *scan_mask)
  104. {
  105. struct ad7266_state *st = iio_priv(indio_dev);
  106. unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
  107. ad7266_select_input(st, nr);
  108. return 0;
  109. }
  110. static int ad7266_read_single(struct ad7266_state *st, int *val,
  111. unsigned int address)
  112. {
  113. int ret;
  114. ad7266_select_input(st, address);
  115. ret = spi_sync(st->spi, &st->single_msg);
  116. *val = be16_to_cpu(st->data.sample[address % 2]);
  117. return ret;
  118. }
  119. static int ad7266_read_raw(struct iio_dev *indio_dev,
  120. struct iio_chan_spec const *chan, int *val, int *val2, long m)
  121. {
  122. struct ad7266_state *st = iio_priv(indio_dev);
  123. unsigned long scale_mv;
  124. int ret;
  125. switch (m) {
  126. case IIO_CHAN_INFO_RAW:
  127. ret = iio_device_claim_direct_mode(indio_dev);
  128. if (ret)
  129. return ret;
  130. ret = ad7266_read_single(st, val, chan->address);
  131. iio_device_release_direct_mode(indio_dev);
  132. *val = (*val >> 2) & 0xfff;
  133. if (chan->scan_type.sign == 's')
  134. *val = sign_extend32(*val, 11);
  135. return IIO_VAL_INT;
  136. case IIO_CHAN_INFO_SCALE:
  137. scale_mv = st->vref_mv;
  138. if (st->mode == AD7266_MODE_DIFF)
  139. scale_mv *= 2;
  140. if (st->range == AD7266_RANGE_2VREF)
  141. scale_mv *= 2;
  142. *val = scale_mv;
  143. *val2 = chan->scan_type.realbits;
  144. return IIO_VAL_FRACTIONAL_LOG2;
  145. case IIO_CHAN_INFO_OFFSET:
  146. if (st->range == AD7266_RANGE_2VREF &&
  147. st->mode != AD7266_MODE_DIFF)
  148. *val = 2048;
  149. else
  150. *val = 0;
  151. return IIO_VAL_INT;
  152. }
  153. return -EINVAL;
  154. }
  155. #define AD7266_CHAN(_chan, _sign) { \
  156. .type = IIO_VOLTAGE, \
  157. .indexed = 1, \
  158. .channel = (_chan), \
  159. .address = (_chan), \
  160. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  161. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  162. | BIT(IIO_CHAN_INFO_OFFSET), \
  163. .scan_index = (_chan), \
  164. .scan_type = { \
  165. .sign = (_sign), \
  166. .realbits = 12, \
  167. .storagebits = 16, \
  168. .shift = 2, \
  169. .endianness = IIO_BE, \
  170. }, \
  171. }
  172. #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
  173. const struct iio_chan_spec ad7266_channels_##_name[] = { \
  174. AD7266_CHAN(0, (_sign)), \
  175. AD7266_CHAN(1, (_sign)), \
  176. AD7266_CHAN(2, (_sign)), \
  177. AD7266_CHAN(3, (_sign)), \
  178. AD7266_CHAN(4, (_sign)), \
  179. AD7266_CHAN(5, (_sign)), \
  180. AD7266_CHAN(6, (_sign)), \
  181. AD7266_CHAN(7, (_sign)), \
  182. AD7266_CHAN(8, (_sign)), \
  183. AD7266_CHAN(9, (_sign)), \
  184. AD7266_CHAN(10, (_sign)), \
  185. AD7266_CHAN(11, (_sign)), \
  186. IIO_CHAN_SOFT_TIMESTAMP(13), \
  187. }
  188. #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
  189. const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
  190. AD7266_CHAN(0, (_sign)), \
  191. AD7266_CHAN(1, (_sign)), \
  192. IIO_CHAN_SOFT_TIMESTAMP(2), \
  193. }
  194. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
  195. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
  196. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
  197. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
  198. #define AD7266_CHAN_DIFF(_chan, _sign) { \
  199. .type = IIO_VOLTAGE, \
  200. .indexed = 1, \
  201. .channel = (_chan) * 2, \
  202. .channel2 = (_chan) * 2 + 1, \
  203. .address = (_chan), \
  204. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  205. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  206. | BIT(IIO_CHAN_INFO_OFFSET), \
  207. .scan_index = (_chan), \
  208. .scan_type = { \
  209. .sign = _sign, \
  210. .realbits = 12, \
  211. .storagebits = 16, \
  212. .shift = 2, \
  213. .endianness = IIO_BE, \
  214. }, \
  215. .differential = 1, \
  216. }
  217. #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
  218. const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
  219. AD7266_CHAN_DIFF(0, (_sign)), \
  220. AD7266_CHAN_DIFF(1, (_sign)), \
  221. AD7266_CHAN_DIFF(2, (_sign)), \
  222. AD7266_CHAN_DIFF(3, (_sign)), \
  223. AD7266_CHAN_DIFF(4, (_sign)), \
  224. AD7266_CHAN_DIFF(5, (_sign)), \
  225. IIO_CHAN_SOFT_TIMESTAMP(6), \
  226. }
  227. static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
  228. static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
  229. #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
  230. const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
  231. AD7266_CHAN_DIFF(0, (_sign)), \
  232. AD7266_CHAN_DIFF(1, (_sign)), \
  233. IIO_CHAN_SOFT_TIMESTAMP(2), \
  234. }
  235. static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
  236. static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
  237. static const struct iio_info ad7266_info = {
  238. .read_raw = &ad7266_read_raw,
  239. .update_scan_mode = &ad7266_update_scan_mode,
  240. .driver_module = THIS_MODULE,
  241. };
  242. static const unsigned long ad7266_available_scan_masks[] = {
  243. 0x003,
  244. 0x00c,
  245. 0x030,
  246. 0x0c0,
  247. 0x300,
  248. 0xc00,
  249. 0x000,
  250. };
  251. static const unsigned long ad7266_available_scan_masks_diff[] = {
  252. 0x003,
  253. 0x00c,
  254. 0x030,
  255. 0x000,
  256. };
  257. static const unsigned long ad7266_available_scan_masks_fixed[] = {
  258. 0x003,
  259. 0x000,
  260. };
  261. struct ad7266_chan_info {
  262. const struct iio_chan_spec *channels;
  263. unsigned int num_channels;
  264. const unsigned long *scan_masks;
  265. };
  266. #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
  267. (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
  268. static const struct ad7266_chan_info ad7266_chan_infos[] = {
  269. [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
  270. .channels = ad7266_channels_u,
  271. .num_channels = ARRAY_SIZE(ad7266_channels_u),
  272. .scan_masks = ad7266_available_scan_masks,
  273. },
  274. [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
  275. .channels = ad7266_channels_u_fixed,
  276. .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
  277. .scan_masks = ad7266_available_scan_masks_fixed,
  278. },
  279. [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
  280. .channels = ad7266_channels_s,
  281. .num_channels = ARRAY_SIZE(ad7266_channels_s),
  282. .scan_masks = ad7266_available_scan_masks,
  283. },
  284. [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
  285. .channels = ad7266_channels_s_fixed,
  286. .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
  287. .scan_masks = ad7266_available_scan_masks_fixed,
  288. },
  289. [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
  290. .channels = ad7266_channels_diff_u,
  291. .num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
  292. .scan_masks = ad7266_available_scan_masks_diff,
  293. },
  294. [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
  295. .channels = ad7266_channels_diff_fixed_u,
  296. .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
  297. .scan_masks = ad7266_available_scan_masks_fixed,
  298. },
  299. [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
  300. .channels = ad7266_channels_diff_s,
  301. .num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
  302. .scan_masks = ad7266_available_scan_masks_diff,
  303. },
  304. [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
  305. .channels = ad7266_channels_diff_fixed_s,
  306. .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
  307. .scan_masks = ad7266_available_scan_masks_fixed,
  308. },
  309. };
  310. static void ad7266_init_channels(struct iio_dev *indio_dev)
  311. {
  312. struct ad7266_state *st = iio_priv(indio_dev);
  313. bool is_differential, is_signed;
  314. const struct ad7266_chan_info *chan_info;
  315. int i;
  316. is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
  317. is_signed = (st->range == AD7266_RANGE_2VREF) |
  318. (st->mode == AD7266_MODE_DIFF);
  319. i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
  320. chan_info = &ad7266_chan_infos[i];
  321. indio_dev->channels = chan_info->channels;
  322. indio_dev->num_channels = chan_info->num_channels;
  323. indio_dev->available_scan_masks = chan_info->scan_masks;
  324. indio_dev->masklength = chan_info->num_channels - 1;
  325. }
  326. static const char * const ad7266_gpio_labels[] = {
  327. "AD0", "AD1", "AD2",
  328. };
  329. static int ad7266_probe(struct spi_device *spi)
  330. {
  331. struct ad7266_platform_data *pdata = spi->dev.platform_data;
  332. struct iio_dev *indio_dev;
  333. struct ad7266_state *st;
  334. unsigned int i;
  335. int ret;
  336. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  337. if (indio_dev == NULL)
  338. return -ENOMEM;
  339. st = iio_priv(indio_dev);
  340. st->reg = devm_regulator_get_optional(&spi->dev, "vref");
  341. if (!IS_ERR(st->reg)) {
  342. ret = regulator_enable(st->reg);
  343. if (ret)
  344. return ret;
  345. ret = regulator_get_voltage(st->reg);
  346. if (ret < 0)
  347. goto error_disable_reg;
  348. st->vref_mv = ret / 1000;
  349. } else {
  350. /* Any other error indicates that the regulator does exist */
  351. if (PTR_ERR(st->reg) != -ENODEV)
  352. return PTR_ERR(st->reg);
  353. /* Use internal reference */
  354. st->vref_mv = 2500;
  355. }
  356. if (pdata) {
  357. st->fixed_addr = pdata->fixed_addr;
  358. st->mode = pdata->mode;
  359. st->range = pdata->range;
  360. if (!st->fixed_addr) {
  361. for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
  362. st->gpios[i].gpio = pdata->addr_gpios[i];
  363. st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
  364. st->gpios[i].label = ad7266_gpio_labels[i];
  365. }
  366. ret = gpio_request_array(st->gpios,
  367. ARRAY_SIZE(st->gpios));
  368. if (ret)
  369. goto error_disable_reg;
  370. }
  371. } else {
  372. st->fixed_addr = true;
  373. st->range = AD7266_RANGE_VREF;
  374. st->mode = AD7266_MODE_DIFF;
  375. }
  376. spi_set_drvdata(spi, indio_dev);
  377. st->spi = spi;
  378. indio_dev->dev.parent = &spi->dev;
  379. indio_dev->dev.of_node = spi->dev.of_node;
  380. indio_dev->name = spi_get_device_id(spi)->name;
  381. indio_dev->modes = INDIO_DIRECT_MODE;
  382. indio_dev->info = &ad7266_info;
  383. ad7266_init_channels(indio_dev);
  384. /* wakeup */
  385. st->single_xfer[0].rx_buf = &st->data.sample[0];
  386. st->single_xfer[0].len = 2;
  387. st->single_xfer[0].cs_change = 1;
  388. /* conversion */
  389. st->single_xfer[1].rx_buf = st->data.sample;
  390. st->single_xfer[1].len = 4;
  391. st->single_xfer[1].cs_change = 1;
  392. /* powerdown */
  393. st->single_xfer[2].tx_buf = &st->data.sample[0];
  394. st->single_xfer[2].len = 1;
  395. spi_message_init(&st->single_msg);
  396. spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
  397. spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
  398. spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
  399. ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  400. &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
  401. if (ret)
  402. goto error_free_gpios;
  403. ret = iio_device_register(indio_dev);
  404. if (ret)
  405. goto error_buffer_cleanup;
  406. return 0;
  407. error_buffer_cleanup:
  408. iio_triggered_buffer_cleanup(indio_dev);
  409. error_free_gpios:
  410. if (!st->fixed_addr)
  411. gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
  412. error_disable_reg:
  413. if (!IS_ERR(st->reg))
  414. regulator_disable(st->reg);
  415. return ret;
  416. }
  417. static int ad7266_remove(struct spi_device *spi)
  418. {
  419. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  420. struct ad7266_state *st = iio_priv(indio_dev);
  421. iio_device_unregister(indio_dev);
  422. iio_triggered_buffer_cleanup(indio_dev);
  423. if (!st->fixed_addr)
  424. gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
  425. if (!IS_ERR(st->reg))
  426. regulator_disable(st->reg);
  427. return 0;
  428. }
  429. static const struct spi_device_id ad7266_id[] = {
  430. {"ad7265", 0},
  431. {"ad7266", 0},
  432. { }
  433. };
  434. MODULE_DEVICE_TABLE(spi, ad7266_id);
  435. static struct spi_driver ad7266_driver = {
  436. .driver = {
  437. .name = "ad7266",
  438. },
  439. .probe = ad7266_probe,
  440. .remove = ad7266_remove,
  441. .id_table = ad7266_id,
  442. };
  443. module_spi_driver(ad7266_driver);
  444. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  445. MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
  446. MODULE_LICENSE("GPL v2");