gpio-htc-egpio.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441
  1. /*
  2. * Support for the GPIO/IRQ expander chips present on several HTC phones.
  3. * These are implemented in CPLD chips present on the board.
  4. *
  5. * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
  6. * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
  7. *
  8. * This file may be distributed under the terms of the GNU GPL license.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/irq.h>
  14. #include <linux/io.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/platform_data/gpio-htc-egpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/module.h>
  20. struct egpio_chip {
  21. int reg_start;
  22. int cached_values;
  23. unsigned long is_out;
  24. struct device *dev;
  25. struct gpio_chip chip;
  26. };
  27. struct egpio_info {
  28. spinlock_t lock;
  29. /* iomem info */
  30. void __iomem *base_addr;
  31. int bus_shift; /* byte shift */
  32. int reg_shift; /* bit shift */
  33. int reg_mask;
  34. /* irq info */
  35. int ack_register;
  36. int ack_write;
  37. u16 irqs_enabled;
  38. uint irq_start;
  39. int nirqs;
  40. uint chained_irq;
  41. /* egpio info */
  42. struct egpio_chip *chip;
  43. int nchips;
  44. };
  45. static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
  46. {
  47. writew(value, ei->base_addr + (reg << ei->bus_shift));
  48. }
  49. static inline u16 egpio_readw(struct egpio_info *ei, int reg)
  50. {
  51. return readw(ei->base_addr + (reg << ei->bus_shift));
  52. }
  53. /*
  54. * IRQs
  55. */
  56. static inline void ack_irqs(struct egpio_info *ei)
  57. {
  58. egpio_writew(ei->ack_write, ei, ei->ack_register);
  59. pr_debug("EGPIO ack - write %x to base+%x\n",
  60. ei->ack_write, ei->ack_register << ei->bus_shift);
  61. }
  62. static void egpio_ack(struct irq_data *data)
  63. {
  64. }
  65. /* There does not appear to be a way to proactively mask interrupts
  66. * on the egpio chip itself. So, we simply ignore interrupts that
  67. * aren't desired. */
  68. static void egpio_mask(struct irq_data *data)
  69. {
  70. struct egpio_info *ei = irq_data_get_irq_chip_data(data);
  71. ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
  72. pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
  73. }
  74. static void egpio_unmask(struct irq_data *data)
  75. {
  76. struct egpio_info *ei = irq_data_get_irq_chip_data(data);
  77. ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
  78. pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
  79. }
  80. static struct irq_chip egpio_muxed_chip = {
  81. .name = "htc-egpio",
  82. .irq_ack = egpio_ack,
  83. .irq_mask = egpio_mask,
  84. .irq_unmask = egpio_unmask,
  85. };
  86. static void egpio_handler(struct irq_desc *desc)
  87. {
  88. struct egpio_info *ei = irq_desc_get_handler_data(desc);
  89. int irqpin;
  90. /* Read current pins. */
  91. unsigned long readval = egpio_readw(ei, ei->ack_register);
  92. pr_debug("IRQ reg: %x\n", (unsigned int)readval);
  93. /* Ack/unmask interrupts. */
  94. ack_irqs(ei);
  95. /* Process all set pins. */
  96. readval &= ei->irqs_enabled;
  97. for_each_set_bit(irqpin, &readval, ei->nirqs) {
  98. /* Run irq handler */
  99. pr_debug("got IRQ %d\n", irqpin);
  100. generic_handle_irq(ei->irq_start + irqpin);
  101. }
  102. }
  103. int htc_egpio_get_wakeup_irq(struct device *dev)
  104. {
  105. struct egpio_info *ei = dev_get_drvdata(dev);
  106. /* Read current pins. */
  107. u16 readval = egpio_readw(ei, ei->ack_register);
  108. /* Ack/unmask interrupts. */
  109. ack_irqs(ei);
  110. /* Return first set pin. */
  111. readval &= ei->irqs_enabled;
  112. return ei->irq_start + ffs(readval) - 1;
  113. }
  114. EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
  115. static inline int egpio_pos(struct egpio_info *ei, int bit)
  116. {
  117. return bit >> ei->reg_shift;
  118. }
  119. static inline int egpio_bit(struct egpio_info *ei, int bit)
  120. {
  121. return 1 << (bit & ((1 << ei->reg_shift)-1));
  122. }
  123. /*
  124. * Input pins
  125. */
  126. static int egpio_get(struct gpio_chip *chip, unsigned offset)
  127. {
  128. struct egpio_chip *egpio;
  129. struct egpio_info *ei;
  130. unsigned bit;
  131. int reg;
  132. int value;
  133. pr_debug("egpio_get_value(%d)\n", chip->base + offset);
  134. egpio = gpiochip_get_data(chip);
  135. ei = dev_get_drvdata(egpio->dev);
  136. bit = egpio_bit(ei, offset);
  137. reg = egpio->reg_start + egpio_pos(ei, offset);
  138. value = egpio_readw(ei, reg);
  139. pr_debug("readw(%p + %x) = %x\n",
  140. ei->base_addr, reg << ei->bus_shift, value);
  141. return !!(value & bit);
  142. }
  143. static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
  144. {
  145. struct egpio_chip *egpio;
  146. egpio = gpiochip_get_data(chip);
  147. return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
  148. }
  149. /*
  150. * Output pins
  151. */
  152. static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
  153. {
  154. unsigned long flag;
  155. struct egpio_chip *egpio;
  156. struct egpio_info *ei;
  157. unsigned bit;
  158. int pos;
  159. int reg;
  160. int shift;
  161. pr_debug("egpio_set(%s, %d(%d), %d)\n",
  162. chip->label, offset, offset+chip->base, value);
  163. egpio = gpiochip_get_data(chip);
  164. ei = dev_get_drvdata(egpio->dev);
  165. bit = egpio_bit(ei, offset);
  166. pos = egpio_pos(ei, offset);
  167. reg = egpio->reg_start + pos;
  168. shift = pos << ei->reg_shift;
  169. pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
  170. reg, (egpio->cached_values >> shift) & ei->reg_mask);
  171. spin_lock_irqsave(&ei->lock, flag);
  172. if (value)
  173. egpio->cached_values |= (1 << offset);
  174. else
  175. egpio->cached_values &= ~(1 << offset);
  176. egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
  177. spin_unlock_irqrestore(&ei->lock, flag);
  178. }
  179. static int egpio_direction_output(struct gpio_chip *chip,
  180. unsigned offset, int value)
  181. {
  182. struct egpio_chip *egpio;
  183. egpio = gpiochip_get_data(chip);
  184. if (test_bit(offset, &egpio->is_out)) {
  185. egpio_set(chip, offset, value);
  186. return 0;
  187. } else {
  188. return -EINVAL;
  189. }
  190. }
  191. static void egpio_write_cache(struct egpio_info *ei)
  192. {
  193. int i;
  194. struct egpio_chip *egpio;
  195. int shift;
  196. for (i = 0; i < ei->nchips; i++) {
  197. egpio = &(ei->chip[i]);
  198. if (!egpio->is_out)
  199. continue;
  200. for (shift = 0; shift < egpio->chip.ngpio;
  201. shift += (1<<ei->reg_shift)) {
  202. int reg = egpio->reg_start + egpio_pos(ei, shift);
  203. if (!((egpio->is_out >> shift) & ei->reg_mask))
  204. continue;
  205. pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
  206. (egpio->cached_values >> shift) & ei->reg_mask,
  207. egpio_readw(ei, reg));
  208. egpio_writew((egpio->cached_values >> shift)
  209. & ei->reg_mask, ei, reg);
  210. }
  211. }
  212. }
  213. /*
  214. * Setup
  215. */
  216. static int __init egpio_probe(struct platform_device *pdev)
  217. {
  218. struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
  219. struct resource *res;
  220. struct egpio_info *ei;
  221. struct gpio_chip *chip;
  222. unsigned int irq, irq_end;
  223. int i;
  224. int ret;
  225. /* Initialize ei data structure. */
  226. ei = devm_kzalloc(&pdev->dev, sizeof(*ei), GFP_KERNEL);
  227. if (!ei)
  228. return -ENOMEM;
  229. spin_lock_init(&ei->lock);
  230. /* Find chained irq */
  231. ret = -EINVAL;
  232. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  233. if (res)
  234. ei->chained_irq = res->start;
  235. /* Map egpio chip into virtual address space. */
  236. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  237. if (!res)
  238. goto fail;
  239. ei->base_addr = devm_ioremap_nocache(&pdev->dev, res->start,
  240. resource_size(res));
  241. if (!ei->base_addr)
  242. goto fail;
  243. pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
  244. if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
  245. goto fail;
  246. ei->bus_shift = fls(pdata->bus_width - 1) - 3;
  247. pr_debug("bus_shift = %d\n", ei->bus_shift);
  248. if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
  249. goto fail;
  250. ei->reg_shift = fls(pdata->reg_width - 1);
  251. pr_debug("reg_shift = %d\n", ei->reg_shift);
  252. ei->reg_mask = (1 << pdata->reg_width) - 1;
  253. platform_set_drvdata(pdev, ei);
  254. ei->nchips = pdata->num_chips;
  255. ei->chip = devm_kzalloc(&pdev->dev,
  256. sizeof(struct egpio_chip) * ei->nchips,
  257. GFP_KERNEL);
  258. if (!ei->chip) {
  259. ret = -ENOMEM;
  260. goto fail;
  261. }
  262. for (i = 0; i < ei->nchips; i++) {
  263. ei->chip[i].reg_start = pdata->chip[i].reg_start;
  264. ei->chip[i].cached_values = pdata->chip[i].initial_values;
  265. ei->chip[i].is_out = pdata->chip[i].direction;
  266. ei->chip[i].dev = &(pdev->dev);
  267. chip = &(ei->chip[i].chip);
  268. chip->label = "htc-egpio";
  269. chip->parent = &pdev->dev;
  270. chip->owner = THIS_MODULE;
  271. chip->get = egpio_get;
  272. chip->set = egpio_set;
  273. chip->direction_input = egpio_direction_input;
  274. chip->direction_output = egpio_direction_output;
  275. chip->base = pdata->chip[i].gpio_base;
  276. chip->ngpio = pdata->chip[i].num_gpios;
  277. gpiochip_add_data(chip, &ei->chip[i]);
  278. }
  279. /* Set initial pin values */
  280. egpio_write_cache(ei);
  281. ei->irq_start = pdata->irq_base;
  282. ei->nirqs = pdata->num_irqs;
  283. ei->ack_register = pdata->ack_register;
  284. if (ei->chained_irq) {
  285. /* Setup irq handlers */
  286. ei->ack_write = 0xFFFF;
  287. if (pdata->invert_acks)
  288. ei->ack_write = 0;
  289. irq_end = ei->irq_start + ei->nirqs;
  290. for (irq = ei->irq_start; irq < irq_end; irq++) {
  291. irq_set_chip_and_handler(irq, &egpio_muxed_chip,
  292. handle_simple_irq);
  293. irq_set_chip_data(irq, ei);
  294. irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
  295. }
  296. irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
  297. irq_set_chained_handler_and_data(ei->chained_irq,
  298. egpio_handler, ei);
  299. ack_irqs(ei);
  300. device_init_wakeup(&pdev->dev, 1);
  301. }
  302. return 0;
  303. fail:
  304. printk(KERN_ERR "EGPIO failed to setup\n");
  305. return ret;
  306. }
  307. static int __exit egpio_remove(struct platform_device *pdev)
  308. {
  309. struct egpio_info *ei = platform_get_drvdata(pdev);
  310. unsigned int irq, irq_end;
  311. if (ei->chained_irq) {
  312. irq_end = ei->irq_start + ei->nirqs;
  313. for (irq = ei->irq_start; irq < irq_end; irq++) {
  314. irq_set_chip_and_handler(irq, NULL, NULL);
  315. irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
  316. }
  317. irq_set_chained_handler(ei->chained_irq, NULL);
  318. device_init_wakeup(&pdev->dev, 0);
  319. }
  320. return 0;
  321. }
  322. #ifdef CONFIG_PM
  323. static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
  324. {
  325. struct egpio_info *ei = platform_get_drvdata(pdev);
  326. if (ei->chained_irq && device_may_wakeup(&pdev->dev))
  327. enable_irq_wake(ei->chained_irq);
  328. return 0;
  329. }
  330. static int egpio_resume(struct platform_device *pdev)
  331. {
  332. struct egpio_info *ei = platform_get_drvdata(pdev);
  333. if (ei->chained_irq && device_may_wakeup(&pdev->dev))
  334. disable_irq_wake(ei->chained_irq);
  335. /* Update registers from the cache, in case
  336. the CPLD was powered off during suspend */
  337. egpio_write_cache(ei);
  338. return 0;
  339. }
  340. #else
  341. #define egpio_suspend NULL
  342. #define egpio_resume NULL
  343. #endif
  344. static struct platform_driver egpio_driver = {
  345. .driver = {
  346. .name = "htc-egpio",
  347. },
  348. .remove = __exit_p(egpio_remove),
  349. .suspend = egpio_suspend,
  350. .resume = egpio_resume,
  351. };
  352. static int __init egpio_init(void)
  353. {
  354. return platform_driver_probe(&egpio_driver, egpio_probe);
  355. }
  356. static void __exit egpio_exit(void)
  357. {
  358. platform_driver_unregister(&egpio_driver);
  359. }
  360. /* start early for dependencies */
  361. subsys_initcall(egpio_init);
  362. module_exit(egpio_exit)
  363. MODULE_LICENSE("GPL");
  364. MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");