gpio-f7188x.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545
  1. /*
  2. * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
  3. *
  4. * Copyright (C) 2010-2013 LaCie
  5. *
  6. * Author: Simon Guinot <simon.guinot@sequanux.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/io.h>
  17. #include <linux/gpio/driver.h>
  18. #include <linux/bitops.h>
  19. #define DRVNAME "gpio-f7188x"
  20. /*
  21. * Super-I/O registers
  22. */
  23. #define SIO_LDSEL 0x07 /* Logical device select */
  24. #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
  25. #define SIO_DEVREV 0x22 /* Device revision */
  26. #define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
  27. #define SIO_LD_GPIO 0x06 /* GPIO logical device */
  28. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  29. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  30. #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
  31. #define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
  32. #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
  33. #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
  34. #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
  35. #define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
  36. enum chips { f71869, f71869a, f71882fg, f71889f, f81866 };
  37. static const char * const f7188x_names[] = {
  38. "f71869",
  39. "f71869a",
  40. "f71882fg",
  41. "f71889f",
  42. "f81866",
  43. };
  44. struct f7188x_sio {
  45. int addr;
  46. enum chips type;
  47. };
  48. struct f7188x_gpio_bank {
  49. struct gpio_chip chip;
  50. unsigned int regbase;
  51. struct f7188x_gpio_data *data;
  52. };
  53. struct f7188x_gpio_data {
  54. struct f7188x_sio *sio;
  55. int nr_bank;
  56. struct f7188x_gpio_bank *bank;
  57. };
  58. /*
  59. * Super-I/O functions.
  60. */
  61. static inline int superio_inb(int base, int reg)
  62. {
  63. outb(reg, base);
  64. return inb(base + 1);
  65. }
  66. static int superio_inw(int base, int reg)
  67. {
  68. int val;
  69. outb(reg++, base);
  70. val = inb(base + 1) << 8;
  71. outb(reg, base);
  72. val |= inb(base + 1);
  73. return val;
  74. }
  75. static inline void superio_outb(int base, int reg, int val)
  76. {
  77. outb(reg, base);
  78. outb(val, base + 1);
  79. }
  80. static inline int superio_enter(int base)
  81. {
  82. /* Don't step on other drivers' I/O space by accident. */
  83. if (!request_muxed_region(base, 2, DRVNAME)) {
  84. pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
  85. return -EBUSY;
  86. }
  87. /* According to the datasheet the key must be send twice. */
  88. outb(SIO_UNLOCK_KEY, base);
  89. outb(SIO_UNLOCK_KEY, base);
  90. return 0;
  91. }
  92. static inline void superio_select(int base, int ld)
  93. {
  94. outb(SIO_LDSEL, base);
  95. outb(ld, base + 1);
  96. }
  97. static inline void superio_exit(int base)
  98. {
  99. outb(SIO_LOCK_KEY, base);
  100. release_region(base, 2);
  101. }
  102. /*
  103. * GPIO chip.
  104. */
  105. static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset);
  106. static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
  107. static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
  108. static int f7188x_gpio_direction_out(struct gpio_chip *chip,
  109. unsigned offset, int value);
  110. static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
  111. static int f7188x_gpio_set_single_ended(struct gpio_chip *gc,
  112. unsigned offset,
  113. enum single_ended_mode mode);
  114. #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
  115. { \
  116. .chip = { \
  117. .label = DRVNAME, \
  118. .owner = THIS_MODULE, \
  119. .get_direction = f7188x_gpio_get_direction, \
  120. .direction_input = f7188x_gpio_direction_in, \
  121. .get = f7188x_gpio_get, \
  122. .direction_output = f7188x_gpio_direction_out, \
  123. .set = f7188x_gpio_set, \
  124. .set_single_ended = f7188x_gpio_set_single_ended, \
  125. .base = _base, \
  126. .ngpio = _ngpio, \
  127. .can_sleep = true, \
  128. }, \
  129. .regbase = _regbase, \
  130. }
  131. #define gpio_dir(base) (base + 0)
  132. #define gpio_data_out(base) (base + 1)
  133. #define gpio_data_in(base) (base + 2)
  134. /* Output mode register (0:open drain 1:push-pull). */
  135. #define gpio_out_mode(base) (base + 3)
  136. static struct f7188x_gpio_bank f71869_gpio_bank[] = {
  137. F7188X_GPIO_BANK(0, 6, 0xF0),
  138. F7188X_GPIO_BANK(10, 8, 0xE0),
  139. F7188X_GPIO_BANK(20, 8, 0xD0),
  140. F7188X_GPIO_BANK(30, 8, 0xC0),
  141. F7188X_GPIO_BANK(40, 8, 0xB0),
  142. F7188X_GPIO_BANK(50, 5, 0xA0),
  143. F7188X_GPIO_BANK(60, 6, 0x90),
  144. };
  145. static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
  146. F7188X_GPIO_BANK(0, 6, 0xF0),
  147. F7188X_GPIO_BANK(10, 8, 0xE0),
  148. F7188X_GPIO_BANK(20, 8, 0xD0),
  149. F7188X_GPIO_BANK(30, 8, 0xC0),
  150. F7188X_GPIO_BANK(40, 8, 0xB0),
  151. F7188X_GPIO_BANK(50, 5, 0xA0),
  152. F7188X_GPIO_BANK(60, 8, 0x90),
  153. F7188X_GPIO_BANK(70, 8, 0x80),
  154. };
  155. static struct f7188x_gpio_bank f71882_gpio_bank[] = {
  156. F7188X_GPIO_BANK(0, 8, 0xF0),
  157. F7188X_GPIO_BANK(10, 8, 0xE0),
  158. F7188X_GPIO_BANK(20, 8, 0xD0),
  159. F7188X_GPIO_BANK(30, 4, 0xC0),
  160. F7188X_GPIO_BANK(40, 4, 0xB0),
  161. };
  162. static struct f7188x_gpio_bank f71889_gpio_bank[] = {
  163. F7188X_GPIO_BANK(0, 7, 0xF0),
  164. F7188X_GPIO_BANK(10, 7, 0xE0),
  165. F7188X_GPIO_BANK(20, 8, 0xD0),
  166. F7188X_GPIO_BANK(30, 8, 0xC0),
  167. F7188X_GPIO_BANK(40, 8, 0xB0),
  168. F7188X_GPIO_BANK(50, 5, 0xA0),
  169. F7188X_GPIO_BANK(60, 8, 0x90),
  170. F7188X_GPIO_BANK(70, 8, 0x80),
  171. };
  172. static struct f7188x_gpio_bank f81866_gpio_bank[] = {
  173. F7188X_GPIO_BANK(0, 8, 0xF0),
  174. F7188X_GPIO_BANK(10, 8, 0xE0),
  175. F7188X_GPIO_BANK(20, 8, 0xD0),
  176. F7188X_GPIO_BANK(30, 8, 0xC0),
  177. F7188X_GPIO_BANK(40, 8, 0xB0),
  178. F7188X_GPIO_BANK(50, 8, 0xA0),
  179. F7188X_GPIO_BANK(60, 8, 0x90),
  180. F7188X_GPIO_BANK(70, 8, 0x80),
  181. F7188X_GPIO_BANK(80, 8, 0x88),
  182. };
  183. static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
  184. {
  185. int err;
  186. struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
  187. struct f7188x_sio *sio = bank->data->sio;
  188. u8 dir;
  189. err = superio_enter(sio->addr);
  190. if (err)
  191. return err;
  192. superio_select(sio->addr, SIO_LD_GPIO);
  193. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  194. superio_exit(sio->addr);
  195. return !(dir & 1 << offset);
  196. }
  197. static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
  198. {
  199. int err;
  200. struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
  201. struct f7188x_sio *sio = bank->data->sio;
  202. u8 dir;
  203. err = superio_enter(sio->addr);
  204. if (err)
  205. return err;
  206. superio_select(sio->addr, SIO_LD_GPIO);
  207. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  208. dir &= ~BIT(offset);
  209. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  210. superio_exit(sio->addr);
  211. return 0;
  212. }
  213. static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
  214. {
  215. int err;
  216. struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
  217. struct f7188x_sio *sio = bank->data->sio;
  218. u8 dir, data;
  219. err = superio_enter(sio->addr);
  220. if (err)
  221. return err;
  222. superio_select(sio->addr, SIO_LD_GPIO);
  223. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  224. dir = !!(dir & BIT(offset));
  225. if (dir)
  226. data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  227. else
  228. data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
  229. superio_exit(sio->addr);
  230. return !!(data & BIT(offset));
  231. }
  232. static int f7188x_gpio_direction_out(struct gpio_chip *chip,
  233. unsigned offset, int value)
  234. {
  235. int err;
  236. struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
  237. struct f7188x_sio *sio = bank->data->sio;
  238. u8 dir, data_out;
  239. err = superio_enter(sio->addr);
  240. if (err)
  241. return err;
  242. superio_select(sio->addr, SIO_LD_GPIO);
  243. data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  244. if (value)
  245. data_out |= BIT(offset);
  246. else
  247. data_out &= ~BIT(offset);
  248. superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
  249. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  250. dir |= BIT(offset);
  251. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  252. superio_exit(sio->addr);
  253. return 0;
  254. }
  255. static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  256. {
  257. int err;
  258. struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
  259. struct f7188x_sio *sio = bank->data->sio;
  260. u8 data_out;
  261. err = superio_enter(sio->addr);
  262. if (err)
  263. return;
  264. superio_select(sio->addr, SIO_LD_GPIO);
  265. data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  266. if (value)
  267. data_out |= BIT(offset);
  268. else
  269. data_out &= ~BIT(offset);
  270. superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
  271. superio_exit(sio->addr);
  272. }
  273. static int f7188x_gpio_set_single_ended(struct gpio_chip *chip,
  274. unsigned offset,
  275. enum single_ended_mode mode)
  276. {
  277. int err;
  278. struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
  279. struct f7188x_sio *sio = bank->data->sio;
  280. u8 data;
  281. if (mode != LINE_MODE_OPEN_DRAIN &&
  282. mode != LINE_MODE_PUSH_PULL)
  283. return -ENOTSUPP;
  284. err = superio_enter(sio->addr);
  285. if (err)
  286. return err;
  287. superio_select(sio->addr, SIO_LD_GPIO);
  288. data = superio_inb(sio->addr, gpio_out_mode(bank->regbase));
  289. if (mode == LINE_MODE_OPEN_DRAIN)
  290. data &= ~BIT(offset);
  291. else
  292. data |= BIT(offset);
  293. superio_outb(sio->addr, gpio_out_mode(bank->regbase), data);
  294. superio_exit(sio->addr);
  295. return 0;
  296. }
  297. /*
  298. * Platform device and driver.
  299. */
  300. static int f7188x_gpio_probe(struct platform_device *pdev)
  301. {
  302. int err;
  303. int i;
  304. struct f7188x_sio *sio = dev_get_platdata(&pdev->dev);
  305. struct f7188x_gpio_data *data;
  306. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  307. if (!data)
  308. return -ENOMEM;
  309. switch (sio->type) {
  310. case f71869:
  311. data->nr_bank = ARRAY_SIZE(f71869_gpio_bank);
  312. data->bank = f71869_gpio_bank;
  313. break;
  314. case f71869a:
  315. data->nr_bank = ARRAY_SIZE(f71869a_gpio_bank);
  316. data->bank = f71869a_gpio_bank;
  317. break;
  318. case f71882fg:
  319. data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
  320. data->bank = f71882_gpio_bank;
  321. break;
  322. case f71889f:
  323. data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
  324. data->bank = f71889_gpio_bank;
  325. break;
  326. case f81866:
  327. data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
  328. data->bank = f81866_gpio_bank;
  329. break;
  330. default:
  331. return -ENODEV;
  332. }
  333. data->sio = sio;
  334. platform_set_drvdata(pdev, data);
  335. /* For each GPIO bank, register a GPIO chip. */
  336. for (i = 0; i < data->nr_bank; i++) {
  337. struct f7188x_gpio_bank *bank = &data->bank[i];
  338. bank->chip.parent = &pdev->dev;
  339. bank->data = data;
  340. err = devm_gpiochip_add_data(&pdev->dev, &bank->chip, bank);
  341. if (err) {
  342. dev_err(&pdev->dev,
  343. "Failed to register gpiochip %d: %d\n",
  344. i, err);
  345. return err;
  346. }
  347. }
  348. return 0;
  349. }
  350. static int __init f7188x_find(int addr, struct f7188x_sio *sio)
  351. {
  352. int err;
  353. u16 devid;
  354. err = superio_enter(addr);
  355. if (err)
  356. return err;
  357. err = -ENODEV;
  358. devid = superio_inw(addr, SIO_MANID);
  359. if (devid != SIO_FINTEK_ID) {
  360. pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
  361. goto err;
  362. }
  363. devid = superio_inw(addr, SIO_DEVID);
  364. switch (devid) {
  365. case SIO_F71869_ID:
  366. sio->type = f71869;
  367. break;
  368. case SIO_F71869A_ID:
  369. sio->type = f71869a;
  370. break;
  371. case SIO_F71882_ID:
  372. sio->type = f71882fg;
  373. break;
  374. case SIO_F71889_ID:
  375. sio->type = f71889f;
  376. break;
  377. case SIO_F81866_ID:
  378. sio->type = f81866;
  379. break;
  380. default:
  381. pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
  382. goto err;
  383. }
  384. sio->addr = addr;
  385. err = 0;
  386. pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
  387. f7188x_names[sio->type],
  388. (unsigned int) addr,
  389. (int) superio_inb(addr, SIO_DEVREV));
  390. err:
  391. superio_exit(addr);
  392. return err;
  393. }
  394. static struct platform_device *f7188x_gpio_pdev;
  395. static int __init
  396. f7188x_gpio_device_add(const struct f7188x_sio *sio)
  397. {
  398. int err;
  399. f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
  400. if (!f7188x_gpio_pdev)
  401. return -ENOMEM;
  402. err = platform_device_add_data(f7188x_gpio_pdev,
  403. sio, sizeof(*sio));
  404. if (err) {
  405. pr_err(DRVNAME "Platform data allocation failed\n");
  406. goto err;
  407. }
  408. err = platform_device_add(f7188x_gpio_pdev);
  409. if (err) {
  410. pr_err(DRVNAME "Device addition failed\n");
  411. goto err;
  412. }
  413. return 0;
  414. err:
  415. platform_device_put(f7188x_gpio_pdev);
  416. return err;
  417. }
  418. /*
  419. * Try to match a supported Fintek device by reading the (hard-wired)
  420. * configuration I/O ports. If available, then register both the platform
  421. * device and driver to support the GPIOs.
  422. */
  423. static struct platform_driver f7188x_gpio_driver = {
  424. .driver = {
  425. .name = DRVNAME,
  426. },
  427. .probe = f7188x_gpio_probe,
  428. };
  429. static int __init f7188x_gpio_init(void)
  430. {
  431. int err;
  432. struct f7188x_sio sio;
  433. if (f7188x_find(0x2e, &sio) &&
  434. f7188x_find(0x4e, &sio))
  435. return -ENODEV;
  436. err = platform_driver_register(&f7188x_gpio_driver);
  437. if (!err) {
  438. err = f7188x_gpio_device_add(&sio);
  439. if (err)
  440. platform_driver_unregister(&f7188x_gpio_driver);
  441. }
  442. return err;
  443. }
  444. subsys_initcall(f7188x_gpio_init);
  445. static void __exit f7188x_gpio_exit(void)
  446. {
  447. platform_device_unregister(f7188x_gpio_pdev);
  448. platform_driver_unregister(&f7188x_gpio_driver);
  449. }
  450. module_exit(f7188x_gpio_exit);
  451. MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866");
  452. MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
  453. MODULE_LICENSE("GPL");