Kconfig 17 KB

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  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. #core
  30. config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  31. bool
  32. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  33. bool
  34. config DMA_ENGINE
  35. bool
  36. config DMA_VIRTUAL_CHANNELS
  37. tristate
  38. config DMA_ACPI
  39. def_bool y
  40. depends on ACPI
  41. config DMA_OF
  42. def_bool y
  43. depends on OF
  44. select DMA_ENGINE
  45. #devices
  46. config AMBA_PL08X
  47. bool "ARM PrimeCell PL080 or PL081 support"
  48. depends on ARM_AMBA
  49. select DMA_ENGINE
  50. select DMA_VIRTUAL_CHANNELS
  51. help
  52. Platform has a PL08x DMAC device
  53. which can provide DMA engine support
  54. config AMCC_PPC440SPE_ADMA
  55. tristate "AMCC PPC440SPe ADMA support"
  56. depends on 440SPe || 440SP
  57. select DMA_ENGINE
  58. select DMA_ENGINE_RAID
  59. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  60. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  61. help
  62. Enable support for the AMCC PPC440SPe RAID engines.
  63. config AT_HDMAC
  64. tristate "Atmel AHB DMA support"
  65. depends on ARCH_AT91
  66. select DMA_ENGINE
  67. help
  68. Support the Atmel AHB DMA controller.
  69. config AT_XDMAC
  70. tristate "Atmel XDMA support"
  71. depends on ARCH_AT91
  72. select DMA_ENGINE
  73. help
  74. Support the Atmel XDMA controller.
  75. config AXI_DMAC
  76. tristate "Analog Devices AXI-DMAC DMA support"
  77. depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST
  78. select DMA_ENGINE
  79. select DMA_VIRTUAL_CHANNELS
  80. help
  81. Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
  82. controller is often used in Analog Device's reference designs for FPGA
  83. platforms.
  84. config COH901318
  85. bool "ST-Ericsson COH901318 DMA support"
  86. select DMA_ENGINE
  87. depends on ARCH_U300 || COMPILE_TEST
  88. help
  89. Enable support for ST-Ericsson COH 901 318 DMA.
  90. config DMA_BCM2835
  91. tristate "BCM2835 DMA engine support"
  92. depends on ARCH_BCM2835
  93. select DMA_ENGINE
  94. select DMA_VIRTUAL_CHANNELS
  95. config DMA_JZ4740
  96. tristate "JZ4740 DMA support"
  97. depends on MACH_JZ4740 || COMPILE_TEST
  98. select DMA_ENGINE
  99. select DMA_VIRTUAL_CHANNELS
  100. config DMA_JZ4780
  101. tristate "JZ4780 DMA support"
  102. depends on MACH_JZ4780 || COMPILE_TEST
  103. select DMA_ENGINE
  104. select DMA_VIRTUAL_CHANNELS
  105. help
  106. This selects support for the DMA controller in Ingenic JZ4780 SoCs.
  107. If you have a board based on such a SoC and wish to use DMA for
  108. devices which can use the DMA controller, say Y or M here.
  109. config DMA_OMAP
  110. tristate "OMAP DMA support"
  111. depends on ARCH_OMAP || COMPILE_TEST
  112. select DMA_ENGINE
  113. select DMA_VIRTUAL_CHANNELS
  114. select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST)
  115. config DMA_SA11X0
  116. tristate "SA-11x0 DMA support"
  117. depends on ARCH_SA1100 || COMPILE_TEST
  118. select DMA_ENGINE
  119. select DMA_VIRTUAL_CHANNELS
  120. help
  121. Support the DMA engine found on Intel StrongARM SA-1100 and
  122. SA-1110 SoCs. This DMA engine can only be used with on-chip
  123. devices.
  124. config DMA_SUN4I
  125. tristate "Allwinner A10 DMA SoCs support"
  126. depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
  127. default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
  128. select DMA_ENGINE
  129. select DMA_VIRTUAL_CHANNELS
  130. help
  131. Enable support for the DMA controller present in the sun4i,
  132. sun5i and sun7i Allwinner ARM SoCs.
  133. config DMA_SUN6I
  134. tristate "Allwinner A31 SoCs DMA support"
  135. depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
  136. depends on RESET_CONTROLLER
  137. select DMA_ENGINE
  138. select DMA_VIRTUAL_CHANNELS
  139. help
  140. Support for the DMA engine first found in Allwinner A31 SoCs.
  141. config EP93XX_DMA
  142. bool "Cirrus Logic EP93xx DMA support"
  143. depends on ARCH_EP93XX || COMPILE_TEST
  144. select DMA_ENGINE
  145. help
  146. Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
  147. config FSL_DMA
  148. tristate "Freescale Elo series DMA support"
  149. depends on FSL_SOC
  150. select DMA_ENGINE
  151. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  152. ---help---
  153. Enable support for the Freescale Elo series DMA controllers.
  154. The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
  155. EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
  156. some Txxx and Bxxx parts.
  157. config FSL_EDMA
  158. tristate "Freescale eDMA engine support"
  159. depends on OF
  160. select DMA_ENGINE
  161. select DMA_VIRTUAL_CHANNELS
  162. help
  163. Support the Freescale eDMA engine with programmable channel
  164. multiplexing capability for DMA request sources(slot).
  165. This module can be found on Freescale Vybrid and LS-1 SoCs.
  166. config FSL_RAID
  167. tristate "Freescale RAID engine Support"
  168. depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
  169. select DMA_ENGINE
  170. select DMA_ENGINE_RAID
  171. ---help---
  172. Enable support for Freescale RAID Engine. RAID Engine is
  173. available on some QorIQ SoCs (like P5020/P5040). It has
  174. the capability to offload memcpy, xor and pq computation
  175. for raid5/6.
  176. config IMG_MDC_DMA
  177. tristate "IMG MDC support"
  178. depends on MIPS || COMPILE_TEST
  179. depends on MFD_SYSCON
  180. select DMA_ENGINE
  181. select DMA_VIRTUAL_CHANNELS
  182. help
  183. Enable support for the IMG multi-threaded DMA controller (MDC).
  184. config IMX_DMA
  185. tristate "i.MX DMA support"
  186. depends on ARCH_MXC
  187. select DMA_ENGINE
  188. help
  189. Support the i.MX DMA engine. This engine is integrated into
  190. Freescale i.MX1/21/27 chips.
  191. config IMX_SDMA
  192. tristate "i.MX SDMA support"
  193. depends on ARCH_MXC
  194. select DMA_ENGINE
  195. help
  196. Support the i.MX SDMA engine. This engine is integrated into
  197. Freescale i.MX25/31/35/51/53/6 chips.
  198. config INTEL_IDMA64
  199. tristate "Intel integrated DMA 64-bit support"
  200. select DMA_ENGINE
  201. select DMA_VIRTUAL_CHANNELS
  202. help
  203. Enable DMA support for Intel Low Power Subsystem such as found on
  204. Intel Skylake PCH.
  205. config INTEL_IOATDMA
  206. tristate "Intel I/OAT DMA support"
  207. depends on PCI && X86_64
  208. select DMA_ENGINE
  209. select DMA_ENGINE_RAID
  210. select DCA
  211. help
  212. Enable support for the Intel(R) I/OAT DMA engine present
  213. in recent Intel Xeon chipsets.
  214. Say Y here if you have such a chipset.
  215. If unsure, say N.
  216. config INTEL_IOP_ADMA
  217. tristate "Intel IOP ADMA support"
  218. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  219. select DMA_ENGINE
  220. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  221. help
  222. Enable support for the Intel(R) IOP Series RAID engines.
  223. config INTEL_MIC_X100_DMA
  224. tristate "Intel MIC X100 DMA Driver"
  225. depends on 64BIT && X86 && INTEL_MIC_BUS
  226. select DMA_ENGINE
  227. help
  228. This enables DMA support for the Intel Many Integrated Core
  229. (MIC) family of PCIe form factor coprocessor X100 devices that
  230. run a 64 bit Linux OS. This driver will be used by both MIC
  231. host and card drivers.
  232. If you are building host kernel with a MIC device or a card
  233. kernel for a MIC device, then say M (recommended) or Y, else
  234. say N. If unsure say N.
  235. More information about the Intel MIC family as well as the Linux
  236. OS and tools for MIC to use with this driver are available from
  237. <http://software.intel.com/en-us/mic-developer>.
  238. config K3_DMA
  239. tristate "Hisilicon K3 DMA support"
  240. depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
  241. select DMA_ENGINE
  242. select DMA_VIRTUAL_CHANNELS
  243. help
  244. Support the DMA engine for Hisilicon K3 platform
  245. devices.
  246. config LPC18XX_DMAMUX
  247. bool "NXP LPC18xx/43xx DMA MUX for PL080"
  248. depends on ARCH_LPC18XX || COMPILE_TEST
  249. depends on OF && AMBA_PL08X
  250. select MFD_SYSCON
  251. help
  252. Enable support for DMA on NXP LPC18xx/43xx platforms
  253. with PL080 and multiplexed DMA request lines.
  254. config MMP_PDMA
  255. bool "MMP PDMA support"
  256. depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
  257. select DMA_ENGINE
  258. help
  259. Support the MMP PDMA engine for PXA and MMP platform.
  260. config MMP_TDMA
  261. bool "MMP Two-Channel DMA support"
  262. depends on ARCH_MMP || COMPILE_TEST
  263. select DMA_ENGINE
  264. select MMP_SRAM if ARCH_MMP
  265. select GENERIC_ALLOCATOR
  266. help
  267. Support the MMP Two-Channel DMA engine.
  268. This engine used for MMP Audio DMA and pxa910 SQU.
  269. It needs sram driver under mach-mmp.
  270. config MOXART_DMA
  271. tristate "MOXART DMA support"
  272. depends on ARCH_MOXART
  273. select DMA_ENGINE
  274. select DMA_VIRTUAL_CHANNELS
  275. help
  276. Enable support for the MOXA ART SoC DMA controller.
  277. Say Y here if you enabled MMP ADMA, otherwise say N.
  278. config MPC512X_DMA
  279. tristate "Freescale MPC512x built-in DMA engine support"
  280. depends on PPC_MPC512x || PPC_MPC831x
  281. select DMA_ENGINE
  282. ---help---
  283. Enable support for the Freescale MPC512x built-in DMA engine.
  284. config MV_XOR
  285. bool "Marvell XOR engine support"
  286. depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
  287. select DMA_ENGINE
  288. select DMA_ENGINE_RAID
  289. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  290. ---help---
  291. Enable support for the Marvell XOR engine.
  292. config MV_XOR_V2
  293. bool "Marvell XOR engine version 2 support "
  294. depends on ARM64
  295. select DMA_ENGINE
  296. select DMA_ENGINE_RAID
  297. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  298. select GENERIC_MSI_IRQ_DOMAIN
  299. ---help---
  300. Enable support for the Marvell version 2 XOR engine.
  301. This engine provides acceleration for copy, XOR and RAID6
  302. operations, and is available on Marvell Armada 7K and 8K
  303. platforms.
  304. config MXS_DMA
  305. bool "MXS DMA support"
  306. depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q || SOC_IMX6UL
  307. select STMP_DEVICE
  308. select DMA_ENGINE
  309. help
  310. Support the MXS DMA engine. This engine including APBH-DMA
  311. and APBX-DMA is integrated into Freescale
  312. i.MX23/28/MX6Q/MX6DL/MX6UL chips.
  313. config MX3_IPU
  314. bool "MX3x Image Processing Unit support"
  315. depends on ARCH_MXC
  316. select DMA_ENGINE
  317. default y
  318. help
  319. If you plan to use the Image Processing unit in the i.MX3x, say
  320. Y here. If unsure, select Y.
  321. config MX3_IPU_IRQS
  322. int "Number of dynamically mapped interrupts for IPU"
  323. depends on MX3_IPU
  324. range 2 137
  325. default 4
  326. help
  327. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  328. To avoid bloating the irq_desc[] array we allocate a sufficient
  329. number of IRQ slots and map them dynamically to specific sources.
  330. config NBPFAXI_DMA
  331. tristate "Renesas Type-AXI NBPF DMA support"
  332. select DMA_ENGINE
  333. depends on ARM || COMPILE_TEST
  334. help
  335. Support for "Type-AXI" NBPF DMA IPs from Renesas
  336. config PCH_DMA
  337. tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
  338. depends on PCI && (X86_32 || COMPILE_TEST)
  339. select DMA_ENGINE
  340. help
  341. Enable support for Intel EG20T PCH DMA engine.
  342. This driver also can be used for LAPIS Semiconductor IOH(Input/
  343. Output Hub), ML7213, ML7223 and ML7831.
  344. ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
  345. for MP(Media Phone) use and ML7831 IOH is for general purpose use.
  346. ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
  347. ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
  348. config PL330_DMA
  349. tristate "DMA API Driver for PL330"
  350. select DMA_ENGINE
  351. depends on ARM_AMBA
  352. help
  353. Select if your platform has one or more PL330 DMACs.
  354. You need to provide platform specific settings via
  355. platform_data for a dma-pl330 device.
  356. config PXA_DMA
  357. bool "PXA DMA support"
  358. depends on (ARCH_MMP || ARCH_PXA)
  359. select DMA_ENGINE
  360. select DMA_VIRTUAL_CHANNELS
  361. help
  362. Support the DMA engine for PXA. It is also compatible with MMP PDMA
  363. platform. The internal DMA IP of all PXA variants is supported, with
  364. 16 to 32 channels for peripheral to memory or memory to memory
  365. transfers.
  366. config SIRF_DMA
  367. tristate "CSR SiRFprimaII/SiRFmarco DMA support"
  368. depends on ARCH_SIRF
  369. select DMA_ENGINE
  370. help
  371. Enable support for the CSR SiRFprimaII DMA engine.
  372. config STE_DMA40
  373. bool "ST-Ericsson DMA40 support"
  374. depends on ARCH_U8500
  375. select DMA_ENGINE
  376. help
  377. Support for ST-Ericsson DMA40 controller
  378. config STM32_DMA
  379. bool "STMicroelectronics STM32 DMA support"
  380. depends on ARCH_STM32 || COMPILE_TEST
  381. select DMA_ENGINE
  382. select DMA_VIRTUAL_CHANNELS
  383. help
  384. Enable support for the on-chip DMA controller on STMicroelectronics
  385. STM32 MCUs.
  386. If you have a board based on such a MCU and wish to use DMA say Y or M
  387. here.
  388. config S3C24XX_DMAC
  389. bool "Samsung S3C24XX DMA support"
  390. depends on ARCH_S3C24XX || COMPILE_TEST
  391. select DMA_ENGINE
  392. select DMA_VIRTUAL_CHANNELS
  393. help
  394. Support for the Samsung S3C24XX DMA controller driver. The
  395. DMA controller is having multiple DMA channels which can be
  396. configured for different peripherals like audio, UART, SPI.
  397. The DMA controller can transfer data from memory to peripheral,
  398. periphal to memory, periphal to periphal and memory to memory.
  399. config TXX9_DMAC
  400. tristate "Toshiba TXx9 SoC DMA support"
  401. depends on MACH_TX49XX || MACH_TX39XX
  402. select DMA_ENGINE
  403. help
  404. Support the TXx9 SoC internal DMA controller. This can be
  405. integrated in chips such as the Toshiba TX4927/38/39.
  406. config TEGRA20_APB_DMA
  407. bool "NVIDIA Tegra20 APB DMA support"
  408. depends on ARCH_TEGRA
  409. select DMA_ENGINE
  410. help
  411. Support for the NVIDIA Tegra20 APB DMA controller driver. The
  412. DMA controller is having multiple DMA channel which can be
  413. configured for different peripherals like audio, UART, SPI,
  414. I2C etc which is in APB bus.
  415. This DMA controller transfers data from memory to peripheral fifo
  416. or vice versa. It does not support memory to memory data transfer.
  417. config TEGRA210_ADMA
  418. bool "NVIDIA Tegra210 ADMA support"
  419. depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK
  420. select DMA_ENGINE
  421. select DMA_VIRTUAL_CHANNELS
  422. help
  423. Support for the NVIDIA Tegra210 ADMA controller driver. The
  424. DMA controller has multiple DMA channels and is used to service
  425. various audio clients in the Tegra210 audio processing engine
  426. (APE). This DMA controller transfers data from memory to
  427. peripheral and vice versa. It does not support memory to
  428. memory data transfer.
  429. config TIMB_DMA
  430. tristate "Timberdale FPGA DMA support"
  431. depends on MFD_TIMBERDALE || COMPILE_TEST
  432. select DMA_ENGINE
  433. help
  434. Enable support for the Timberdale FPGA DMA engine.
  435. config TI_CPPI41
  436. tristate "AM33xx CPPI41 DMA support"
  437. depends on ARCH_OMAP
  438. select DMA_ENGINE
  439. help
  440. The Communications Port Programming Interface (CPPI) 4.1 DMA engine
  441. is currently used by the USB driver on AM335x platforms.
  442. config TI_DMA_CROSSBAR
  443. bool
  444. config TI_EDMA
  445. bool "TI EDMA support"
  446. depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST
  447. select DMA_ENGINE
  448. select DMA_VIRTUAL_CHANNELS
  449. select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST)
  450. default n
  451. help
  452. Enable support for the TI EDMA controller. This DMA
  453. engine is found on TI DaVinci and AM33xx parts.
  454. config XGENE_DMA
  455. tristate "APM X-Gene DMA support"
  456. depends on ARCH_XGENE || COMPILE_TEST
  457. select DMA_ENGINE
  458. select DMA_ENGINE_RAID
  459. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  460. help
  461. Enable support for the APM X-Gene SoC DMA engine.
  462. config XILINX_DMA
  463. tristate "Xilinx AXI DMAS Engine"
  464. depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
  465. select DMA_ENGINE
  466. help
  467. Enable support for Xilinx AXI VDMA Soft IP.
  468. AXI VDMA engine provides high-bandwidth direct memory access
  469. between memory and AXI4-Stream video type target
  470. peripherals including peripherals which support AXI4-
  471. Stream Video Protocol. It has two stream interfaces/
  472. channels, Memory Mapped to Stream (MM2S) and Stream to
  473. Memory Mapped (S2MM) for the data transfers.
  474. AXI CDMA engine provides high-bandwidth direct memory access
  475. between a memory-mapped source address and a memory-mapped
  476. destination address.
  477. AXI DMA engine provides high-bandwidth one dimensional direct
  478. memory access between memory and AXI4-Stream target peripherals.
  479. config XILINX_ZYNQMP_DMA
  480. tristate "Xilinx ZynqMP DMA Engine"
  481. depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
  482. select DMA_ENGINE
  483. help
  484. Enable support for Xilinx ZynqMP DMA controller.
  485. config ZX_DMA
  486. tristate "ZTE ZX296702 DMA support"
  487. depends on ARCH_ZX || COMPILE_TEST
  488. select DMA_ENGINE
  489. select DMA_VIRTUAL_CHANNELS
  490. help
  491. Support the DMA engine for ZTE ZX296702 platform devices.
  492. # driver files
  493. source "drivers/dma/bestcomm/Kconfig"
  494. source "drivers/dma/qcom/Kconfig"
  495. source "drivers/dma/dw/Kconfig"
  496. source "drivers/dma/hsu/Kconfig"
  497. source "drivers/dma/sh/Kconfig"
  498. # clients
  499. comment "DMA Clients"
  500. depends on DMA_ENGINE
  501. config ASYNC_TX_DMA
  502. bool "Async_tx: Offload support for the async_tx api"
  503. depends on DMA_ENGINE
  504. help
  505. This allows the async_tx api to take advantage of offload engines for
  506. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  507. a dma engine that can perform raid operations and you have enabled
  508. MD_RAID456 say Y.
  509. If unsure, say N.
  510. config DMATEST
  511. tristate "DMA Test client"
  512. depends on DMA_ENGINE
  513. help
  514. Simple DMA test client. Say N unless you're debugging a
  515. DMA Device driver.
  516. config DMA_ENGINE_RAID
  517. bool
  518. endif