mxhead.S 1.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263
  1. /*
  2. * Xtensa Secondary Processors startup code.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 2001 - 2013 Tensilica Inc.
  9. *
  10. * Joe Taylor <joe@tensilica.com>
  11. * Chris Zankel <chris@zankel.net>
  12. * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
  13. * Pete Delaney <piet@tensilica.com>
  14. */
  15. #include <linux/linkage.h>
  16. #include <asm/cacheasm.h>
  17. #include <asm/initialize_mmu.h>
  18. #include <asm/mxregs.h>
  19. #include <asm/regs.h>
  20. .section .SecondaryResetVector.text, "ax"
  21. ENTRY(_SecondaryResetVector)
  22. _j _SetupOCD
  23. .begin no-absolute-literals
  24. .literal_position
  25. _SetupOCD:
  26. /*
  27. * Initialize WB, WS, and clear PS.EXCM (to allow loop instructions).
  28. * Set Interrupt Level just below XCHAL_DEBUGLEVEL to allow
  29. * xt-gdb to single step via DEBUG exceptions received directly
  30. * by ocd.
  31. */
  32. movi a1, 1
  33. movi a0, 0
  34. wsr a1, windowstart
  35. wsr a0, windowbase
  36. rsync
  37. movi a1, LOCKLEVEL
  38. wsr a1, ps
  39. rsync
  40. _SetupMMU:
  41. #ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  42. initialize_mmu
  43. #endif
  44. /*
  45. * Start Secondary Processors with NULL pointer to boot params.
  46. */
  47. movi a2, 0 # a2 == NULL
  48. movi a3, _startup
  49. jx a3
  50. .end no-absolute-literals