time.c 8.3 KB

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  1. /*
  2. * Copyright (C) 2013-2014 Altera Corporation
  3. * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
  4. * Copyright (C) 2004 Microtronix Datacom Ltd.
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/export.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/clockchips.h>
  13. #include <linux/clocksource.h>
  14. #include <linux/delay.h>
  15. #include <linux/of.h>
  16. #include <linux/of_address.h>
  17. #include <linux/of_irq.h>
  18. #include <linux/io.h>
  19. #include <linux/slab.h>
  20. #define ALTR_TIMER_COMPATIBLE "altr,timer-1.0"
  21. #define ALTERA_TIMER_STATUS_REG 0
  22. #define ALTERA_TIMER_CONTROL_REG 4
  23. #define ALTERA_TIMER_PERIODL_REG 8
  24. #define ALTERA_TIMER_PERIODH_REG 12
  25. #define ALTERA_TIMER_SNAPL_REG 16
  26. #define ALTERA_TIMER_SNAPH_REG 20
  27. #define ALTERA_TIMER_CONTROL_ITO_MSK (0x1)
  28. #define ALTERA_TIMER_CONTROL_CONT_MSK (0x2)
  29. #define ALTERA_TIMER_CONTROL_START_MSK (0x4)
  30. #define ALTERA_TIMER_CONTROL_STOP_MSK (0x8)
  31. struct nios2_timer {
  32. void __iomem *base;
  33. unsigned long freq;
  34. };
  35. struct nios2_clockevent_dev {
  36. struct nios2_timer timer;
  37. struct clock_event_device ced;
  38. };
  39. struct nios2_clocksource {
  40. struct nios2_timer timer;
  41. struct clocksource cs;
  42. };
  43. static inline struct nios2_clockevent_dev *
  44. to_nios2_clkevent(struct clock_event_device *evt)
  45. {
  46. return container_of(evt, struct nios2_clockevent_dev, ced);
  47. }
  48. static inline struct nios2_clocksource *
  49. to_nios2_clksource(struct clocksource *cs)
  50. {
  51. return container_of(cs, struct nios2_clocksource, cs);
  52. }
  53. static u16 timer_readw(struct nios2_timer *timer, u32 offs)
  54. {
  55. return readw(timer->base + offs);
  56. }
  57. static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs)
  58. {
  59. writew(val, timer->base + offs);
  60. }
  61. static inline unsigned long read_timersnapshot(struct nios2_timer *timer)
  62. {
  63. unsigned long count;
  64. timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG);
  65. count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 |
  66. timer_readw(timer, ALTERA_TIMER_SNAPL_REG);
  67. return count;
  68. }
  69. static cycle_t nios2_timer_read(struct clocksource *cs)
  70. {
  71. struct nios2_clocksource *nios2_cs = to_nios2_clksource(cs);
  72. unsigned long flags;
  73. u32 count;
  74. local_irq_save(flags);
  75. count = read_timersnapshot(&nios2_cs->timer);
  76. local_irq_restore(flags);
  77. /* Counter is counting down */
  78. return ~count;
  79. }
  80. static struct nios2_clocksource nios2_cs = {
  81. .cs = {
  82. .name = "nios2-clksrc",
  83. .rating = 250,
  84. .read = nios2_timer_read,
  85. .mask = CLOCKSOURCE_MASK(32),
  86. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  87. },
  88. };
  89. cycles_t get_cycles(void)
  90. {
  91. return nios2_timer_read(&nios2_cs.cs);
  92. }
  93. EXPORT_SYMBOL(get_cycles);
  94. static void nios2_timer_start(struct nios2_timer *timer)
  95. {
  96. u16 ctrl;
  97. ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
  98. ctrl |= ALTERA_TIMER_CONTROL_START_MSK;
  99. timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
  100. }
  101. static void nios2_timer_stop(struct nios2_timer *timer)
  102. {
  103. u16 ctrl;
  104. ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
  105. ctrl |= ALTERA_TIMER_CONTROL_STOP_MSK;
  106. timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
  107. }
  108. static void nios2_timer_config(struct nios2_timer *timer, unsigned long period,
  109. bool periodic)
  110. {
  111. u16 ctrl;
  112. /* The timer's actual period is one cycle greater than the value
  113. * stored in the period register. */
  114. period--;
  115. ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
  116. /* stop counter */
  117. timer_writew(timer, ctrl | ALTERA_TIMER_CONTROL_STOP_MSK,
  118. ALTERA_TIMER_CONTROL_REG);
  119. /* write new count */
  120. timer_writew(timer, period, ALTERA_TIMER_PERIODL_REG);
  121. timer_writew(timer, period >> 16, ALTERA_TIMER_PERIODH_REG);
  122. ctrl |= ALTERA_TIMER_CONTROL_START_MSK | ALTERA_TIMER_CONTROL_ITO_MSK;
  123. if (periodic)
  124. ctrl |= ALTERA_TIMER_CONTROL_CONT_MSK;
  125. else
  126. ctrl &= ~ALTERA_TIMER_CONTROL_CONT_MSK;
  127. timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
  128. }
  129. static int nios2_timer_set_next_event(unsigned long delta,
  130. struct clock_event_device *evt)
  131. {
  132. struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
  133. nios2_timer_config(&nios2_ced->timer, delta, false);
  134. return 0;
  135. }
  136. static int nios2_timer_shutdown(struct clock_event_device *evt)
  137. {
  138. struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
  139. struct nios2_timer *timer = &nios2_ced->timer;
  140. nios2_timer_stop(timer);
  141. return 0;
  142. }
  143. static int nios2_timer_set_periodic(struct clock_event_device *evt)
  144. {
  145. unsigned long period;
  146. struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
  147. struct nios2_timer *timer = &nios2_ced->timer;
  148. period = DIV_ROUND_UP(timer->freq, HZ);
  149. nios2_timer_config(timer, period, true);
  150. return 0;
  151. }
  152. static int nios2_timer_resume(struct clock_event_device *evt)
  153. {
  154. struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
  155. struct nios2_timer *timer = &nios2_ced->timer;
  156. nios2_timer_start(timer);
  157. return 0;
  158. }
  159. irqreturn_t timer_interrupt(int irq, void *dev_id)
  160. {
  161. struct clock_event_device *evt = (struct clock_event_device *) dev_id;
  162. struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
  163. /* Clear the interrupt condition */
  164. timer_writew(&nios2_ced->timer, 0, ALTERA_TIMER_STATUS_REG);
  165. evt->event_handler(evt);
  166. return IRQ_HANDLED;
  167. }
  168. static int __init nios2_timer_get_base_and_freq(struct device_node *np,
  169. void __iomem **base, u32 *freq)
  170. {
  171. *base = of_iomap(np, 0);
  172. if (!*base) {
  173. pr_crit("Unable to map reg for %s\n", np->name);
  174. return -ENXIO;
  175. }
  176. if (of_property_read_u32(np, "clock-frequency", freq)) {
  177. pr_crit("Unable to get %s clock frequency\n", np->name);
  178. return -EINVAL;
  179. }
  180. return 0;
  181. }
  182. static struct nios2_clockevent_dev nios2_ce = {
  183. .ced = {
  184. .name = "nios2-clkevent",
  185. .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  186. .rating = 250,
  187. .shift = 32,
  188. .set_next_event = nios2_timer_set_next_event,
  189. .set_state_shutdown = nios2_timer_shutdown,
  190. .set_state_periodic = nios2_timer_set_periodic,
  191. .set_state_oneshot = nios2_timer_shutdown,
  192. .tick_resume = nios2_timer_resume,
  193. },
  194. };
  195. static __init int nios2_clockevent_init(struct device_node *timer)
  196. {
  197. void __iomem *iobase;
  198. u32 freq;
  199. int irq, ret;
  200. ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq);
  201. if (ret)
  202. return ret;
  203. irq = irq_of_parse_and_map(timer, 0);
  204. if (!irq) {
  205. pr_crit("Unable to parse timer irq\n");
  206. return -EINVAL;
  207. }
  208. nios2_ce.timer.base = iobase;
  209. nios2_ce.timer.freq = freq;
  210. nios2_ce.ced.cpumask = cpumask_of(0);
  211. nios2_ce.ced.irq = irq;
  212. nios2_timer_stop(&nios2_ce.timer);
  213. /* clear pending interrupt */
  214. timer_writew(&nios2_ce.timer, 0, ALTERA_TIMER_STATUS_REG);
  215. ret = request_irq(irq, timer_interrupt, IRQF_TIMER, timer->name,
  216. &nios2_ce.ced);
  217. if (ret) {
  218. pr_crit("Unable to setup timer irq\n");
  219. return ret;
  220. }
  221. clockevents_config_and_register(&nios2_ce.ced, freq, 1, ULONG_MAX);
  222. return 0;
  223. }
  224. static __init int nios2_clocksource_init(struct device_node *timer)
  225. {
  226. unsigned int ctrl;
  227. void __iomem *iobase;
  228. u32 freq;
  229. int ret;
  230. ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq);
  231. if (ret)
  232. return ret;
  233. nios2_cs.timer.base = iobase;
  234. nios2_cs.timer.freq = freq;
  235. ret = clocksource_register_hz(&nios2_cs.cs, freq);
  236. if (ret)
  237. return ret;
  238. timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODL_REG);
  239. timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODH_REG);
  240. /* interrupt disable + continuous + start */
  241. ctrl = ALTERA_TIMER_CONTROL_CONT_MSK | ALTERA_TIMER_CONTROL_START_MSK;
  242. timer_writew(&nios2_cs.timer, ctrl, ALTERA_TIMER_CONTROL_REG);
  243. /* Calibrate the delay loop directly */
  244. lpj_fine = freq / HZ;
  245. return 0;
  246. }
  247. /*
  248. * The first timer instance will use as a clockevent. If there are two or
  249. * more instances, the second one gets used as clocksource and all
  250. * others are unused.
  251. */
  252. static int __init nios2_time_init(struct device_node *timer)
  253. {
  254. static int num_called;
  255. int ret;
  256. switch (num_called) {
  257. case 0:
  258. ret = nios2_clockevent_init(timer);
  259. break;
  260. case 1:
  261. ret = nios2_clocksource_init(timer);
  262. break;
  263. default:
  264. ret = 0;
  265. break;
  266. }
  267. num_called++;
  268. return ret;
  269. }
  270. void read_persistent_clock(struct timespec *ts)
  271. {
  272. ts->tv_sec = mktime(2007, 1, 1, 0, 0, 0);
  273. ts->tv_nsec = 0;
  274. }
  275. void __init time_init(void)
  276. {
  277. struct device_node *np;
  278. int count = 0;
  279. for_each_compatible_node(np, NULL, ALTR_TIMER_COMPATIBLE)
  280. count++;
  281. if (count < 2)
  282. panic("%d timer is found, it needs 2 timers in system\n", count);
  283. clocksource_probe();
  284. }
  285. CLOCKSOURCE_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);