brcm,iproc-gpio.txt 3.0 KB

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  1. Broadcom iProc GPIO/PINCONF Controller
  2. Required properties:
  3. - compatible:
  4. "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
  5. supports full-featured pinctrl and GPIO functions used in various iProc
  6. based SoCs
  7. May contain an SoC-specific compatibility string to accommodate any
  8. SoC-specific features
  9. "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
  10. "brcm,cygnus-crmu-gpio" for Cygnus SoCs
  11. "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
  12. disabled
  13. "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
  14. pinctrl support completely disabled in this IP block. In Stingray, a
  15. different IP block is used to handle pinctrl related functions
  16. - reg:
  17. Define the base and range of the I/O address space that contains SoC
  18. GPIO/PINCONF controller registers
  19. - ngpios:
  20. Total number of in-use slots in GPIO controller
  21. - #gpio-cells:
  22. Must be two. The first cell is the GPIO pin number (within the
  23. controller's pin space) and the second cell is used for the following:
  24. bit[0]: polarity (0 for active high and 1 for active low)
  25. - gpio-controller:
  26. Specifies that the node is a GPIO controller
  27. Optional properties:
  28. - interrupts:
  29. Interrupt ID
  30. - interrupt-controller:
  31. Specifies that the node is an interrupt controller
  32. - gpio-ranges:
  33. Specifies the mapping between gpio controller and pin-controllers pins.
  34. This requires 4 fields in cells defined as -
  35. 1. Phandle of pin-controller.
  36. 2. GPIO base pin offset.
  37. 3 Pin-control base pin offset.
  38. 4. number of gpio pins which are linearly mapped from pin base.
  39. Supported generic PINCONF properties in child nodes:
  40. - pins:
  41. The list of pins (within the controller's own pin space) that properties
  42. in the node apply to. Pin names are "gpio-<pin>"
  43. - bias-disable:
  44. Disable pin bias
  45. - bias-pull-up:
  46. Enable internal pull up resistor
  47. - bias-pull-down:
  48. Enable internal pull down resistor
  49. - drive-strength:
  50. Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
  51. Example:
  52. gpio_ccm: gpio@1800a000 {
  53. compatible = "brcm,cygnus-ccm-gpio";
  54. reg = <0x1800a000 0x50>,
  55. <0x0301d164 0x20>;
  56. ngpios = <24>;
  57. #gpio-cells = <2>;
  58. gpio-controller;
  59. interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
  60. interrupt-controller;
  61. touch_pins: touch_pins {
  62. pwr: pwr {
  63. pins = "gpio-0";
  64. drive-strength = <16>;
  65. };
  66. event: event {
  67. pins = "gpio-1";
  68. bias-pull-up;
  69. };
  70. };
  71. };
  72. gpio_asiu: gpio@180a5000 {
  73. compatible = "brcm,cygnus-asiu-gpio";
  74. reg = <0x180a5000 0x668>;
  75. ngpios = <146>;
  76. #gpio-cells = <2>;
  77. gpio-controller;
  78. interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
  79. interrupt-controller;
  80. gpio-ranges = <&pinctrl 0 42 1>,
  81. <&pinctrl 1 44 3>;
  82. };
  83. /*
  84. * Touchscreen that uses the CCM GPIO 0 and 1
  85. */
  86. tsc {
  87. ...
  88. ...
  89. gpio-pwr = <&gpio_ccm 0 0>;
  90. gpio-event = <&gpio_ccm 1 0>;
  91. };
  92. /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */
  93. bluetooth {
  94. ...
  95. ...
  96. bcm,rfkill-bank-sel = <&gpio_asiu 5 1>
  97. }